Class 438/592 - Possessing plural conductive layers (e.g., polycide)

Subclass of Class 438 - Semiconductor device manufacturing: process
Definition: Processes wherein the electrode is a laminate of multiple
No. of patents: 1599
Last issue date: 05/15/2012

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Number	Title	Issue Date
8178433	Methods for the formation of fully silicided metal gates An advanced gate structure that includes a fully silicided metal gate and silicided source and drain regions in which the fully silicided metal gate has a thickness that is greater than the thickness of the silicided source/drain regions is provided. Methods of form...	05/15/2012
8168523	Manufacturing method of semiconductor device The invention provides a technique to manufacture a highly reliable semiconductor device and a display device at high yield. As an exposure mask, an exposure mask provided with a diffraction grating pattern or an auxiliary pattern formed of a semi-transmissive film ...	05/01/2012
8168522	Method for fabricating semiconductor device An aspect of the present disclosure, there is provided a method for fabricating a semiconductor device, including, forming a gate insulating film on a semiconductor substrate, forming a metal film on the gate insulating film, depositing a metal-silicon compound film...	05/01/2012
8163640	Metal gate compatible electrical fuse A dielectric material layer is formed on a metal gate layer for a metal gate electrode, and then lithographically patterned to form a dielectric material portion, followed by formation of a polycrystalline semiconductor layer thereupon. A semiconductor device employ...	04/24/2012
8124515	Gate etch optimization through silicon dopant profile change Improved semiconductor devices comprising metal gate electrodes are formed with reduced performance variability by reducing the initial high dopant concentration at the top portion of the silicon layer overlying the metal layer. Embodiments include reducing the dopa...	02/28/2012
8105931	Method of fabricating dual high-k metal gates for MOS devices The present disclosure provides a method of fabricating a semiconductor device. The method includes providing a semiconductor substrate having a first region and a second region, forming a high-k dielectric layer over the semiconductor substrate, forming a capping l...	01/31/2012
8076231	Semiconductor device and manufacturing method of same A FinFET and nanowire transistor with strain direction optimized in accordance with the sideface orientation and carrier polarity and an SMT-introduced manufacturing method for achieving the same are provided. A semiconductor device includes a pMISFET having a semic...	12/13/2011
8062966	Method for integration of replacement gate in CMOS flow Semiconductor devices and fabrication methods are provided, in which metal transistor replacement gates are provided for CMOS transistors. The process provides dual or differentiated work function capability (e.g., for PMOS and NMOS transistors) in CMOS processes.	11/22/2011
8053347	Method of manufacturing semiconductor device A method of manufacturing a semiconductor device, including forming a plurality of gate structures on a substrate, the gate structures each including a hard mask pattern stacked on a gate conductive pattern, forming an insulating layer pattern between the gate struc...	11/08/2011
8030199	Transistor fabrication method A method of forming low stack height transistors having controllable linewidth in an integrated circuit without channeling is disclosed. A disposable hardmask of doped glass is utilized to define the gate and subsequently protect the gate (and the underlying substra...	10/04/2011
8026162	Method of manufacturing layer-stacked wiring A layer-stacked wiring made up of a microcrystalline silicon thin film and a metal thin film is provided which is capable of suppressing an excessive silicide formation reaction between the microcrystalline silicon thin film and metal thin film, thereby preventing p...	09/27/2011
8021971	Structure and method to form a thermally stable silicide in narrow dimension gate stacks An integrated circuit is provided including a narrow gate stack having a width less than or equal to 65 nm, including a silicide region comprising Pt segregated in a region of the silicide away from the top surface of the silicide and towards an lower portion define...	09/20/2011
8008178	Method for fabricating semiconductor device with an intermediate stack structure A method for fabricating a semiconductor device includes forming a first conductive layer over a substrate, forming an intermediate structure over the first conductive layer, the intermediate structure formed in a stack structure comprising at least a first metal la...	08/30/2011
8003507	Method of integrating high-K/metal gate in CMOS process flow The present disclosure provides a method of fabricating a semiconductor device. The method includes providing a semiconductor substrate having a first active region and a second active region, forming a high-k dielectric layer over the semiconductor substrate, formi...	08/23/2011
7994039	Method of fabricating semiconductor device A method of fabricating a semiconductor device according to one embodiment includes: forming a plurality of Si-based pattern portions above a semiconductor substrate, the plurality of Si-based pattern portions being adjacent in a direction substantially parallel to ...	08/09/2011
7994038	Method to reduce MOL damage on NiSi Transistor devices are formed with nickel silicide layers formulated to prevent degradation upon removal of overlying stress liners. Embodiments include transistors with nickel silicide layers having a platinum composition gradient increasing in platinum content tow...	08/09/2011
7960268	Method for forming gate having metal layer in semiconductor device Disclosed are a semiconductor device with a metal gate and a method of manufacturing the same. The method of the present invention includes: preparing a semiconductor substrate having a isolation layer to define an active region; forming a gate insulation layer on t...	06/14/2011
7943501	Systems and methods of forming tantalum silicide layers A method of forming (and apparatus for forming) tantalum silicide layers (including tantalum silicon nitride layers), which are typically useful as diffusion barrier layers, on a substrate by using a vapor deposition process with a tantalum halide precursor compound...	05/17/2011
7919405	Semiconductor device and manufacturing method thereof A semiconductor device and a manufacturing method thereof that can prevent mutual diffusion of impurity in a silicide layer and can decrease sheet resistance of an N-type polymetal gate electrode and a P-type polymetal gate electrode, respectively in the semiconduct...	04/05/2011
7910468	Methods and compositions for preparing Ge/Si semiconductor substrates The present disclosure describes methods for preparing semiconductor structures, comprising forming a Ge layer on a semiconductor substrate using an admixture of (a) (GeH3)2CH2 and Ge2H6; (b) GeH3CH	03/22/2011
7902058	Inducing strain in the channels of metal gate transistors In a metal gate replacement process, strain may be selectively induced in the channels of NMOS and PMOS transistors. For example, a material having a higher coefficient of thermal expansion than the substrate may be used to form the gate electrodes of PMOS transisto...	03/08/2011
7897500	Methods for forming silicide conductors using substrate masking A plurality of spaced-apart conductor structures is formed on a semiconductor substrate, each of the conductor structures including a conductive layer. Insulating spacers are formed on sidewalls of the conductor structures. An interlayer-insulating film that fills g...	03/01/2011
7892961	Methods for forming MOS devices with metal-inserted polysilicon gate stack A method for forming a semiconductor structure includes providing a semiconductor substrate; forming a gate dielectric layer on the semiconductor substrate; forming a metal-containing layer on the gate dielectric; and forming a composite layer over the metal-contain...	02/22/2011
7871915	Method for forming metal gates in a gate last process The present disclosure provides a method of fabricating a semiconductor device that includes providing a substrate having a first region and a second region, forming first and second gate stacks in the first and second regions, respectively, the first gate stack inc...	01/18/2011
7871916	Transistor gate electrode having conductor material layer Various embodiments of the invention relate to a PMOS device having a transistor channel of silicon germanium material on a substrate, a gate dielectric having a dielectric constant greater than that of silicon dioxide on the channel, a gate electrode conductor mate...	01/18/2011
7863175	Zero interface polysilicon to polysilicon gate for flash memory A system and method are disclosed for processing a zero angstrom oxide interface dual poly gate structure for a flash memory device. An exemplary method can include removing an oxide on a surface of a first poly layer and forming a second poly layer on the first pol...	01/04/2011
7855134	Semiconductor device and manufacturing method of the same Provided is a highly reliable semiconductor device equipped with a plurality of semiconductor elements having desired properties, respectively; and a manufacturing method facilitating the manufacture of the semiconductor device. The semiconductor device is manufactu...	12/21/2010
7851341	Semiconductor device and method for manufacturing the same A semiconductor device is provided including a transistor element on a substrate, a silicide on a gate and a source/drain of the transistor element; and an amorphous capping layer on the silicide. ...	12/14/2010
7846826	Method of manufacturing a semiconductor device with multilayer sidewall A gate dielectric film, a poly-silicon film, a film of a refractory metal such as tungsten, and a gate cap dielectric film are sequentially laminated on a semiconductor substrate. The gate cap dielectric film and the refractory metal film are selectively removed by ...	12/07/2010
7816244	Insulating buffer film and high dielectric constant semiconductor device and method for fabricating the same A semiconductor device includes: an n-transistor including a first gate insulating film made of a high-dielectric-constant material and a first gate electrode fully silicided with a metal, the first gate insulating film and the first gate electrode being formed in t...	10/19/2010
7807558	Method of fabricating a semiconductor device A method of fabricating a semiconductor device is provided. The method of fabricating the semiconductor device comprises providing a substrate. Next, an insulating layer, a conductive layer and a silicide layer are formed on the substrate in sequence. Next, a hard m...	10/05/2010
7803703	Metal-germanium physical vapor deposition for semiconductor device defect reduction The present invention provides a method of manufacturing a metal silicide electrode (100) for a semiconductor device (110). The method comprises depositing by physical vapor deposition, germanium atoms (120) and transition metal atoms (130	09/28/2010
7795124	Methods for contact resistance reduction of advanced CMOS devices Methods for reducing contact resistance in semiconductor devices are provided in the present invention. In one embodiment, the method includes providing a substrate having semiconductor device formed thereon, wherein the device has source and drain regions and a gat...	09/14/2010
7790592	Method to fabricate metal gate high-k devices Disclosed is a method to fabricate a semiconductor device, and a device fabricated in accordance with the method. The method includes providing a substrate comprised of silicon; performing a shallow trench isolation process to delineate nFET and pFET active areas an...	09/07/2010
7781322	Nickel alloy salicide transistor structure and method for manufacturing same Provided are exemplary methods for forming a nickel silicide layer and semiconductor devices incorporating a nickel silicide layer that provides increased stability for subsequent processing at temperatures above 450° C. In particular, the nickel silicide layer is ...	08/24/2010
7763533	Method of forming a salicide layer for a semiconductor device Methods of fabricating semiconductor devices are disclosed. An illustrated example method protects spacers and active areas by performing impurity ion implantation on an oxide layer prior to etching the oxide layer. The illustrated method includes forming a gate on ...	07/27/2010
7763532	Technique for forming a dielectric etch stop layer above a structure including closely spaced lines When forming line structures of semiconductor devices in accordance with the 90 nm technology, sidewall spacers of the lines are reduced in size immediately prior to the deposition of an etch stop layer that is formed on the device layer. Due to the reduced spacer e...	07/27/2010
7759239	Method of reducing a critical dimension of a semiconductor device The present disclosure provides a method of fabricating a semiconductor device. The method includes forming a gate layer over a substrate, forming a hard mask layer over a gate layer, forming a first material layer over the hard mask layer, forming a patterned photo...	07/20/2010
7737018	Process of forming an electronic device including forming a gate electrode layer and forming a patterned masking layer A process of forming an electronic device can include forming a gate electrode layer and forming a patterned masking layer. In a first aspect, a process operation is performed before removing substantially all of a lower portion of the gate electrode layer. In a sec...	06/15/2010
7687389	Method for fabricating semiconductor device A method for fabricating a semiconductor device includes forming a gate insulation layer over a substrate, forming a first gate conductive layer over the gate insulation layer, forming a barrier metal over the first gate conductive layer, sequentially forming a seco...	03/30/2010

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Class 438/592 - Possessing plural conductive layers (e.g., polycide)