Class 438/585 - Insulated gate formation

Subclass of Class 438 - Semiconductor device manufacturing: process
Definition: Processes for forming an electrode which is electrically
No. of patents: 1332
Last issue date: 05/29/2012

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Number	Title	Issue Date
8187961	Threshold adjustment for high-K gate dielectric CMOS A CMOS structure is disclosed in which a first type FET has an extremely thin oxide liner. This thin liner is capable of preventing oxygen from reaching the high-k dielectric gate insulator of the first type FET. A second type FET device of the CMOS structure has a ...	05/29/2012
8173531	Structure and method to improve threshold voltage of MOSFETS including a high K dielectric A method of forming threshold voltage controlled semiconductor structures is provided in which a conformal nitride-containing liner is formed on at least exposed sidewalls of a patterned gate dielectric material having a dielectric constant of greater than silicon o...	05/08/2012
8173530	Semiconductor device and related fabrication methods that use compressive material with a replacement gate technique A semiconductor device and related method of fabricating it are provided. An exemplary fabrication process begins by forming a gate structure overlying a layer of semiconductor material, the gate structure comprising a gate insulator overlying the layer of semicondu...	05/08/2012
8158500	Field effect transistors (FETS) and methods of manufacture An improved field effect transistors (FETs) and methods of manufacturing the field effect transistors (FETs) are provided. The method of manufacturing a zero capacitance random access memory cell (ZRAM) includes comprises forming a finFET on a substrate and enhancin...	04/17/2012
8148247	Method and algorithm for random half pitched interconnect layout with constant spacing An embodiment of a system and method produces a random half pitched interconnect layout. A first normal-pitch mask and a second normal-pitch mask are created from a metallization layout having random metal shapes. The lines and spaces of the first mask are printed a...	04/03/2012
8143151	Nanowire electronic devices and method for producing the same The present invention is directed to an electrical device that comprises a first and a second fiber having a core of thermoelectric material embedded in an electrically insulating material, and a conductor. The first fiber is doped with a first type of impurity, whi...	03/27/2012
8119509	Method of manufacturing high-integrated semiconductor device and semiconductor device manufactured using the same A semiconductor device comprises a plurality of vertical transistors each comprising barrier metal layers corresponding to source/drain regions in which a conduction region is formed under a channel region having a pillar form, and a bit line comprising a metal laye...	02/21/2012
8076229	Methods of forming data cells and connections to data cells Disclosed are methods and devices, among which is a method that includes forming a lower conductive material on a substrate, forming a stop material on the substrate, forming a sacrificial material on the substrate, etching the sacrificial material with an etch that...	12/13/2011
8053345	Method for fabricating field effect transistor using a compound semiconductor Provided is a method for fabricating a field effect transistor. In the method, an active layer and a capping layer are formed on a substrate. A source electrode and a drain electrode is formed on the capping layer. A dielectric interlayer is formed on the substrate,...	11/08/2011
8048790	Method for self-aligning a stop layer to a replacement gate for self-aligned contact integration Semiconductor devices with replacement gate electrodes and integrated self aligned contacts are formed with enhanced gate dielectric layers and improved electrical isolation properties between the gate line and a contact. Embodiments include forming a removable gate...	11/01/2011
8043948	Semiconductor device manufacturing method and design support apparatus A semiconductor device manufacturing method includes: forming a conductive film over a substrate; forming an assist pattern on the conductive film; forming a metal film to cover the conductive film and the assist pattern; etching back the metal film to form at least...	10/25/2011
8030195	TFT substrate and method for manufacturing TFT substrate An object of the invention is to provide a TFT substrate and a method for producing a TFT substrate which is capable of drastically reducing the production cost by decreasing the number of steps in the production process and improving production yield. A TFT substra...	10/04/2011
8026161	Highly reliable amorphous high-K gate oxide ZrO2 A gate oxide and method of fabricating a gate oxide that produces a more reliable and thinner equivalent oxide thickness than conventional SiO2 gate oxides are provided. Also shown is a gate oxide with a conduction band offset in a range of approximately ...	09/27/2011
8021969	Semiconductor device and method for fabricating the same A method for fabricating a semiconductor device includes forming a stacked layer including a tungsten layer, forming a hard mask pattern over the stacked layer, and oxidizing a surface of the hard mask pattern to form a stress buffer layer. A portion of the stacked ...	09/20/2011
8012863	Transistors with gate stacks having metal electrodes A transistor with a gate stack having a metal electrode and a method for forming the same. The method includes providing a structure which includes (a) a substrate, (b) a gate dielectric layer on the substrate, and (c) a gate layer on the gate dielectric layer. The ...	09/06/2011
7998850	Semiconductor device and method for manufacturing the same Disclosed herein are a semiconductor device and a method for manufacturing the same. The method includes forming a gate structure using a carbon nano tube (CNT). In order to prevent reduction of the gate resistance and the short channel effect, a CNT gate having a g...	08/16/2011
7994035	Semiconductor device fabricating method including thermal oxidation of a substrate, forming a second oxide, and thermal processing a gate electrode There is provided a method of fabricating a semiconductor device in which a gate electrode is formed on an oxide film, which is formed by thermal oxidation on a substrate. The fabrication method includes: a first step of forming a first oxide film on the substrate; ...	08/09/2011
7994036	Semiconductor device and fabrication method for the same The semiconductor device includes a first transistor and a second transistor formed in a semiconductor substrate. The first transistor includes: a first gate insulating film formed on the semiconductor substrate; and a first gate electrode formed on the first gate i...	08/09/2011
7985669	Selective deposition of noble metal thin films Processes are provided for selectively depositing thin films comprising one or more noble metals on a substrate by vapor deposition processes. In some embodiments, atomic layer deposition (ALD) processes are used to deposit a noble metal containing thin film on a hi...	07/26/2011
7968442	Fin field effect transistor and method of fabricating the same A fin field effect transistor includes a fin protruding from a semiconductor substrate, a gate insulating layer formed so as to cover upper and lateral surfaces of the fin, and a gate electrode formed across the fin so as to cover the gate insulating layer. An upper...	06/28/2011
7964487	Carrier mobility enhanced channel devices and method of manufacture An integrated circuit with stress enhanced channels, a design structure and a method of manufacturing the integrated circuit is provided. The method includes forming a dummy gate structure on a substrate and forming a trench in the dummy gate structure. The method f...	06/21/2011
7960265	Method for fabricating semiconductor device A method for fabricating a semiconductor device includes forming an etch target layer over a substrate including a cell region and a peripheral region, forming a first mask pattern having a first portion and a second portion over the etch target layer in the cell re...	06/14/2011
7955963	Dry etching method for semiconductor device The present invention provides a device having an N type polysilicon gate and a P type polysilicon gate disposed therein, wherein when both gates are simultaneously etched, they are disposed in such a manner that the area of a non-doped polysilicon gate correspondin...	06/07/2011
7947587	High voltage semiconductor device and method for manufacturing the same A semiconductor device, particularly, a method for manufacturing a high voltage semiconductor device is disclosed. The method includes forming a high voltage gate oxide film on a semiconductor substrate having a high voltage device region and a low voltage device re...	05/24/2011
7947590	Method of manufacturing a non-volatile memory device The non-volatile memory device may include a semiconductor substrate having a body and a pair of fins. A bridge insulating layer may non-electrically connect upper portions of the pair of fins to define a void between the pair of fins. Outer surfaces of the pair of ...	05/24/2011
7947588	Structure and method for a CMOS device with doped conducting metal oxide as the gate electrode A semiconductor device and method for fabricating a semiconductor device for providing improved work function values and thermal stability is disclosed. The semiconductor device comprises a semiconductor substrate; an interfacial dielectric layer over the semiconduc...	05/24/2011
7947589	FinFET formation with a thermal oxide spacer hard mask formed from crystalline silicon layer A semiconductor process and apparatus provide a FinFET device by forming a second single crystal semiconductor layer (19) that is isolated from an underlying first single crystal semiconductor layer (17) by a buried insulator layer (18); pattern...	05/24/2011
7906418	Semiconductor device having substantially planar contacts and body A method of manufacturing a semiconductor device, wherein a gate structure is formed over a substrate, an interconnect layer is formed over the gate structure and the substrate, and a cap layer is formed over the interconnect layer. The interconnect layer and the ca...	03/15/2011
7897498	Method for manufacturing semiconductor device The present invention is a method of manufacturing a semiconductor device from a layered body including: a semiconductor substrate; a high dielectric film formed on the semiconductor substrate; and an SiC-based film formed on a position upper than the high dielectri...	03/01/2011
7892957	Gate CD trimming beyond photolithography A semiconductor device is fabricated with a selected critical dimension. A gate dielectric layer is formed over a semiconductor body. A gate layer comprised of a conductive material, such as polysilicon, is formed over the gate dielectric layer. The gate layer is pa...	02/22/2011
7892956	Methods of manufacture of vertical nanowire FET devices A vertical Field Effect Transistor (FET) comprising a vertical semiconductor nanowire is formed by the following steps. Create a columnar pore in a bottom dielectric layer formed on a bottom electrode. Fill the columnar pore by plating a vertical semiconductor nanow...	02/22/2011
7879706	Memory and manufacturing method thereof A memory having isolated dual memory cells is provided. A first isolation wall and a second isolation wall are separately disposed between a source and a drain on a substrate. An isolation bottom layer and a polysilicon layer are orderly disposed on the substrate be...	02/01/2011
7871910	Flash memory device and method of fabricating the same A flash memory device and method of fabricating thereof. In accordance with the method of the invention, a tunnel dielectric layer and an amorphous first conductive layer are formed over a semiconductor substrate. An annealing process to change the amorphous first c...	01/18/2011
7871911	Methods for fabricating semiconductor device structures Methods for fabricating semiconductor device structures are disclosed. In some embodiments, methods for fabricating semiconductor device structures may comprising forming at least one raised element on a surface of a substrate, the at least one raised element includ...	01/18/2011
7855133	Formation of carbon and semiconductor nanomaterials using molecular assemblies The invention is directed to a method of forming carbon nanomaterials or semiconductor nanomaterials. The method comprises providing a substrate and attaching a molecular precursor to the substrate. The molecular precursor includes a surface binding group for attach...	12/21/2010
7851340	Semiconductor fin integration using a sacrificial fin There is a method for forming a semiconductor device. Portions of a sacrificial layer are removed to expose a first seed layer region. The first seed layer region corresponds to a first semiconductor region, and a remaining portion of the sacrificial layer correspon...	12/14/2010
7842592	Channel strain engineering in field-effect-transistor There is disclosed a method of applying stress to a channel region underneath a gate of a field-effect-transistor, which includes the gate, a source region, and a drain region. The method includes steps of embedding stressors in the source and drain regions of the F...	11/30/2010
7833890	Semiconductor device having a pair of fins and method of manufacturing the same Example embodiments relate to a semiconductor device and a method of manufacturing the same. A semiconductor device according to example embodiments may have reduced disturbances during reading operations and a reduced short channel effect. The semiconductor device ...	11/16/2010
7833889	Apparatus and methods for improving multi-gate device performance Embodiments of an apparatus and methods for improving multi-gate device performance including methods to fabricate a plurality of multi-gate fins from a diffused body of a substantially planar structure that is substantially electrically isolated using a shallow tre...	11/16/2010
7795123	Method of forming gate electrode The present invention discloses to a method of forming a gate electrode, the method according to the present invention comprises the steps of forming a lower amorphous silicon layer using silane (SiH4) gas and nitrous oxide (N2O) gas; forming a...	09/14/2010

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Class 438/585 - Insulated gate formation