Mark Twain (Samuel L. Clemens) received Patent No. 121,992 for "An Improvement in Adjustable and Detachable Straps for Garments." He later received two more patents: one for a self-pasting scrapbook and one for a game to help players remember important historical dates.
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| Number | Title | Issue Date |
| 8110489 | Process for forming cobalt-containing materials Embodiments of the invention described herein generally provide methods and apparatuses for forming cobalt silicide layers, metallic cobalt layers, and other cobalt-containing materials. In one embodiment, a method for forming a cobalt silicide containing material o... | 02/07/2012 |
| 7985668 | Method for forming a metal silicide having a lower potential for containing material defects Generally, the present disclosure is directed to a method of removing “weakened” areas of a metal silicide layer during silicide layer formation, thereby reducing the likelihood that material defects might occur during subsequent device manufacturing. One illust... | 07/26/2011 |
| 7781316 | Methods of manufacturing metal-silicide features A method of manufacturing a microelectronic device including forming a dielectric layer surrounding a dummy feature located over a substrate, removing the dummy feature to form an opening in the dielectric layer, and forming a metal-silicide layer conforming to the ... | 08/24/2010 |
| 7632743 | Method of manufacturing flash memory device A method of manufacturing a flash memory device includes forming a first polysilicon layer over a semiconductor substrate to form a floating gate. A tunnel dielectric layer is formed over the first polysilicon layer. A second polysilicon layer and a tungsten silicid... | 12/15/2009 |
| 7632744 | Semiconductor integrated circuit device and process for manufacturing the same Formation of an WNx film 24 constituting a barrier layer of a gate electrode 7A having a polymetal structure is effected in an atmosphere containing a high concentration nitrogen gas, whereby release of N (nitrogen) from the WNx f... | 12/15/2009 |
| 7504328 | Schottky barrier source/drain n-mosfet using ytterbium silicide A method of fabricating an N-type Schottky barrier Source/Drain Transistor (N-SSDT) with ytterbium silicide (YbSi2-x) for source and drain is presented. The fabrication of YbSi2-x is compatible with the normal CMOS process but ultra-high vacuum... | 03/17/2009 |
| 7485556 | Forming metal silicide on silicon-containing features of a substrate A metal silicide layer is formed on silicon-containing features of a substrate in a chamber. A metal film is sputter deposited on the substrate and a portion of the sputter deposited metal film is silicided. In the process, sputtering gas is energized by applying an... | 02/03/2009 |
| 7470605 | Method for fabrication of a MOS transistor Disclosed is a method for fabricating a MOS transistor. The present method includes the steps of: (a) forming a gate electrode including a gate insulating layer and a polysilicon gate conductive layer on an active region in a semiconductor substrate; (b) forming a m... | 12/30/2008 |
| 7459382 | Field effect device with reduced thickness gate A semiconductor structure is fabricated with reduced gate capacitance by thinning of a gate electrode to provide a reduced thickness gate electrode. The gate electrode is thinned after forming a spacer layer adjoining the gate electrode. In addition, the height of t... | 12/02/2008 |
| 7446025 | Method of forming vertical FET with nanowire channels and a silicided bottom contact A vertical FET structure with nanowire forming the FET channels is disclosed. The nanowires are formed over a conductive silicide layer. The nanowires are gated by a surrounding gate. Top and bottom insulator plugs function as gate spacers and reduce the gate-source... | 11/04/2008 |
| 7442606 | Method of manufacturing a semiconductor device A method of manufacturing a semiconductor device includes providing a semiconductor substrate in which a floating gate pattern is formed. A dielectric layer, a conductive layer for a control gate, a tungsten silicide layer, a first silicon oxynitride layer, a hard m... | 10/28/2008 |
| 7432180 | Method of fabricating a nickel silicide layer by conducting a thermal annealing process in a silane gas A method of fabricating a semiconductor device comprises the step of forming a nickel monosilicide layer selectively over a silicon region defined by an insulation film by a self-aligned process. The self-aligned process comprises the steps of forming a metallic nic... | 10/07/2008 |
| 7432181 | Method of forming self-aligned silicides A method of forming self-aligned silicides is described and applied to a substrate having an isolation area, which divides the substrate into a first area and a second area. A resist protective oxide layer is formed on the substrate, and subsequently a mask layer is... | 10/07/2008 |
| 7429525 | Fabrication process of a semiconductor device A method of fabricating a semiconductor device includes the steps of forming a metallic nickel film on a silicon substrate such that the metallic nickel film covers an insulation film on the silicon substrate and a silicon surface of the silicon substrate, annealing... | 09/30/2008 |
| 7396764 | Manufacturing method for forming all regions of the gate electrode silicided The technology which can improve the performance of a MOS transistor in which all the regions of the gate electrode were silicided is offered. A gate insulating film and a gate electrode of an nMOS transistor are laminated and formed in this order on a semico... | 07/08/2008 |
| 7390729 | Method of fabricating a semiconductor device A method of fabricating semiconductor device is provided. A transistor is formed on a substrate, and a metal silicide layer is formed on the surface of a gate conductor layer and a source/drain region. Next, a surface treatment process is performed to selectively fo... | 06/24/2008 |
| 7375013 | Semiconductor integrated circuit device and process for manufacturing the same Formation of an WNX film 24 constituting a barrier layer of a gate electrode 7A having a polymetal structure is effected in an atmosphere containing a high concentration nitrogen gas, whereby release of N (nitrogen) from the WNX f... | 05/20/2008 |
| 7371668 | Method for making a metal oxide semiconductor device A method for making a MOS device includes: forming an insulator layer on a semiconductor substrate, the insulator layer including a titanium dioxide film that has a surface with hydroxyl groups formed thereon; and forming an aluminum cap film on the surface of the t... | 05/13/2008 |
| 7348265 | Semiconductor device having a silicided gate electrode and method of manufacture therefor The present invention provides a semiconductor device, a method of manufacture therefor, and an integrated circuit including the semiconductor device. The semiconductor device (100), among other possible elements, includes a gate oxide (140) located ov... | 03/25/2008 |
| 7344985 | Nickel alloy silicide including indium and a method of manufacture therefor The invention provides a semiconductor device, a method of manufacture therefore and a method for manufacturing an integrated circuit including the same. The semiconductor device, among other elements, may include a gate structure located over a substrate, the gate ... | 03/18/2008 |
| 7338888 | Method for manufacturing a semiconductor device having a silicided gate electrode and a method for manufacturing an integrated circuit including the same The present invention provides a method for manufacturing a semiconductor device and a method for manufacturing an integrated circuit including the semiconductor device. The method for manufacturing the semiconductor device (100), among other possible steps, ... | 03/04/2008 |
| 7329604 | Semiconductor device and method for fabricating the same The method for fabricating a semiconductor device comprises the step of forming a Co film 72 on a gate electrode 30 having a gate length Lg of below 50 nm including 50 nm; the first thermal processing step of making thermal processing to rea... | 02/12/2008 |
| 7323396 | Signal and/or ground planes with double buried insulator layers and fabrication process The present invention describes a method including the steps of providing a single crystal semiconductor substrate, forming a layer of rare earth silicide on a surface of the semiconductor substrate, forming a first layer of insulating material on the layer of rare ... | 01/29/2008 |
| 7323402 | Trench Schottky barrier diode with differential oxide thickness A fabrication process for a trench Schottky diode with differential oxide thickness within the trenches includes forming a first nitride layer on a substrate surface and subsequently forming a plurality of trenches in the substrate including, possibly, a termination... | 01/29/2008 |
| 7306983 | Method for forming dual etch stop liner and protective layer in a semiconductor device The present invention provides a semiconductor device having dual nitride liners, a silicide layer, and a protective layer beneath one of the nitride liners for preventing the etching of the silicide layer. A first aspect of the invention provides a method for use i... | 12/11/2007 |
| 7285491 | Salicide process A salicide process is provided. A metal layer selected from a group consisting of nickel and an alloy thereof is formed on a silicon layer, the first step of the second thermal process is performed at 300˜400 degrees centigrade for 10˜60 seconds and the second ste... | 10/23/2007 |
| 7262104 | Selective channel implantation for forming semiconductor devices with different threshold voltages Multiple semiconductor devices are formed with different threshold voltages. According to one exemplary implementation, first and second semiconductor devices are formed and doped differently, resulting in different threshold voltages for the first and second semico... | 08/28/2007 |
| 7259051 | Method of forming SI tip by single etching process and its application for forming floating gate The invention provides a method of forming a silicon tip by a single etching process, as well as a method of forming a tip floating gate to increase erase speed. Etching gases comprising (1) chlorine and/or (2) oxygen/helium are performed to form a silicon tip witho... | 08/21/2007 |
| 7211516 | Nickel silicide including indium and a method of manufacture therefor The present invention provides a semiconductor device, a method of manufacture therefore and a method for manufacturing an integrated circuit including the same. The semiconductor device, among other elements, may include a substrate (110), as well as a nicke... | 05/01/2007 |
| 7208398 | Metal-halogen physical vapor deposition for semiconductor device defect reduction The present invention provides a method of manufacturing a metal silicide electrode (100) for a semiconductor device (110). The method comprises depositing by physical vapor deposition, halogen atoms (120) and transition metal atoms (130)... | 04/24/2007 |
| 7205234 | Method of forming metal silicide A method of optimizing the formation of nickel silicide on regions of a MOSFET structure, has been developed. The method features formation of nickel silicide using an anneal procedure performed at a temperature below which nickel silicide instability and agglomerat... | 04/17/2007 |
| 7202147 | Semiconductor device and method for fabricating the same A semiconductor device includes: a gate electrode formed on a silicon substrate; source/drain regions formed at both sides of the gate electrode in the silicon substrate; and a silicide layer formed on the source/drain regions. The silicide layer includes a first si... | 04/10/2007 |
| 7157358 | Method for using a wet etch to manufacturing a semiconductor device having a silicided gate electrode and a method for manufacturing an integrated circuit including the same The present invention provides a method for manufacturing a semiconductor device and a method for manufacturing an integrated circuit including the semiconductor device. The method for manufacturing the semiconductor device, among other possible steps, forming a pol... | 01/02/2007 |
| 7148143 | Semiconductor device having a fully silicided gate electrode and method of manufacture therefor The present invention provides a semiconductor device, a method of manufacture therefor, and a method for manufacturing an integrated circuit. The semiconductor device (100), among other possible elements, includes a silicided gate electrode (150) loca... | 12/12/2006 |
| 7135386 | Process for fabricating a semiconductor device By removing halogen atoms existing on the surface of the silicon layer and in the subsurface thereof so that the concentration of halogen atoms becomes 100 ppm or lower and forming an electrode on the resulting silicon layer, the electrode which has a low resistance... | 11/14/2006 |
| 7135393 | Semiconductor device manufacture method capable of supressing gate impurity penetration into channel A gate electrode is formed above an n-type well including an n-type threshold voltage adjustment region, ions of p-type impurity are implanted with a low acceleration energy to form extension regions in the n-type well on both sides of the gate electrode, side wall ... | 11/14/2006 |
| 7129169 | Method for controlling voiding and bridging in silicide formation A method for forming a metal silicide contact for a semiconductor device includes forming a refractory metal layer over a substrate, including active and non-active area of said substrate, and forming a cap layer over the refractory metal layer. A counter tensile la... | 10/31/2006 |
| 7125787 | Method of manufacturing insulated gate semiconductor device A gate electrode includes a first polysilicon film remaining on a first oxide film, a part of a second polysilicon layer 8 superimposed on the polysilicon layer, and a part of the second polysilicon layer partially extending over second gate oxide films. Thus... | 10/24/2006 |
| 7113388 | Semiconductor capacitor with praseodymium oxide as dielectric In accordance with the invention there is provided a semiconductor capacitor having a first semiconductor layer which forms a first capacitor electrode and which includes silicon, a second capacitor electrode and a capacitor dielectric including praseodymium oxide b... | 09/26/2006 |
| 7098521 | Reduced guard ring in schottky barrier diode structure Schottky barrier diodes use a dielectric separation region to bound an active region. The dielectric separation region permits the elimination of a guard ring in at least one dimension. Further, using a dielectric separation region in an active portion of the integr... | 08/29/2006 |