Pillow with retractable umbrella
A pillow assembly having a supporting assembly and a retractable umbrella assembly that is easily transportable and allows a user to support his/her head while covering their face from sunlight.
Make the Most of Our Site
See this month's Top Inventors and Most Cited Patents.
Stay on top of the latest innovations by subscribing to an RSS feed.
Registered users: Manage your profile.
| Number | Title | Issue Date |
| 8187955 | Graphene growth on a carbon-containing semiconductor layer A semiconductor-carbon alloy layer is formed on the surface of a semiconductor substrate, which may be a commercially available semiconductor substrate such as a silicon substrate. The semiconductor-carbon alloy layer is converted into at least one graphene layer du... | 05/29/2012 |
| 8178426 | Method for manufacturing a structure of semiconductor-on-insulator type A method for manufacturing an insulated semiconductor layer, including: forming a porous silicon layer on a single-crystal silicon surface; depositing an insulating material so that it penetrates into the pores of the porous silicon layer; eliminating the insulating... | 05/15/2012 |
| 8148242 | Oxidation after oxide dissolution A method for manufacturing a SeOI substrate that includes a thin working layer made from one or more semiconductor material(s); a support layer; and a thin buried oxide layer between the working layer and the support layer. The method includes a manufacturing step o... | 04/03/2012 |
| 8148243 | Zero capacitor RAM with reliable drain voltage application and method for manufacturing the same The following discloses and describes a zero capacitor RAM as well as a method for manufacturing the same. The zero capacitor RAM includes an SOI substrate. This SOI substrate is composed of a stacked structure of a silicon substrate, an embedded insulation film and... | 04/03/2012 |
| 8138069 | Substrate pretreatment for subsequent high temperature group III depositions Embodiments of the present invention relate to apparatus and method for pretreatment of substrates for manufacturing devices such as light emitting diodes (LEDs) or laser diodes (LDs). One embodiment of the present invention comprises pre-treating the aluminum oxide... | 03/20/2012 |
| 8110484 | Conductive nitride semiconductor substrate and method for producing the same A method for producing a conductive nitride semiconductor substrate circuit includes the steps of forming, on an underlying substrate, a mask including dot or stripe masking portions having a width or diameter of 10 to 100 μm and arranged at a spacing of 250 to 10,... | 02/07/2012 |
| 8110483 | Forming an extremely thin semiconductor-on-insulator (ETSOI) layer Solutions for forming an extremely thin semiconductor-on-insulator (ETSOI) layer are disclosed. In one embodiment, a method includes providing a wafer including a plurality of semiconductor-on-insulator (SOI) layer regions separated by at least one shallow trench is... | 02/07/2012 |
| 8093139 | Method for fabrication of aligned nanowire structures in semiconductor materials for electronic, optoelectronic, photonic and plasmonic devices The present invention describes a method of fabrication of nanocomposite semiconductor materials comprising aligned arrays of metal or semiconductor nanowires incorporated into semiconductor material for application in various electronic, optoelectronic, photonic an... | 01/10/2012 |
| 8088674 | Method of growing, on a dielectric material, nanowires made of semi-conductor materials connecting two electrodes Electrodes made from metallic material are formed on a layer of dielectric material. A bottom layer of at least one of the electrodes constitutes a catalyst material in direct contact with the layer of dielectric material. Nanowires are grown by means of the catalys... | 01/03/2012 |
| 8076220 | Fabrication method for device structure having transparent dielectric substrate A semiconductor device has a transparent dielectric substrate such as a sapphire substrate. To enable fabrication equipment to detect the presence of the substrate optically, the back surface of the substrate is coated with a triple-layer light-reflecting film, pref... | 12/13/2011 |
| 8076221 | Fabrication method of pixel structure and thin film transistor A method of fabricating a thin film transistor is disclosed. First, a substrate is provided and a patterned polysilicon layer is formed on the substrate. A metal layer is formed on the patterned polysilicon layer. Then, a portion of the metal layer is removed so tha... | 12/13/2011 |
| 8062962 | Method for enhancing the reliability of a P-channel semiconductor device and a P-channel semiconductor device made thereof A method for forming a semiconductor device is disclosed. The device includes a control electrode on a semiconductor P-channel layer having at least a gate dielectric layer. The gate dielectric layer has an exponentially decreasing density of defect levels Et | 11/22/2011 |
| 8017505 | Method for manufacturing a semiconductor device A method of manufacturing a semiconductor device, comprises; a) forming a SiGe layer on a substrate; b) forming a Si layer on the SiGe layer; c) forming a groove that exposes the side surface of the SiGe layer by partly etching the Si layer and the SiGe layer; and d... | 09/13/2011 |
| 8008169 | Method for manufacturing photoelectric conversion device A fragile layer is formed in a single crystal silicon substrate, a first impurity silicon layer is formed on the one surface side in the single crystal silicon substrate, and a first electrode is formed thereover. After one surface of a supporting substrate and the ... | 08/30/2011 |
| 7994028 | Structures having lattice-mismatched single-crystalline semiconductor layers on the same lithographic level and methods of manufacturing the same A semiconductor substrate containing a single crystalline group IV semiconductor is provided. A single crystalline lattice mismatched group IV semiconductor alloy layer is epitaxially grown on a portion of the semiconductor layer, while another portion of the semico... | 08/09/2011 |
| 7989324 | Method for manufacturing silicon on sapphire wafer The present invention provides an SOS wafer comprising a non-transparent polysilicon layer provided on a back surface of a sapphire substrate, a silicon nitride layer which protects the polysilicon layer, and a stress relaxing film which cancels stress produced in t... | 08/02/2011 |
| 7989325 | Method for manufacturing crystalline semiconductor film and method for manufacturing thin film transistor A crystalline semiconductor film is manufactured by a first step in which a crystalline semiconductor film is formed on and in contact with an insulating film and a second step in which the crystalline semiconductor film is grown in a condition where a generation fr... | 08/02/2011 |
| 7981774 | Assembly of quasicrystalline photonic heterostructures A method and system for assembling a quasicrystalline heterostructure. A plurality of particles is provided with desirable predetermined character. The particles are suspended in a medium, and holographic optical traps are used to position the particles in a way to ... | 07/19/2011 |
| 7968434 | Method of forming of a semiconductor film, method of manufacture of a semiconductor device and a semiconductor device This invention provides a method of forming semiconductor films on dielectrics at temperatures below 400° C. Semiconductor films are required for thin film transistors (TFTs), on-chip sensors, on-chip micro-electromechanical systems (MEMS) and monolithic 3D-integra... | 06/28/2011 |
| 7960259 | Semiconductor structure with coincident lattice interlayer A semiconductor structure consistent with certain implementations has a crystalline substrate oriented with a {111} plane surface that is within 10 degrees of surface normal. An epitaxially grown electrically insulating interlayer overlays the crystalline substrate ... | 06/14/2011 |
| 7960258 | Method for fabricating nanoscale thermoelectric device The present invention discloses a method for fabricating a nanoscale thermoelectric device, which comprises steps: providing at least one template having a group of nanoscale pores; forming a substrate on the bottom of the template; injecting a molten semiconductor ... | 06/14/2011 |
| 7943493 | Electrical fuse having a fully silicided fuselink and enhanced flux divergence A contiguous block of a stack of two heterogeneous semiconductor layers is formed over an insulator region such as shallow trench isolation. A portion of the contiguous block is exposed to an etch, while another portion is masked during the etch. The etch removes an... | 05/17/2011 |
| 7915148 | Method of producing a tensioned layer on a substrate A silicon on insulator (SOI) substrate is converted into a strained SOI substrate by first providing an SOI substrate having a thin silicon layer and an insulator and at least one first epitaxial relaxing layer on the SOI-substrate. Then a defect region is produced ... | 03/29/2011 |
| 7910462 | Growing [110] silicon on [001] oriented substrate with rare-earth oxide buffer film An assembly and method of making the same wherein the assembly incorporates a rare-earth oxide film to form a [110] crystal lattice orientation semiconductor film. The assembly comprises a substrate, a rare-earth oxide film formed on the substrate, and a [110]-orien... | 03/22/2011 |
| 7879698 | Integrated process system and process sequence for production of thin film transistor arrays using doped or compounded metal oxide semiconductor The present invention generally relates to an integrated processing system and process sequence that may be used for thin film transistor (TFT) fabrication. In fabricating TFTs, numerous processes may be performed on a substrate to ultimately produce the desired TFT... | 02/01/2011 |
| 7867881 | Method of manufacturing nitride semiconductor substrate A method for manufacturing a nitride semiconductor substrate including the steps of: forming a nitride semiconductor layer on a sapphire substrate, and manufacturing a freestanding nitride semiconductor substrate by using the nitride semiconductor layer separated fr... | 01/11/2011 |
| 7851336 | Method of forming a passivated densified nanoparticle thin film on a substrate A method for forming a passivated densified nanoparticle thin film on a substrate in a chamber is disclosed. The method includes depositing a nanoparticle ink on a first region on the substrate, the nanoparticle ink including a set of Group IV semiconductor particle... | 12/14/2010 |
| 7846819 | Method of synthesizing nanoscale filamentary structures, and electronic components comprising such structures A method of synthesizing electronic components incorporating nanoscale filamentary structures in which method a metallic catalyst is deposited in a nanoporous membrane , the catalyst being adapted to penetrate in at least some of the pores of the nanoporous membrane... | 12/07/2010 |
| 7842586 | Plasma CVD apparatus, method for manufacturing microcrystalline semiconductor layer, and method for manufacturing thin film transistor As an electrode area of a plasma CVD apparatus is enlarged, influence of the surface standing wave remarkably appears, and there is a problem in that in-plane uniformity of quality and a thickness of a thin film formed over a glass substrate is degraded. Two or more... | 11/30/2010 |
| 7833884 | Strained semiconductor-on-insulator by Si:C combined with porous process A method of fabricating a strained semiconductor-on-insulator (SSOI) substrate is provided. The method includes first providing a structure that includes a substrate, a doped and relaxed semiconductor layer on the substrate, and a strained semiconductor layer on the... | 11/16/2010 |
| 7825012 | Method for manufacturing nitride semiconductor device A method for manufacturing a nitride semiconductor device, includes forming a p-type nitride semiconductor layer on a substrate, from an organic metal compound as a group III element source material, ammonia and a hydrazine derivative as group V element source mater... | 11/02/2010 |
| 7820530 | Efficient body contact field effect transistor with reduced body resistance A method for forming a body contacted SOI transistor includes forming a semiconductor layer (103) having a body contact region (120), a body access region (121), and an active region (122). An SOI transistor is formed in the active region... | 10/26/2010 |
| 7816237 | Ultra shallow junction formation by epitaxial interface limited diffusion A method of forming a field effect transistor creates shallower and sharper junctions, while maximizing dopant activation in processes that are consistent with current manufacturing techniques. More specifically, the invention increases the oxygen content of the top... | 10/19/2010 |
| 7772096 | Formation of SOI by oxidation of silicon with engineered porosity gradient A method is provided for making a silicon-on-insulator substrate. Such method can include epitaxially growing a highly p-type doped silicon-containing layer onto a major surface of an underlying semiconductor region of a substrate. Subsequently, a non-highly p-type ... | 08/10/2010 |
| 7759229 | Charge-free method of forming nanostructures on a substrate A charge-free method of forming a nanostructure at low temperatures on a substrate. A substrate that is reactive with one of atomic oxygen and nitrogen is provided. A flux of neutral atoms of least one of oxygen and nitrogen is generated within a laser-sustained-dis... | 07/20/2010 |
| 7759228 | Semiconductor device and method of manufacturing the same A method of manufacturing a semiconductor device. In the method, a substrate is prepared, which includes a buried oxide film and a SiGe layer formed on the buried oxide film. Then, heat treatment is performed on the substrate at a temperature equal to or lower than ... | 07/20/2010 |
| 7749872 | Crystalline-type device and approach therefor Single-crystalline growth is realized using a liquid-phase crystallization approach involving the inhibition of defects typically associated with liquid-phase crystalline growth of lattice mismatched materials. According to one example embodiment, a semiconductor de... | 07/06/2010 |
| 7745313 | Substrate release methods and apparatuses The present disclosure relates to methods and apparatuses for fracturing or breaking a buried porous semiconductor layer to separate a 3-D thin-film semiconductor semiconductor (TFSS) substrate from a 3-D crystalline semiconductor template. The method involves formi... | 06/29/2010 |
| 7745312 | Selective germanium deposition for pillar devices A method of making a pillar device includes providing an insulating layer having an opening, and selectively depositing germanium or germanium rich silicon germanium semiconductor material into the opening to form the pillar device. ... | 06/29/2010 |
| 7737008 | Method for making quantum dots A method for forming at least one quantum dot at at least one predetermined location on a substrate is disclosed. In one aspect, the method comprises providing a layer of semiconductor material on an insulating layer on the substrate. The layer of semiconductor mate... | 06/15/2010 |