"The abolishment of pain in surgery is a chimera. It is absurd to go on seeking it...knife and pain are two words in surgery that must forever be associated in the consciousness of the patient."
Dr. Alfred Velpeau, French surgeon ; 1839
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| Number | Title | Issue Date |
| 8101505 | Programmable electrical fuse The present invention relates to e-fuse devices, and more particularly to a device and method of forming an e-fuse device, the method comprising providing a first conductive layer connected to a second conductive layer, the first and second conductive layers separat... | 01/24/2012 |
| 8030181 | Electrical fuse circuit for security applications A fuse circuit is disclosed, which comprises at least one electrical fuse element having a resistance that changes after being stressed in an electromigration mode, a switching device serially coupled with the electrical fuse element in a predetermined path between ... | 10/04/2011 |
| 7772093 | Method of and circuit for protecting a transistor formed on a die A method of protecting a transistor formed on a die of an integrated circuit is disclosed. The method comprises forming an active region of the transistor on the die; forming a gate of the transistor over the active region; coupling a primary contact to the gate of ... | 08/10/2010 |
| 7759226 | Electrical fuse with sacrificial contact The electrical fuse includes a cathode pad, an anode pad and a fuse link connecting the cathode pad to the anode pad. The cathode pad includes a group of multiple electrical contacts and a solitary electrical contact disposed a predetermined distance from the group ... | 07/20/2010 |
| 7674691 | Method of manufacturing an electrical antifuse An antifuse having a link including a region of unsilicided semiconductor material may be programmed at reduced voltage and current and with reduced generation of heat by electromigration of metal or silicide from a cathode into the region of unsilicided semiconduct... | 03/09/2010 |
| 7642176 | Electrical fuse structure and method An electrical fuse and a process of programming the same are presented. An electrical fuse comprises a lower level silicide layer on a non-doped or lightly-doped polysilicon layer, an upper level conductive layer, and a tungsten contact coupled between the lower lev... | 01/05/2010 |
| 7605059 | Semiconductor device and method of manufacturing the semiconductor device A semiconductor device comprises: a MOS transistor including: a semiconductor substrate; a source region, formed in the semiconductor substrate, that comprises an impurity of a first conductive type; a drain region, formed in the semiconductor substrate, that compri... | 10/20/2009 |
| 7575984 | Conductive hard mask to protect patterned features during trench etch A method is provided for forming patterned features using a conductive hard mask, where the conductive hard mask protects those features during a subsequent trench etch to form Damascene conductors providing electrical connection to those features from above. The th... | 08/18/2009 |
| 7442625 | Apparatus for annealing, method for annealing, and method for manufacturing a semiconductor device An apparatus for annealing a substrate includes a substrate stage having a substrate mounting portion configured to mount the substrate; a heat source having a plurality of heaters disposed under the substrate mounting portion, the heaters individually preheating a ... | 10/28/2008 |
| 7442626 | Rectangular contact used as a low voltage fuse element A repair fuse element and method of construction are disclosed that eliminate or substantially reduce the disadvantages and problems associated with prior fuse elements. In one embodiment, the fuse element is constructed with a rectangular-shaped contact. The contac... | 10/28/2008 |
| 7427802 | Irreversible reduction of the value of a polycrystalline silicon resistor The invention relates to a method and device for the irreversible reduction of the value of an integrated polycrystalline silicon resistor. The inventive method consists in temporarily subjecting the resistor to a stress current which is greater than a current (Im) ... | 09/23/2008 |
| 7413936 | Method of forming copper layers A programmable package with a fuse embedded therein, and fabrication method are provided. The fuse has first and second terminal ends joined by a central portion defining a fusible link. The ends include a portion of the first and second conductive layers, the centr... | 08/19/2008 |
| 7390726 | Switching ratio and on-state resistance of an antifuse programmed below 5 mA and having a Ta or TaN barrier metal layer A metal-to-metal antifuse is disposed between two metal interconnect layers in an integrated circuit. An insulating layer is disposed above a lower metal interconnect layer. The insulating layer includes a via formed therethrough containing a tungsten plug in electr... | 06/24/2008 |
| 7384824 | Structure and programming of laser fuse A method and structure for fabricating a laser fuse and a method for programming the laser fuse. The laser fuse includes a dielectric layer having two vias filled with a first self-passivated electrically conducting material. A fuse link is on top of the dielectric ... | 06/10/2008 |
| 7372714 | Methods and memory structures using tunnel-junction device as control element A memory structure includes a memory storage element electrically coupled to a control element. The control element comprises a tunnel-junction device. The memory storage element may also comprise a tunnel-junction device. Methods for fusing a tunnel-junction device... | 05/13/2008 |
| 7358590 | Semiconductor device and driving method thereof A semiconductor device includes a memory with a simple structure, an inexpensive semiconductor device, a manufacturing method and a driving method thereof. One feature is that, in a memory which has a layer including an organic compound as a dielectric, by applying ... | 04/15/2008 |
| 7352050 | Fuse region of a semiconductor region In a fuse region of a semiconductor device, and a method of fabricating the same, the fuse region includes an interlayer insulating layer on a semiconductor substrate, a plurality of fuses on the interlayer insulating layer disposed in parallel with each other, a bl... | 04/01/2008 |
| 7351613 | Method of trimming semiconductor elements with electrical resistance feedback A method of trimming down the volume of a semiconductor resistor element using electrical resistance feedback. After forming conductive material disposed between a pair of electrodes, a voltage is applied to the electrodes to produce an electrical current through th... | 04/01/2008 |
| 7338843 | Method for producing an electronic component, especially a memory chip A method for producing an electronic component, especially a memory chip, using a laser-induced correction to equalize an integrated circuit by means of at least one laser via in a layer at least partially covering the circuit. The component comprises a rewiring of ... | 03/04/2008 |
| 7333386 | Extraction of a binary code based on physical parameters of an integrated circuit through programming resistors An integrated cell for extracting a binary value based on a value difference between two resistors values, including connection circuitry for a binary reading of the sign of the difference between the resistors, and connection circuitry for a modification of the val... | 02/19/2008 |
| 7323761 | Antifuse structure having an integrated heating element The present invention provides antifuse structures having an integrated heating element and methods of programming the same, the antifuse structures comprising first and second conductors and a dielectric layer formed between the conductors, where one or both of the... | 01/29/2008 |
| 7314815 | Manufacturing method of one-time programmable read only memory An one-time programmable read only memory is provided. An N-type doping region and a first P-type doping layer are disposed in a P-type semiconductor substrate sequentially. A second P-type doping layer is disposed between the first P-type doping layer and the N-typ... | 01/01/2008 |
| 7301204 | SOI component with increased dielectric strength and improved heat dissipation A semiconductor component arrangement comprises a semiconductor substrate of a first conduction type, an insulation layer arranged on the substrate, and a semiconductor layer arranged on the insulation layer. A semiconductor component is formed in said semiconductor... | 11/27/2007 |
| 7272067 | Electrically-programmable integrated circuit antifuses Integrated circuit antifuse circuitry is provided. A metal-oxide-semiconductor (MOS) antifuse transistor serves as an electrically-programmable antifuse. In its unprogrammed state, the antifuse transistor is off and has a relatively high resistance. During programmi... | 09/18/2007 |
| 7268068 | Semiconductor device and manufacturing method thereof A semiconductor device comprises a multiple insulation layer structure in which multiple insulation layers each having interconnection layer are built up and either one of the interconnection layer forming a fuse is blown in order to select a spare cell to relieve a... | 09/11/2007 |
| 7265001 | Methods of fabricating semiconductor devices Disclosed are methods of fabricating a semiconductor device, by which the pad and fuse layers play their roles smoothly and to enhance a quality of a final semiconductor device. According to one example, a disclosed method includes forming an insulating layer coveri... | 09/04/2007 |
| 7266010 | Compact static memory cell with non-volatile storage capability A static random access memory (SRAM) cell includes a SRAM circuit and a programmable resistor connected to a storage node of the SRAM circuit. The SRAM circuit can be any type of SRAM circuit, such as a 3T, negative differential resistance (NDR) transistor-based cir... | 09/04/2007 |
| 7265000 | Vertically stacked field programmable nonvolatile memory and method of fabrication A very high density field programmable memory is disclosed. An array is formed vertically above a substrate using several layers, each layer of which includes vertically fabricated memory cells. The cell in an N level array may be formed with N+1 masking steps plus ... | 09/04/2007 |
| 7242072 | Electrically programmable fuse for silicon-on-insulator (SOI) technology A fuse structure and method of forming the same is described, wherein the body of the fuse is formed from a crystalline semiconductor body on an insulator, preferably of a silicon-on-insulator wafer, surrounded by a fill-in dielectric. The fill-in dielectric is pref... | 07/10/2007 |
| 7232711 | Method and structure to prevent circuit network charging during fabrication of integrated circuits An integrated circuit and method of fabricating the integrated circuit. The integrated circuit, including: one or more power distribution networks; one or more ground distribution networks; one or more data networks; and fuses temporarily and electrically connecting... | 06/19/2007 |
| 7227238 | Integrated fuse with regions of different doping within the fuse neck An integrated fuse has regions of different doping located within a fuse neck. The integrated fuse includes a polysilicon layer and a silicide layer. The polysilicon layer includes first and second regions having different types of dopants. In one example, the first... | 06/05/2007 |
| 7211843 | System and method for programming a memory cell The present invention relates to systems and methods for programming a memory cell. More specifically, the present invention relates to a controlled application of current to a memory cell over a controlled time period. The invention utilizes a current mirror config... | 05/01/2007 |
| 7205631 | Poly-silicon stringer fuse A polysilicon silicide stringer fuse is constructed having a narrow width by using an overlay tolerance of the photo stepper tool instead of the minimum critical dimension tolerance of the stepper tool. In an example embodiment, a fuse (200) for integration w... | 04/17/2007 |
| 7206215 | Antifuse having tantalum oxynitride film and method for making same A capacitor has a tantalum oxynitride film. One method for making the film comprises forming a bottom plate electrode and then forming a tantalum oxide film on the bottom plate electrode. Nitrogen is introduced to form a tantalum oxynitride film. A top plate electro... | 04/17/2007 |
| 7200063 | Circuitry for a programmable element As part of anti-fuse circuitry for a memory device, a preferred exemplary embodiment of the current invention provides a direct connection between an anti-fuse and a contact pad used to provide voltage to that anti-fuse. The contact pad also serves as a voltage sour... | 04/03/2007 |
| 7183141 | Reversible field-programmable electric interconnects A programmable interconnect structure and method of operating the same provides a programmable interconnection between electrical contacts. The interconnect includes material that has a reversibly programmable resistance. The material includes a molecular matrix wit... | 02/27/2007 |
| 7180154 | Integrated circuit devices having corrosion resistant fuse regions and methods of fabricating the same Integrated circuit devices are provided including an integrated circuit substrate and first through fourth spaced apart lower interconnects on the integrated circuit substrate. The third and fourth spaced apart lower interconnects are parallel to the first and secon... | 02/20/2007 |
| 7176065 | Magnetic tunneling junction antifuse device An MRAM device having a plurality of MRAM cells formed of a fixed magnetic layer, a second soft magnetic layer and a dielectric layer interposed between the fixed magnetic layer and the soft magnetic layer. The MRAM cells are all formed simultaneously and at least s... | 02/13/2007 |
| 7176064 | Memory cell comprising a semiconductor junction diode crystallized adjacent to a silicide A memory cell is formed of a semiconductor junction diode in series with an antifuse. The cell is programmed by rupture of the antifuse. The semiconductor junction diode comprises silicon, the silicon crystallized in contact with a silicide. The suicide apparently p... | 02/13/2007 |
| 7167408 | Circuitry for a programmable element As part of anti-fuse circuitry for a memory device, a preferred exemplary embodiment of the current invention provides a direct connection between an anti-fuse and a contact pad used to provide voltage to that anti-fuse. The contact pad also serves as a voltage sour... | 01/23/2007 |