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...During the Civil War, the Confederacy established its own Patent Office which issued 266 patents, a third of which concerned implements of war.
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| Number | Title | Issue Date |
| 7915143 | Method of mediating forward voltage drift in a SiC device A method of reversing Shockley stacking fault expansion includes providing a bipolar or a unipolar SiC device exhibiting forward voltage drift caused by Shockley stacking fault nucleation and expansion. The SiC device is heated to a temperature above 150° C. A curr... | 03/29/2011 |
| 7879692 | Programmable resistive memory cell with self-forming gap A memory device has a first electrode, a second electrode, and memory material defining an inter-electrode current path between the first electrode and the second electrode. A gap is formed by shrinkage of the shrinkable material between the memory material and a sh... | 02/01/2011 |
| 7858500 | Low threshold voltage semiconductor device with dual threshold voltage control means A semiconductor structure, particularly a pFET, which includes a dielectric material that has a dielectric constant of greater than that of SiO2 and a Ge or Si content of greater than 50% and at least one other means for threshold/flatband voltage tuning ... | 12/28/2010 |
| 7759225 | Method for fabricating semiconductor layer and light-emitting diode A semiconductor layer containing defects only in a small density, possessing good quality and exhibiting a large ionic bonding property as to GaN, for example, is formed on a semiconductor layer, such as a silicon carbide layer, which is made of a material possessin... | 07/20/2010 |
| 7749868 | Process of forming a curved profile on a semiconductor substrate A semiconductor substrate shaped to have a curved surface profile by anodization. Prior to being anodized, the substrate is finished with an anode pattern on its bottom surface so as to be consolidated into a unitary structure in which the anode pattern is precisely... | 07/06/2010 |
| 7611969 | Generation and applications of negative dielectric constant materials A negative dielectric is induced by the application of a dc bias-electric field in aggregates of oxide nano-particles whose surfaces have been specially treated. The magnitude of the dielectric constant and the frequency where the negative dielectric constant occurs... | 11/03/2009 |
| 7563696 | Semiconductor device manufacturing apparatus and semiconductor device manufacturing method A semiconductor device manufacturing apparatus which uses a thermal CVD reaction to deposit a film onto a substrate has a ring with an electrode terminal that makes contact with either the substrate or the deposited film thereon, a power supply that applies a curren... | 07/21/2009 |
| 7501328 | Methods for electrochemically fabricating structures using adhered masks, incorporating dielectric sheets, and/or seed layers that are partially removed via planarization Embodiments of the present invention provide mesoscale or microscale three-dimensional structures (e.g. components, device, and the like). Embodiments relate to one or more of (1) the formation of such structures which incorporate sheets of dielectric material and/o... | 03/10/2009 |
| 7427802 | Irreversible reduction of the value of a polycrystalline silicon resistor The invention relates to a method and device for the irreversible reduction of the value of an integrated polycrystalline silicon resistor. The inventive method consists in temporarily subjecting the resistor to a stress current which is greater than a current (Im) ... | 09/23/2008 |
| 7402182 | High-power LGA socket A system for providing electrical contacts between a die and an electrical device includes a die and a package. The package includes a first major surface, a second major surface, a first scalloped edge, a second scalloped edge and a solid end adapted for insertion ... | 07/22/2008 |
| 7367119 | Method for forming a reinforced tip for a probe storage device Systems and methods in accordance with the present invention can include a tip contactable with a media. In an embodiment, the tip comprises a substantially hollow structure formed of a metal. The tip can be formed by depositing a first metal layer over silicon ther... | 05/06/2008 |
| 7365399 | Structure and method to form semiconductor-on-pores (SOP) for high device performance and low manufacturing cost A semiconducting material that has all the advantages of prior art SOI substrates including, for example, low parasitic capacitance and leakage, without having floating body effects is provided. More specifically, the present invention provides a Semiconductor-on-Po... | 04/29/2008 |
| 7364952 | Systems and methods for processing thin films The present disclosure is directed to methods and systems for processing a thin film samples. In an exemplary method, semiconductor thin films are loaded onto two different loading fixtures, laser beam pulses generated by a laser source system are split into first l... | 04/29/2008 |
| 7364937 | Vertical elevated pore phase change memory A vertical elevated pore structure for a phase change memory may include a pore with a lower electrode beneath the pore contacting the phase change material in the pore. The lower electrode may be made up of a higher resistivity lower electrode and a lower resistivi... | 04/29/2008 |
| 7336524 | Atomic probes and media for high density data storage A device in accordance with embodiments of the present invention comprises a contact probe for high density data storage reading, writing, erasing, or rewriting. In one embodiment, the contact probe can include a silicon core having a conductive coating. Contact pro... | 02/26/2008 |
| 7332377 | Manufacturing method with self-aligned arrangement of solid body electrolyte memory cells of minimum structure size The object of providing a method for manufacturing solid body electrolyte memory cells or CB memory cells, respectively, which is suited for the simplified manufacturing of highly dense arrays with crosspoint architecture is solved by the present invention in that t... | 02/19/2008 |
| 7326951 | Chalcogenide random access memory A chalcogenide random access memory (CRAM) is provided. The CRAM includes a substrate, a first dielectric layer, a bottom electrode, a top electrode, a second dielectric layer, a modified chalcogenide spacer and an un-modified chalcogenide thin film. The first diele... | 02/05/2008 |
| 7323708 | Phase change memory devices having phase change area in porous dielectric layer A phase change memory device includes a lower electrode and a porous dielectric layer having fine pores on the lower electrode. A phase change layer is provided in the fine pores of the porous dielectric layer. An upper electrode is provided on the phase change laye... | 01/29/2008 |
| 7323218 | Synthesis of composite nanofibers for applications in lithium batteries Methods of fabricating one-dimensional composite nanofiber on a template membrane with porous array by chemical or physical process are disclosed. The whole procedures are established under a base concept of “secondary template”. First of all, tubular first nano... | 01/29/2008 |
| 7314781 | Device packages having stable wirebonds A method of making a packaged electrical device comprises the steps of (a) connecting one end of a wire to a first point (e.g., a first electrical node) in the package, and (b) connecting the other end of the wire to a second point (e.g., a second electrical node) i... | 01/01/2008 |
| 7309630 | Method for forming patterned media for a high density data storage device Systems in accordance with the present invention can include a tip contactable with a media, the media including a substrate and a plurality of cells disposed over the substrate, one or more of the cells being electrically isolated from the other of the cells by a m... | 12/18/2007 |
| 7307267 | Electric device with phase change material and parallel heater The electric device (1, 100) has a body (2, 102) having a resistor (7, 107) comprising a phase change material being changeable between a first phase and a second phase. The resistor (7, 107) has a first electrical resistance when the pha... | 12/11/2007 |
| 7301887 | Methods for erasing bit cells in a high density data storage device Methods in accordance with the present invention can be applied, in an embodiment, to a media comprising a phase change material to alter a resolved portion of the phase change material to have a resistance different from a resistance of the bulk material. A tip hav... | 11/27/2007 |
| 7294560 | Method of assembling one-dimensional nanostructures A method provides a simple yet reliable technique to assemble one-dimensional nanostructures selectively in a desired pattern for device applications. The method comprises forming a plurality of spaced apart conductive elements (12, 20) in a sequential patter... | 11/13/2007 |
| 7276172 | Method for preparing a nanowire crossbar structure and use of a structure prepared by this method The present invention relates to a method for preparing a nanowire crossbar structure, comprising: (a) providing a substrate; (b) depositing thereon a composite structure comprising a nucleic acid-block copolymer having equidistant nucleic acid-catalyst binding site... | 10/02/2007 |
| 7273809 | Method of fabricating a conductive path in a semiconductor device A method for fabricating an ultra-small electrode or plug contact for use in chalcogenide memory cells specifically, and in semiconductor devices generally, in which disposable spacers are utilized to fabricate ultra-small pores into which the electrodes are formed.... | 09/25/2007 |
| 7270012 | Semiconductor device embedded with pressure sensor and manufacturing method thereof The method for promoting the size reduction, the performance improvement and the reliability improvement of a semiconductor device embedded with pressure sensor is provided. In a semiconductor device embedded with pressure sensor, a part of an uppermost wiring is us... | 09/18/2007 |
| 7271440 | Method and apparatus for forming an integrated circuit electrode having a reduced contact area A method and an apparatus for manufacturing a memory cell having a non-volatile resistive memory element with a limited size active area. The method comprises a first step of providing a dielectric volume and forming a plug opening within the dielectric volume. A re... | 09/18/2007 |
| 7271403 | Isolating phase change memory devices A phase change memory may be made using an isolation diode in the form of a Schottky diode between a memory cell and a word line. The use of Schottky diode isolation devices may make the memory more scaleable in some embodiments. ... | 09/18/2007 |
| 7259040 | Process for manufacturing a phase change memory array in Cu-damascene technology and phase change memory array manufactured thereby A process for manufacturing a phase change memory array, includes the steps of: forming a plurality of PCM cells, arranged in rows and columns; and forming a plurality of resistive bit lines for connecting PCM cells arranged on a same column, each resistive bit line... | 08/21/2007 |
| 7256140 | Higher selectivity, method for passivating short circuit current paths in semiconductor devices Certain modifications and additions to the prior art short passivation technique have lead to improvements in the low light voltage of solar cells which are made using the improved passivation technique. Examples of the modifications include: ... | 08/14/2007 |
| 7250729 | Method of spark-processing silicon and resulting materials The subject invention pertains to a method of spark processing silicon and resulting materials. The subject invention also relates to electroluminescent devices incorporating the materials produced by the subject method. The subject method for spark-processing can e... | 07/31/2007 |
| 7247876 | Three dimensional programmable device and method for fabricating the same A three-dimensional memory device having polycrystalline silicon diode isolation elements for phase change memory cells and method for fabricating the same. The memory device includes a plurality of stacked memory cells to form a three-dimensional memory array. The ... | 07/24/2007 |
| 7223627 | Memory element and its method of formation A method for controlling silver doping of a chalcogenide glass in a resistance variable memory element is disclosed herein. The method includes forming a thin metal containing layer having a thickness of less than about 250 Angstroms over a second chalcogenide glass... | 05/29/2007 |
| 7223611 | Fabrication of nanowires This disclosure relates to a system and method for creating nanowires. A nanowire can be created by exposing layers of material in a superlattice and dissolving and transferring material from edges of the exposed layers onto a substrate. The nanowire can also be cre... | 05/29/2007 |
| 7223688 | Single level metal memory cell using chalcogenide cladding An apparatus including a volume of phase change material disposed between a first conductor and a second conductor on a substrate, and a plurality of electrodes coupled to the volume of phase change material and the first conductor. A method including introducing, o... | 05/29/2007 |
| 7220657 | Semiconductor wafer and semiconductor device provided with columnar electrodes and methods of producing the wafer and device A semiconductor wafer provided with columnar electrodes which have plated nickel, palladium, and gold films successively formed at the top thereof, or have a plated solder film at their top. The semiconductor wafer can be preferably used for producing a chip-sized s... | 05/22/2007 |
| 7217945 | Method to selectively increase the top resistance of the lower programming electrode in a phase-change memory cell and structures obtained thereby The present invention relates to a process of forming a phase-change memory. A lower electrode is disposed in a first dielectric film. The lower electrode comprises an upper section and a lower section. The upper section extends beyond the first dielectric film. Res... | 05/15/2007 |
| 7217592 | Method of magnetic field assisted self-assembly A method for assembling and integrating microstructures (pills) onto a substrate. A plurality of patterned recesses are formed on the substrates, the recesses having transverse cross-sections and openings of specific shapes. A hard magnetic layer is deposited at the... | 05/15/2007 |
| 7214557 | Light receiving or light emitting modular sheet and process for producing the same A light receiving or light emitting modular sheet having a plurality of spherical elements arranged in matrix. It is constituted only of acceptable spherical elements and photoelectric conversion efficiency thereof is enhanced. The light receiving modular she... | 05/08/2007 |
