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| Number | Title | Issue Date |
| 8183130 | Semiconductor device and method of forming shielding layer around back surface and sides of semiconductor wafer containing IPD structure A semiconductor wafer has an insulating layer over a first surface of the substrate. An IPD structure is formed over the insulating layer. The IPD structure includes a MIM capacitor and inductor. A conductive via is formed through a portion of the IPD structure and ... | 05/22/2012 |
| 8183129 | Alignment marks for polarized light lithography and method for use thereof Mark and method for integrated circuit fabrication with polarized light lithography. A preferred embodiment comprises a first plurality of elements comprised of a first component type, wherein the first component type has a first polarization, and a second plurality... | 05/22/2012 |
| 8178422 | Method of measurement in semiconductor fabrication Provided is a method of fabricating a semiconductor device. The method includes providing a device substrate having a front side and a back side, the device substrate having a first refractive index, forming an embedded target over the front side of the device subst... | 05/15/2012 |
| 8178421 | Method of fabricating semiconductor device A method of manufacturing a semiconductor device capable of preventing a cut portion from becoming chipped when dicing. The method of manufacturing a semiconductor device includes preparing a semiconductor wafer having an upper surface (first surface) including a pl... | 05/15/2012 |
| 8163629 | Metallization for chip scale packages in wafer level packaging In one embodiment, a method for forming the semiconductor device includes forming a first trench from a front side of a substrate. The substrate has a front side and an opposite back side, and the first trench having sidewalls and a bottom surface. A insulator layer... | 04/24/2012 |
| 8158492 | MEMS microphone with cavity and method therefor A device comprises a substrate, a micro electro-mechanical systems (MEMS) structure, and a dielectric film. The substrate has a first side and a second side, the second side opposite the first side. The MEMS structure is formed on the first side of the substrate. Th... | 04/17/2012 |
| 8148239 | Offset field grid for efficient wafer layout Techniques are provided for efficient wafer layout, which include the use of an offset grid to optimize use of available wafer space. As such, the number of identical die that can be fabricated on the wafer can be increased, relative to a standard perpendicular grid... | 04/03/2012 |
| 8129259 | Manufacturing method of preparing a substrate with forming and removing the check patterns in scribing regions before dicing to form semiconductor device A disclosed device includes a manufacturing method of semiconductor device including preparing a semiconductor substrate including semiconductor chip forming regions, scribing regions surrounding these regions, and cutting regions formed in the scribing regions and ... | 03/06/2012 |
| 8119501 | Method for separating a semiconductor wafer into individual semiconductor dies using an implanted impurity Provided is a method for separating a semiconductor wafer into individual semiconductor dies. The method for separating the semiconductor wafer, among other steps, may include implanting an impurity into regions of a semiconductor wafer proximate junctions where sem... | 02/21/2012 |
| 8110481 | Method of segmenting semiconductor wafer To provide a method of segmenting a semiconductor wafer, which is capable of preventing chippings. A semiconductor wafer 1 is partitioned into a circumferential ring-shaped region 1a and a segmentation region placed in the inner side of t... | 02/07/2012 |
| 8088673 | Semiconductor chip having island dispersion structure and method for manufacturing the same The present invention has an object to provide a semiconductor chip of high reliability with less risk of breakage. Specifically, the present invention provides a semiconductor chip having a semiconductor silicon substrate including a semiconductor device layer and ... | 01/03/2012 |
| 8084334 | Semiconductor device manufacturing method comprising a metal pattern and laser modified regions in a cutting region To divide a semiconductor wafer by stealth dicing, a test pad in a cutting region and an alignment target are collectively arranged along one side in a width direction of the cutting region, and a laser beam for forming a modified region is irradiated to a position ... | 12/27/2011 |
| 8080465 | Semiconductor wafer structure with balanced reflectance and absorption characteristics for rapid thermal anneal uniformity Disclosed are embodiments of semiconductor wafer structures and associated methods of forming the structures with balanced reflectance and absorption characteristics. The reflectance and absorption characteristics are balanced by manipulating thin film interferences... | 12/20/2011 |
| 8062960 | Compound semiconductor device and method of manufacturing compound semiconductor device The present invention provides a method of manufacturing a compound semiconductor device capable of improving yield when a wafer is divided into device regions. The method of manufacturing a compound semiconductor device includes a division step. The division step i... | 11/22/2011 |
| 8053336 | Method for reducing chip warpage A method of forming an integrated circuit structure including providing a wafer comprising a front surface and a back surface, wherein the wafer comprises a chip; forming an opening extending from the back surface into the chip; filling an organic material in the op... | 11/08/2011 |
| 8053337 | Method of manufacturing semiconductor device In a method of manufacturing a semiconductor device, a first groove and a second groove each having a width less than that of a scribe line are formed along the scribe line in a first protective film provided below a second protective film which protects element for... | 11/08/2011 |
| 8048778 | Methods of dicing a semiconductor structure An embodiment of the disclosure includes a method of dicing a semiconductor structure. A device layer on a semiconductor substrate is provided. The device layer has a first chip region and a second chip region. A scribe line region is between the first chip region a... | 11/01/2011 |
| 8039367 | Scribe line structure and method for dicing a wafer A scribe line structure is disclosed. The scribe line structure includes a semiconductor substrate having a die region, a die seal ring region, disposed outside the die region, a scribe line region disposed outside the die seal ring region and a dicing path formed o... | 10/18/2011 |
| 8039365 | Integrated circuit package system including wafer level spacer An integrated circuit package system that includes providing a wafer level spacer including apertures, which define unit spacers that are interconnected, and configuring the unit spacers to substantially align over devices formed within a substrate. ... | 10/18/2011 |
| 8039366 | Method for providing rotationally symmetric alignment marks for an alignment system that requires asymmetric geometric layout A method and apparatus includes an integrated circuit device, and at least one alignment mark on the integrated circuit device, the alignment mark comprises a first coded region, a second coded region adjacent the first coded region, and a third coded region adjacen... | 10/18/2011 |
| 8030180 | Method of manufacturing a semiconductor device A semiconductor device is manufactured in a silicon-on-insulator (SOI) wafer having an silicon active layer, a buried oxide layer, and a supporting substrate layer. Before the wafer is diced into chips along scribe lines, the silicon active layer is selectively etch... | 10/04/2011 |
| 8026153 | Wafer processing method A wafer processing method of dividing a wafer into individual devices, the wafer having on a front surface a device area and an external circumferential redundant area surrounding the device area, the method including: a wafer grinding step in which, in the state wh... | 09/27/2011 |
| 8021965 | Inter-chip communication The present invention provides a quilt packaging system for microchip, a method for making such a quilt packaging system, microchips that may be used in a such a quilt packaging system, and methods for making such microchips. ... | 09/20/2011 |
| 8017503 | Manufacturing method of semiconductor package A manufacturing method includes forming a semi-cured insulation layer made of a photosensitive material on a supporting body; forming an opening part in the insulation layer by a photolithography method, the opening part being configured to expose the supporting bod... | 09/13/2011 |
| 8017502 | Wafer system with partial cuts A wafer system is provided including providing a wafer having a topside and a backside, forming a partial cut from the topside of the wafer within a wafer rim and thinning the wafer from the backside for exposing the partial cut at the backside within the wafer rim.... | 09/13/2011 |
| 8012857 | Semiconductor die singulation method In one embodiment, semiconductor die are singulated from a semiconductor wafer by etching openings completely through the semiconductor wafer. ... | 09/06/2011 |
| 7998839 | Semiconductor device and method for manufacturing the same A semiconductor device wherein destruction of a sealing ring caused by cracking of an interlayer dielectric film is difficult to occur, as well as a method for manufacturing the semiconductor device, are provided. A first laminate comprises first interlayer dielectr... | 08/16/2011 |
| 7989319 | Semiconductor die singulation method In one embodiment, semiconductor die are singulated from a semiconductor wafer by etching openings completely through the semiconductor wafer. ... | 08/02/2011 |
| 7985661 | Semiconductor die singulation method In one embodiment, semiconductor die are singulated from a semiconductor wafer by etching openings completely through the semiconductor wafer. ... | 07/26/2011 |
| 7972940 | Wafer processing Methods, devices, and systems for wafer processing are described herein. One method of wafer processing includes modifying a peripheral edge of a wafer to create a number of edge surfaces substantially perpendicular to a number of dicing paths and dicing the wafer a... | 07/05/2011 |
| 7968431 | Diffusion region routing for narrow scribe-line devices The present disclosure provides a method of making an integrated circuit (IC) device. The method includes forming a first IC feature and a second IC feature in a semiconductor substrate, the first and second IC features being spaced from each other and separated by ... | 06/28/2011 |
| 7960250 | Method for manufacturing device A method for manufacturing a device, in which a wafer having a plurality of devices formed on the face thereof is divided into the individual devices, and an adhesive film is mounted on the back side of each device. This method comprises: a cutting groove forming st... | 06/14/2011 |
| 7955952 | Crackstop structures and methods of making same An integrated circuit chip and a method of fabricating an integrated circuit chip. The integrated circuit chip includes: a continuous first stress ring proximate to a perimeter of the integrated circuit chip, respective edges of the first stress ring parallel to res... | 06/07/2011 |
| 7951691 | Method for producing a thin semiconductor chip comprising an integrated circuit In a method for producing a thin film chip including an integrated circuit, a semi-conductor wafer having a first surface is provided. At least one cavity is produced under a defined section of the first surface by means of porous silicon. A circuit structure is pro... | 05/31/2011 |
| 7927973 | Method for dividing semiconductor wafer and manufacturing method for semiconductor devices In a semiconductor wafer including a plurality of imaginary-divided-regions which are partitioned by imaginary-dividing-lines that are respectively arranged in a grid-like arrangement on the semiconductor wafer and a circumferential line that is the outer periphery ... | 04/19/2011 |
| 7923350 | Method of manufacturing a semiconductor device including etching to etch stop regions A method of manufacturing a semiconductor device. The method includes providing a wafer having a first face and a second face opposite the first face, selectively doping the wafer via the first face to selectively form etch stop regions in the wafer and etching the ... | 04/12/2011 |
| 7915141 | Deterministic generation of an integrated circuit identification number The generation of an identification number of a chip supporting at least one integrated circuit, including the step of causing a cutting of at least one conductive section by cutting of the chip among several first conductive sections parallel to one another and per... | 03/29/2011 |
| 7915140 | Fabrication method for device having die attach film on the back side thereof A device fabrication method for fabricating individual devices from a wafer, wherein the back side of each device is covered with an adhesive film for die bonding. The device fabrication method includes a wafer dividing step of dividing the wafer into the individual... | 03/29/2011 |
| 7906410 | Method of manufacturing semiconductor chip using laser light and plasma dicing In a method in which a semiconductor wafer 1 having integrated circuits 3 formed in a plurality of chip regions and test patterns 4 formed in scribe lines 2a is divided by a plasma etching process so as to manufacture individual se... | 03/15/2011 |
| 7897485 | Wafer processing including forming trench rows and columns at least one of which has a different width Methods for processing semiconductor wafers are described herein. One embodiment includes removing portions of a first side of the semiconductor wafer to form a number of trenches of a particular depth in rows and columns. The method further includes forming a passi... | 03/01/2011 |
