Did You Know...
...that after Parker Brothers executives turned down the game of Monopoly because it had "52 fundamental errors" (including taking too long to play), a copy of the game wound up in the home of the company president who stayed up until 1 a.m. to finish playing it? He was so impressed by the game that the next day he wrote to inventor Charles Darrow and offered to buy it!
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| Number | Title | Issue Date |
| 8183127 | Method for bonding wafers to produce stacked integrated circuits A basic building block for wafer scale stacked integrated circuits is disclosed. The building block includes an integrated circuit device having an integrated circuit substrate having a circuit layer sandwiched between a buffer layer and a dielectric layer. The diel... | 05/22/2012 |
| 8183126 | Patterning embedded control lines for vertically stacked semiconductor elements Various embodiments of the present invention are generally directed to an apparatus with embedded (bottom side) control lines for vertically stacked semiconductor elements, and a method for forming the same. In accordance with various embodiments, a first semiconduc... | 05/22/2012 |
| 8173518 | Method of wafer bonding Provided is a method of fabricating a semiconductor device. The method includes providing a device substrate having a front side, a back side, and a first edge portion, forming a material layer over a portion of the front side of the device substrate, trimming the f... | 05/08/2012 |
| 8168509 | Etching methods and methods of manufacturing a CMOS image sensor using the same In an etching method, a thin layer is formed on a first surface of a first substrate doped with first impurities having a first doping concentration. The thin layer is doped with second impurities having a second doping concentration lower than the first doping conc... | 05/01/2012 |
| 8158489 | Formation of TSV backside interconnects by modifying carrier wafers An integrated circuit structure includes a semiconductor wafer, which includes a first notch extending from an edge of the semiconductor wafer into the semiconductor wafer. A carrier wafer is mounted onto the semiconductor wafer. The carrier wafer has a second notch... | 04/17/2012 |
| 8153506 | Semiconductor device and method of manufacturing the same It is provided a contacting method when a plurality of films to be peeled are laminating. Reduction of total layout area, miniaturization of a module, weight reduction, thinning, narrowing a frame of a display device, or the like can be realized by sequentially lami... | 04/10/2012 |
| 8153504 | Process for manufacturing a composite substrate The invention relates to a process for manufacturing a composite substrate comprising bonding a first substrate onto a second semiconducting substrate, characterized in that the process includes, before bonding, the formation of a bonding layer between the first and... | 04/10/2012 |
| 8153505 | Method for low temperature bonding and bonded structure A method for bonding at low or room temperature includes steps of surface cleaning and activation by cleaning or etching. The method may also include removing by-products of interface polymerization to prevent a reverse polymerization reaction to allow room temperat... | 04/10/2012 |
| 8153503 | Protection of cavities opening onto a face of a microstructured element The invention relates to a method for protecting the interior of at least one cavity (4) having a portion of interest (5) and opening onto a face of a microstructured element (1), consisting of depositing, on said face, a nonconformal layer (... | 04/10/2012 |
| 8148236 | Display device and method for manufacturing thereof An object is to provide a system-on-panel display device including a display portion and a peripheral circuit for controlling display on the display portion over one substrate, which can operate more accurately. The display device has a display portion provided with... | 04/03/2012 |
| 8138061 | Quasi-hydrophobic Si-Si wafer bonding using hydrophilic Si surfaces and dissolution of interfacial bonding oxide The present invention provides a method for removing or reducing the thickness of ultrathin interfacial oxides remaining at Si—Si interfaces after silicon wafer bonding. In particular, the invention provides a method for removing ultrathin interfacial oxides remai... | 03/20/2012 |
| 8138062 | Electrical coupling of wafer structures A method for electrically coupling a first wafer with a second wafer is provided. The method includes bonding the first wafer with the second wafer using a bonding material. The method further includes forming an opening in the first wafer in a scribe area of the se... | 03/20/2012 |
| 8129255 | Firm, insulating and electrically conducting connection of processed semiconductor wafers The invention relates to a process for and an arrangement of the connection of processed semiconductor wafers (1, 2) wherein, in addition to the firm connection, there is an electric connection (5) between the semiconductor wafers and/or the electronic... | 03/06/2012 |
| 8129256 | 3D integrated circuit device fabrication with precisely controllable substrate removal A method is provided for fabricating a 3D integrated circuit structure. According to the method, a first active circuitry layer wafer is provided. The first active circuitry layer wafer comprises a P+ portion covered by a P− layer, and the P− layer includes acti... | 03/06/2012 |
| 8119497 | Thin embedded active IC circuit integration techniques for flexible and rigid circuits A flexible electronic circuit member formed of a plurality of dielectric layers includes a plurality of thinned semiconductor chips embedded within the circuit member for increased levels of integration and component density. The thinned semiconductor chips may incl... | 02/21/2012 |
| 8114757 | Semiconductor device and structure A method of manufacturing a semiconductor wafer, the method comprising providing a base wafer comprising a semiconductor substrate; preparing a first monocrystalline layer comprising semiconductor regions; performing a first layer transfer of the first monocrystalli... | 02/14/2012 |
| 8105915 | Semiconductor device and method of forming vertical interconnect structure between non-linear portions of conductive layers A semiconductor device is made by forming a first conductive layer over a first temporary carrier having rounded indentations. The first conductive layer has a non-linear portion due to the rounded indentations. A bump is formed over the non-linear portion of the fi... | 01/31/2012 |
| 8101498 | Bonded intermediate substrate and method of making same An intermediate substrate includes a handle substrate bonded to a thin layer suitable for epitaxial growth of a compound semiconductor layer, such as a III-nitride semiconductor layer. The handle substrate may be a metal or metal alloy substrate, such as a molybdenu... | 01/24/2012 |
| 8101499 | Formation of TSV backside interconnects by modifying carrier wafers An integrated circuit structure includes a semiconductor wafer, which includes a first notch extending from an edge of the semiconductor wafer into the semiconductor wafer. A carrier wafer is mounted onto the semiconductor wafer. The carrier wafer has a second notch... | 01/24/2012 |
| 8097523 | Method for manufacturing bonded wafer A method for manufacturing a bonded wafer, including at least implanting at least one type of gas ion selected from a hydrogen ion and a rare gas ion from a surface of a bond wafer to form an ion-implanted layer in the wafer, bonding an ion-implanted surface of the ... | 01/17/2012 |
| 8062957 | Semiconductor substrate surface preparation method The invention relates to a method for preparing a surface of a semiconductor substrate by oxidizing the surface of the semiconductor substrate to thereby transform the natural oxide into an artificial oxide and then removing the artificial oxide, in particular to ob... | 11/22/2011 |
| 8062956 | Semiconductor on insulator and methods of forming same using temperature gradient in an anodic bonding process Methods and apparatus for producing a semiconductor on glass (SOG) structure include: bringing a first surface of a glass substrate into direct or indirect contact with a semiconductor wafer; heating at least one of the glass substrate and the semiconductor wafer su... | 11/22/2011 |
| 8058142 | Bonded semiconductor structure and method of making the same A bonded semiconductor structure static random access memory circuit includes a support substrate which carries a first horizontally oriented transistor, and an interconnect region which includes a conductive line. The memory circuit includes a donor substrate which... | 11/15/2011 |
| 8053330 | Quasi-hydrophobic Si-Si wafer bonding using hydrophilic Si surfaces and dissolution of interfacial bonding oxide The present invention provides a method for removing or reducing the thickness of ultrathin interfacial oxides remaining at Si—Si interfaces after silicon wafer bonding. In particular, the invention provides a method for removing ultrathin interfacial oxides remai... | 11/08/2011 |
| 8053329 | Method for low temperature bonding and bonded structure A method for bonding at low or room temperature includes steps of surface cleaning and activation by cleaning or etching. The method may also include removing by-products of interface polymerization to prevent a reverse polymerization reaction to allow room temperat... | 11/08/2011 |
| 8048766 | Integrated circuit on high performance chip A method of fabricating a die containing an integrated circuit, including active components and passive components, includes producing a first substrate containing at least one active component of active components and a second substrate containing critical componen... | 11/01/2011 |
| 8048768 | Joined wafer, fabrication method thereof, and fabrication method of semiconductor devices A method of fabricating a joined wafer has an exposure process which comprises a device formed-area exposure process of exposing by a stepper such that parts of the photosensitive adhesive layer formed over a surface of the transparent wafer or the device formed waf... | 11/01/2011 |
| 8048767 | Bonded wafer and method for producing bonded wafer A bonded wafer is produced by directly bonding a silicon wafer for active layer and a silicon wafer for support substrate without an insulating film and thinning the silicon wafer for active layer to a given thickness, in which a silicon wafer cut out from an ingot ... | 11/01/2011 |
| 8043935 | Method for manufacturing semiconductor substrate and method for manufacturing semiconductor device An object is to manufacture a semiconductor substrate having a single crystal semiconductor layer with favorable characteristics, without requiring CMP treatment and/or heat treatment at high temperature. In addition, another object is to improve productivity of sem... | 10/25/2011 |
| 8039361 | Multilayered semiconductor wafer and process for manufacturing the same The invention relates to a process for manufacturing a multilayered semiconductor wafer comprising a handle wafer (5) and a layer (40) comprising silicon carbide bonded to the handle wafer (5), the process comprising the steps of: a) providing a... | 10/18/2011 |
| 8039360 | Method of assembling integrated circuit components The disclosure identified as methods of mounting integrated circuits, including solar cells, to a substrate wherein the circuits are mounted prior to being singulated into discrete die. Once the semiconductor die sites or other circuits are formed on a wafer, the wa... | 10/18/2011 |
| RE42830 | Method for separating a device-forming layer from a base body A porous Si layer is formed on a single-crystal Si substrate, and then a p+-type Si layer, p-type Si layer and n+-type Si layer which all make up a solar cell layer. After a protective film is made on the n+-type Si layer, the rear s... | 10/11/2011 |
| 8030175 | Method of bonding selected integrated circuit to adhesive substrate A method of bonding an integrated circuit to an adhesive substrate. The integrated circuit is one of a plurality of integrated circuits, each having a respective frontside releasably attached to a film frame tape supported by a wafer film frame. The method includes ... | 10/04/2011 |
| 8030174 | Method for manufacturing SOI substrate An object is to provide a method for manufacturing an SOI substrate, by which defective bonding can be prevented. An embrittled layer is formed in a region of a semiconductor substrate at a predetermined depth; an insulating layer is formed over the semiconductor su... | 10/04/2011 |
| 8021960 | Method for manufacturing semiconductor device A chip provided with a layer for separation of a surface region and a hydrophilic surface is manufactured. One or both of a hydrophilic region and a hydrophobic region are formed on a substrate surface where the chip is placed. Liquid is dropped onto the hydrophilic... | 09/20/2011 |
| 8021959 | Method for the ultrasonic planarization of a substrate, from one surface of which a buried weakened layer has been uncovered by fracture A method for forming a plurality of thin films from a microtechnological donar substrate with a view to recycling of the donor substrate, the method including exposing a face of the donor substrate by fracturing the donor substrate along a layer weakened by implanta... | 09/20/2011 |
| 8021958 | Method for manufacturing SOI substrate and method for manufacturing semiconductor device A method for manufacturing an SOI substrate in which crystal defects of a single crystal semiconductor layer are reduced is provided. An oxide film containing halogen is formed on each of surfaces of a single crystal semiconductor substrate and of a semiconductor su... | 09/20/2011 |
| 8017497 | Method for manufacturing semiconductor A method for manufacturing a high quality semiconductor device having a through via structure. A substrate is manufactured with an oxide layer including a window region in a region in which a through via is formed. The substrate is bonded with another substrate to f... | 09/13/2011 |
| 8008164 | Wafer bonding method and wafer structure A wafer bonding method includes providing a primary wafer and a plurality of secondary wafers, wherein the primary wafer is larger than the secondary wafers. An intermediate material layer is formed on at least one of a bonding surface of the primary wafer and bondi... | 08/30/2011 |
| 7998833 | Method for bonding wafers The invention relates to a method for bonding wafers along their corresponding surfaces. ... | 08/16/2011 |
