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| Number | Title | Issue Date |
| 4456488 | Method of fabricating an integrated planar transistor A method is disclosed for fabricating a monolithic integrated planar transistor whose emitter region (1) is diffused into the base region (3) on one surface side of a semiconductor wafer (2), which base region is diffused into the collector region (4). To... | 06/26/1984 |
| 4452645 | Method of making emitter regions by implantation through a non-monocrystalline layer A transistor structure is provided with an emitter which is formed from non-monocrystalline silicon which is caused to be converted to monocrystalline silicon during the manufacture of the transistor. In the process of manufacturing the present semiconduc... | 06/05/1984 |
| 4441932 | Process for preparing semiconductor device having active base region implanted therein using walled emitter opening and the edge of dielectric isolation zone A process for preparing a semiconductor device having a walled emitter structure covering at least one side surface with a dielectric layer for separation of devices comprises a step of forming a base by implantation of ions with a resist mask for base; a... | 04/10/1984 |
| 4440580 | Method of fabricating an integrated bipolar planar transistor by implanting base and emitter regions through the same insulating layer The invention relates to an ion-implantation process for fabricating integrated bipolar planar transistors, particularly transistors for very high frequencies. To prevent the variations in the thicknesss of the insulating layer, through which the dopants ... | 04/03/1984 |
| 4433471 | Method for the formation of high density memory cells using ion implantation techniques A semiconductor structure is fabricated using a process involving all ion implantation and using only five masks prior to metallization. A buried contact mask is used to form a buried contact layer (114), an isolation mask is used to form grooves (130a, 1... | 02/28/1984 |
| 4418469 | Method of simultaneously forming buried resistors and bipolar transistors by ion implantation A method of making at a relatively low temperature, a resistor region of a high sheet resistance, solely or together with other circuit devices such as bipolar transistors in an IC chip, with the step of forming a buried resistor layer inside a semiconduc... | 12/06/1983 |
| 4415384 | Method for manufacturing a semiconductive device A method for manufacturing a semiconductive device comprising: exposing a part of the surface of an n-type semiconductive substrate and covering the other part with an oxide film; partially providing the exposed part of the n-type semiconductive film with... | 11/15/1983 |
| 4412378 | Method for manufacturing semiconductor device utilizing selective masking, etching and oxidation Disclosed is a method for manufacturing a semiconductor device. In this method an oxidation-resistive insulating film is formed on a silicon body of a one conductivity type. A first impurity region of the opposite conductivity type is selectively formed i... | 11/01/1983 |
| 4412376 | Fabrication method for vertical PNP structure with Schottky barrier diode emitter utilizing ion implantation A vertical PNP bipolar transistor structure with Schottky Barrier diode emitter is disclosed which simplifies the structure and process steps for combining a complementary PNP in an NPN integrated circuit and improves the speed and density of the vertical... | 11/01/1983 |
| 4398962 | Method of controlling base contact regions by forming a blocking layer contiguous to a doped poly-si emitter source A method of manufacturing a semiconductor device includes a step of forming a film doped with an emitter impurity on a predetermined surface area of a semiconductor layer. An ion implantation blocking layer is formed to cover the top and side surfaces of ... | 08/16/1983 |
| 4386968 | Method of making semiconductor device structures by means of ion implantation under a partial pressure of oxygen Disclosed is a simplified method of producing semiconductor device structures in an integrated technology using at least one ion implantation step. Implantation of the doping ions into a silicon wafer, for example, for producing a subcollector or an emitt... | 06/07/1983 |
| 4333774 | Method for producing walled emitter type bipolar transistors A base region of a walled emitter type bipolar transistor is formed by an ion implantation process. During the ion implantation, insulating films are disposed on a part of a semiconductor body corresponding to an emitter region, so that the obtained profi... | 06/08/1982 |
| 4333227 | Process for fabricating a self-aligned micrometer bipolar transistor device A method for device fabrication utilizing a self-aligned process. A combination of advanced semiconductor processing techniques including Deep Dielectric Isolation by reactive-ion etching, etching and refilling, planarizing with oxides and resists, and di... | 06/08/1982 |
| 4319932 | Method of making high performance bipolar transistor with polysilicon base contacts Bipolar transistor devices are formed by employing polysilicon base contacts self-aligned with respect to a diffusion or ion implantation window used to form emitter, intrinsic base and raised subcollector regions. The polysilicon acts as a self-aligned i... | 03/16/1982 |
| 4261763 | Fabrication of integrated circuits employing only ion implantation for all dopant layers This disclosure relates to a method of fabricating an integrated circuit wherein all dopant layers are formed by ion implantation. More specifically, the buried collector of a bipolar integrated circuit is formed by ion implantation which collector has a ... | 04/14/1981 |
| 4216030 | Process for the production of a semiconductor component with at least two zones which form a pn-junction and possess differing conductivity types A semiconductor component is described which includes two zones of opposite conductivity type having a pn junction therebetween, and in which one zone is formed of a monocrystalline semiconductor substrate body and the other zone is produced in the semico... | 08/05/1980 |
| 4191595 | Method of manufacturing PN junctions in a semiconductor region to reach an isolation layer without exposing the semiconductor region surface In a semiconductor device including at least one active semiconductor region isolated by an oxide layer in a semiconductor substrate having a principal surface, at least two PN junctions, terminating at the oxide layer, are formed in the active region, by... | 03/04/1980 |
| 4183036 | Schottky-transistor-logic A Schottky-transistor-logic arrangement is disclosed which comprises a highly doped semiconductor substrate of one conductivity type. An epitaxial layer of the same conductivity type is formed on the substrate. A deep-implanted doped zone of the other con... | 01/08/1980 |
| 4175983 | Process for the production of a high frequency transistor A process is disclosed for producing a high frequency transistor having a small emitter width. The high frequency transistor has a base zone consisting of an inactive region and of an active region. The lateral extension of the active region is determined... | 11/27/1979 |
| 4151009 | Fabrication of high speed transistors by compensation implant near collector-base junction A high speed bipolar transistor is obtained by the use of ion implanted compensating impurities into the base region near the collector-base junction. This compensating implant significantly reduces the base width of the transistor with little reduction i... | 04/24/1979 |
| 4125426 | Method of manufacturing semiconductor device A simplified method of manufacturing a semiconductor device is disclosed wherein a base region is formed on a silicon substrate and an impurity is diffused into the base region. Any insulating film present on the silcon substrate is removed, substrate and... | 11/14/1978 |
| 4111726 | Bipolar integrated circuit process by separately forming active and inactive base regions An improved method for forming a semiconductor integrated circuit device wherein the active base area of a transistor formed therein is controlled by first forming the inactive base area and later forming the active base area, after the emitter has been f... | 09/05/1978 |
| 4106954 | Method of manufacturing transistors by means of ion implantation A method of manufacturing transistors by means of ion implantation is characterized by the implantation of a uniform extrinsic base zone, by providinbg a mask having at least two windows, and by the implantation of the emitter zone and then of the intrins... | 08/15/1978 |
| 4099987 | Fabricating integrated circuits incorporating high-performance bipolar transistors A method and resulting semiconductor device which utilizes a mesa emitter structure in a silicon body. The mesa emitter is formed in the silicon semiconductor body and then passivated on its sidewalls using a suitable dielectric. The base region is formed... | 07/11/1978 |
| 4029522 | Method to fabricate ion-implanted layers with abrupt edges to reduce the parasitic resistance of Schottky barrier fets and bipolar transistors A method is disclosed to implant layers in semiconductor substrates with asymmetrical edges, that is, one edge slopes towards the surface of the substrate and the other terminates abruptly inside the bulk. The method involves using lift-off techniques to ... | 06/14/1977 |
| 4025364 | Process for simultaneously fabricating epitaxial resistors, base resistors, and vertical transistor bases A process for simultaneously fabricating epitaxial resistors, base resistors, and vertical transistor bases in a semiconductor substrate utilizes the stopping power of different layers of materials to determine the location of impurity concentrations indu... | 05/24/1977 |
| 4018627 | Method for fabricating semiconductor devices utilizing oxide protective layer Defect formations and unwanted in diffusions caused by residual impurity products is prevented in a semiconductor fabrication method which includes the step of forming a composite mask which simultaneously defines base, collector and diffusion isolation o... | 04/19/1977 |
| 3963524 | Method of producing a semiconductor device The surface of a semiconductor substrate, such as a silicon crystal, is uniformly coated with a layer of Si3 N4 and at least two selectively spaced windows are provided therein. The uncovered silicon surface within such windows is th... | 06/15/1976 |
| 3948694 | Self-aligned method for integrated circuit manufacture A method for manufacturing integrated circuits provides total self-alignment of all critically positioned device regions. Self-alignment is accomplished by a combination of selectively etchable thin layers on the surface of a semiconductor body. An initia... | 04/06/1976 |
| 3943016 | Gallium-phosphorus simultaneous diffusion process By protecting one surface of a silicon element with an oxide layer while leaving another surface exposed it is possible to diffuse both gallium and phosphorus into the silicon element simultaneously in a selective manner. Gallium will penetrate the oxide ... | 03/09/1976 |
| 3940288 | Method of making a semiconductor device A method of making a semiconductor device capable of high-speed operation is disclosed in which when the current gain-bandwidth is increased by the formation of a shallow base region. A side etching process is used to decrease the base spreading resistanc... | 02/24/1976 |
