A haircutting appliance comprises an enclosed housing having a hollow handle connecting the housing to a vacuum source to carry away cut hairs from a subject's head.
Make the Most of Our Site
See this month's Top Inventors and Most Cited Patents.
Stay on top of the latest innovations by subscribing to an RSS feed.
Registered users: Manage your profile.
| Number | Title | Issue Date |
| 4988632 | Bipolar process using selective silicon deposition A process is disclosed for fabricating bipolar transistors having self aligned and closely spaced polycrystalline silicon base and emitter electrodes. The process is especially amenable to integration with the fabrication of MOS transistors to form BiMOS ... | 01/29/1991 |
| 4980304 | Process for fabricating a bipolar transistor with a self-aligned contact A novel fabrication method is disclosed for fabricating a bipolar transistor having a digitated emitter electrode and a contiguous polysilicon region acting as a self-aligned base contact. The process substantially reduces the parasitic capacitances as we... | 12/25/1990 |
| 4857476 | Bipolar transistor process using sidewall spacer for aligning base insert An improved method for fabricating a bipolar transistor reduces base current resistance which heretofore has limited the switching frequency and current handling ability of bipolar transistors. The transistor base and emitter are formed as a diffusion thr... | 08/15/1989 |
| 4851362 | Method for manufacturing a semiconductor device A method for manufacturing a semicondcutor device includes, steps of forming a poly silicon layer at a predetermined area for a base electrode on a surface of a thin insulating film, forming an insulating film at a sidewall of the exposed poly silicon lay... | 07/25/1989 |
| 4845046 | Process for producing semiconductor devices by self-alignment technology A method of manufacturing semiconductor device wherein the self-alignment technique is employed to simplify the manufacturing process and includes the steps of successively depositing multiple layer masking films comprising a first, a second and a third m... | 07/04/1989 |
| 4803174 | Bipolar transistor integrated circuit and method of manufacturing the same In a bipolar transistor according to the present invention, interposed between both of a polysilicon film (603) on an emitter layer (3) and a first metal silicide film (502) on the polysilicon film (603) and a second metal silicide film (501) on a base la... | 02/07/1989 |
| 4746629 | Process of fabricating semiconductor device involving planarization of a polysilicon extrinsic base region A process of fabricating a semiconductor device comprising the steps of forming a dielectric layer overlying a doped semiconductor layer, forming a first insulator layer on the dielectric layer, etching the dielectric layer and the insulator layer to form... | 05/24/1988 |
| 4729965 | Method of forming extrinsic base by diffusion from polysilicon/silicide source and emitter by lithography This invention relates to a method of producing a semiconductor device which is suitable for forming a bipolar transistor having less fluctuation of characteristics at a high production yield. In accordance with the present invention, a graft base (or an extri... | 03/08/1988 |
| 4728618 | Method of making a self-aligned bipolar using differential oxidation and diffusion A method for manufacturing semiconductor device with improved frequency characteristics is provided. The base resistance and the base-to-collector capacitance are reduced by minimizing a base area and a space between an emitter and the base. The minimizat... | 03/01/1988 |
| 4722908 | Fabrication of a bipolar transistor with a polysilicon ribbon In the fabrication of bipolar transistors by the single poly process, polysilicon sidewalls are formed along portions of a polysilicon layer that functions as a device contact. The sidewalls serve both as dopant sources which determine the width of underl... | 02/02/1988 |
| 4717689 | Method of forming semimicron grooves in semiconductor material On a layer having a stepped relief, such as a masking layer (4) having openings (5) on a substrate region, (2) a first layer (6) is provided, which, while maintaining the stepped relief, is covered by a second masking layer (8) and a convertible layer (9)... | 01/05/1988 |
| 4686763 | Method of making a planar polysilicon bipolar device A highly planarized integrated circuit structure having at least one bipolar device is described as well as a method of making the structure. The structure comprises a substrate having a field oxide grown thereon with openings defined therein respectively... | 08/18/1987 |
| 4617071 | Method of fabricating electrically connected regions of opposite conductivity type in a semiconductor structure The two transistors of a bipolar flip-flop structure are interconnected by using a polycrystalline silicon/metal silicide sandwich structure. The polycrystalline silicon is doped to correspond to the underlying regions of the transistor structures, and un... | 10/14/1986 |
| 4581319 | Method for the manufacture of bipolar transistor structures with self-adjusting emitter and base regions for extreme high frequency circuits A method for the manufacture of bipolar transistor structures with self-adjusted emitter and base regions wherein the emitter and base regions are generated by an out-diffusion from doped polysilicon layers. Dry etching processes which produce vertical et... | 04/08/1986 |
| 4572765 | Method of fabricating integrated circuit structures using replica patterning A method of defining narrow regions in an underlying integrated circuit structure includes the steps of depositing a first layer of material 30 having selected etching characteristics on the underlying integrated circuit structure, depositing a second lay... | 02/25/1986 |
| 4569123 | Method of manufacturing a semiconductor device utilizing simultaneous diffusion from an ion implanted polysilicon layer A method for manufacturing semiconductor devices is presented. The method comprises the steps of opening two windows on an insulating layer covering a semiconductor substrate, and forming a polysilicon layer over the entire surface of the insulating layer... | 02/11/1986 |
| 4431460 | Method of producing shallow, narrow base bipolar transistor structures via dual implantations of selected polycrystalline layer A method for fabricating high performance NPN bipolar transistors which result in shallow, narrow base devices is described. The method includes depositing a polycrystalline silicon layer over a monocrystalline silicon surface in which the base and emitte... | 02/14/1984 |
| 4407060 | Method of manufacturing a semiconductor device Shallow uniform impurity diffusion regions in a semiconductor substrate can be formed through the steps of forming an insulating film having a window on the semiconductor substrate, forming a semiconductor layer on the insulating film and semiconductor su... | 10/04/1983 |
| 4313255 | Method for manufacturing integrated circuit device Disclosed is a method for manufacturing an integrated circuit device which comprises the steps of preparing a silicon substrate having an isolated first region of a first conductivity type, selectively forming on the first region a polycrystalline silicon... | 02/02/1982 |
| 4296426 | Process for producing an MOS-transistor and a transistor produced by this process A process for producing a field-effect insulated-gate transistor of the N-channel MOS-type, transistor comprising, on a semiconductor substrate, a control gate (14) and a source region (12), a drain region (13) and a channel region (15, 16), which compris... | 10/20/1981 |