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| Number | Title | Issue Date |
| 7947561 | Methods for oxidation of a semiconductor device Methods of fabricating an oxide layer on a semiconductor substrate are provided herein. The oxide layer may be formed over an entire structure disposed on the substrate, or selectively formed on a non-metal containing layer with little or no oxidation of an exposed ... | 05/24/2011 |
| 7358596 | Device isolation for semiconductor devices Exemplary embodiments of the present invention disclose a semiconductor assembly having at least one isolation structure formed. The semiconductor assembly comprises: a first trench in a semiconductive substrate; a second trench extending the overall trench depth in... | 04/15/2008 |
| 7323390 | Semiconductor device and method for production thereof The semiconductor device according to the invention includes a substrate, a field insulating region which delimits an active region of the semiconductor substrate, a collector, at least one collector contact region associated with the collector, and a base with an a... | 01/29/2008 |
| 7314792 | Method for fabricating transistor of semiconductor device A method for fabricating a transistor of a semiconductor device is provided. The method includes: forming device isolation layers in a substrate including a bottom structure, thereby defining an active region; etching the active region to a predetermined depth to fo... | 01/01/2008 |
| 7259055 | Method of forming high-luminescence silicon electroluminescence device A method for forming a high-luminescence Si electroluminescence (EL) phosphor is provided, with an EL device made from the Si phosphor. The method comprises: depositing a silicon-rich oxide (SRO) film, with Si nanocrystals, having a refractive index in the range of ... | 08/21/2007 |
| 7244644 | Undercut and residual spacer prevention for dual stressed layers Methods are disclosed for forming dual stressed layers in such a way that both undercutting and an undesirable residual spacer of the first-deposited stressed layer are prevented. In one embodiment, a method includes forming a first stressed silicon nitride layer ov... | 07/17/2007 |
| 7211295 | Silicon dioxide film forming method Disclosed herein is a silicon dioxide film forming method including: a reaction chamber heating step of heating a reaction chamber to a predetermined temperature, the reaction chamber containing an object to be processed; a gas pretreating step of energizing a proce... | 05/01/2007 |
| 7151035 | Semiconductor device and manufacturing method thereof A sidewall-insulation film 9 is provided on a side surface of a first opening portion 8a formed in a base extraction electrode 5B of a hetero-junction bipolar transistor, and a portion of the sidewall-insulation film 9 extends so a... | 12/19/2006 |
| 7135417 | Method of forming a semiconductor device In the formation of semiconductor devices, a processing method is provided, including steps for forming an oxide layer. The embodied methods involve a series of oxidation steps, with optional interposed cleanings, as well as an optional conditioning step after oxida... | 11/14/2006 |
| 7132701 | Contact method for thin silicon carbide epitaxial layer and semiconductor devices formed by those methods Provided is a process for forming a contact for a compound semiconductor device without electrically shorting the device. In one embodiment, a highly doped compound semiconductor material is electrically connected to a compound semiconductor material of the same con... | 11/07/2006 |
| 7049206 | Device isolation for semiconductor devices Exemplary embodiments of the present invention disclose a semiconductor assembly having at least one isolation structure formed. The semiconductor assembly comprises: a first trench in a semiconductive substrate; a second trench extending the overall trench depth in... | 05/23/2006 |
| 7016655 | Surface acoustic wave filter packaging A system that provides packaging for a surface acoustic wave filter in such a way that the surface acoustic wave filter is capable of integration with a number of additional electronic devices on an integrated substrate. The surface acoustic wave filter is mounted i... | 03/21/2006 |
| 6955957 | Method of forming a floating gate in a flash memory device Disclosed is a method of forming the floating gate in the flash memory device. After the first polysilicon film is deposited on the semiconductor substrate, the trench is formed on the first polysilicon film with the pad nitride film not deposited. The HDP oxide fil... | 10/18/2005 |
| 6930011 | Semiconductor device with a bipolar transistor, and method of manufacturing such a device A semiconductor device includes a preferably discrete bipolar transistor with a collector region, a base region, and an emitter region which are provided with connection conductors. A known means of preventing a saturation of the transistor is that the latter is pro... | 08/16/2005 |
| 6838326 | Semiconductor device, and method for manufacturing the same The present invention discloses semiconductor device which comprises a metal gate electrode surrounded by polysilicon layers and a gate insulating film whose edges are thicker than the center portion formed according to a reoxidation process using a thermal process ... | 01/04/2005 |
| 6830977 | METHODS OF FORMING AN ISOLATION TRENCH IN A SEMICONDUCTOR, METHODS OF FORMING AN ISOLATION TRENCH IN A SURFACE OF A SILICON WAFER, METHODS OF FORMING AN ISOLATION TRENCH-ISOLATED TRANSISTOR, TRENCH-ISOLATED TRANSISTOR, TRENCH ISOLATION STRUCTURES FORMED IN A SEMICONDUCTOR, MEMORY CELLS AND DRAMS A method of forming an isolation trench in a semiconductor includes forming a first isolation trench portion having a first depth and having a first sidewall intersecting a surface of the semiconductor at a first angle. The method also includes forming a second isol... | 12/14/2004 |
| 6803259 | Silicon controlled rectifier for sige process, manufacturing method thereof and integrated circuit including the same A silicon controlled rectifier for SiGe process. The silicon controlled rectifier comprises a substrate, a buried layer of a first conductivity type in the substrate, a well of the first conductivity type in the substrate and above the buried layer, a doped region o... | 10/12/2004 |
| 6746908 | Temperature controlling method, thermal treating apparatus, and method of manufacturing semiconductor device A temperature control method is provided which is capable of performing quick, accurate, and error-free soaking control over all wafer areas to be thermally treated at a target temperature without requiring any skilled operator and which can be automated by using a ... | 06/08/2004 |
| 6713361 | Method of manufacturing a bipolar junction transistor including undercutting regions adjacent to the emitter region to enlarge the emitter region According to one embodiment of the invention, a method for manufacturing bipolar junction transistors includes disposing a first oxide layer between a semiconductor substrate and a base polysilicon layer, forming a dielectric layer outwardly from the base polysilico... | 03/30/2004 |
| 6627515 | Method of fabricating a non-floating body device with enhanced performance A method of forming a buried silicon oxide region in a semiconductor substrate with portions of the buried silicon oxide region formed underlying portions of a strained silicon shape, and where the strained silicon shape is used to accommodate a semicondu... | 09/30/2003 |
| 6579774 | Semiconductor device fabrication method A semiconductor device fabrication method includes the steps of forming a first insulation layer and a first semiconductor layer sequentially on a semiconductor substrate having a buried diffusion region therein. A second insulation layer is formed on the... | 06/17/2003 |
| 6579777 | Method of forming local oxidation with sloped silicon recess A method of forming a localized oxidation having reduced bird's beak encroachment in a semiconductor device by providing an opening in the silicon substrate that has sloped sidewalls with a taper between about 10° and about 75° as measured from the vert... | 06/17/2003 |
| 6436780 | Semiconductor device A number of npn and pnp bipolar transistors are formed in a single chip of silicon, so that some of the transistors have a greater frequency response than others The higher frequency transistors have their emitters located closer to the collectors, by pos... | 08/20/2002 |
| 6420224 | Stepper alignment mark formation with dual field oxide process A semiconductor photomask set for producing wafer alignment accuracy in a semiconductor fabrication process. The photomask set produces an alignment mark that is accurate for subsequent fabrication after undergoing a dual field oxide (FOX) fabrication pro... | 07/16/2002 |
| 6403427 | Field effect transistor having dielectrically isolated sources and drains and method for making same A field-effect transistor and a method for its fabrication are described. The transistor includes a monocrystalline channel region extending from a monocrystalline body region of a semiconductor substrate. First and second source/drain regions laterally a... | 06/11/2002 |
| 6362038 | Low and high voltage CMOS devices and process for fabricating same CMOS devices and process for fabricating low voltage, high voltage, or both low voltage and high voltage CMOS devices are disclosed. According to the process, p-channel stops and source/drain regions of PMOS devices are implanted into a substrate in a sin... | 03/26/2002 |
| 6335233 | Method for fabricating MOS transistor A first conductive impurity ion is implanted into a semiconductor substrate to form a well area on which a gate electrode is formed. A first non-conductive impurity is implanted into the well area on both sides of the gate electrode to control a substrate... | 01/01/2002 |
| 6331470 | Process for manufacturing a semiconductor material wafer having power regions dielectrically insulated from circuitry regions A manufacturing process is carried out starting from an SOI type wafer including a top silicon layer and a bottom silicon layer separated from each other by a buried silicon dioxide layer. In the top layer, a LOCOS type sacrificial region is formed and th... | 12/18/2001 |
| 6300232 | Semiconductor device having protective films surrounding a fuse and method of manufacturing thereof The present invention discloses a semiconductor device and its manufacture by which damages, such as cracks, generated by the heat of melting of a fuse that is employed for isolating a circuit from the other circuits, can be blocked from propagating into ... | 10/09/2001 |
| 6258689 | Low resistance fill for deep trench capacitor Trench capacitors are fabricated utilizing a method which results in a metallic nitride as a portion of a node electrode in a lower region of the trench. The metallic nitride-containing trench electrode exhibits reduced series resistance compared to conve... | 07/10/2001 |
| 6239003 | Method of simultaneous fabrication of isolation and gate regions in a semiconductor device A method of forming a semiconductor device includes forming a moat stack outwardly from a substrate, the moat stack comprising a dielectric pad disposed outwardly from the substrate, a silicon buffer structure disposed outwardly from the dielectric pad, a... | 05/29/2001 |
| 6225682 | Semiconductor memory device having isolation structure and method of fabricating the same A fabrication method for a semiconductor memory device having an isolation structure which includes the steps of forming a pad oxide film on a semiconductor substrate, forming a first nitride film on the pad oxide film, patterning the first nitride film a... | 05/01/2001 |
| 6225180 | Semiconductor device and method of manufacturing the same A photoresist pattern is formed on a field oxide film and an element forming region across the field oxide film and the element forming region such that a portion of a surface of the field oxide film and a portion of a surface of a silicon epitaxial layer... | 05/01/2001 |
| 6211022 | Field leakage by using a thin layer of nitride deposited by chemical vapor deposition A nitride layer is deposited over a field oxide layer used to separate transistors formed in a substrate, the nitride layer serving to decrease transistor current leakage. The nitride layer has a dense lattice, effectively blocking H+ and Na+ penetration ... | 04/03/2001 |
| 6121114 | Method for preparing a dummy wafer The method of the invention starts with forming a mask on a blank wafer, wherein the mask contains a number of openings that expose a portion of the wafer. By performing a wet oxidation process, field oxide is formed on the exposed surface of the wafer. T... | 09/19/2000 |
| 6066545 | Birdsbeak encroachment using combination of wet and dry etch for isolation nitride A technique for reducing active area encroachment (birdsbeak) by using a polysilicon hard mask combined with both wet and dry etch for the isolation nitride. This process forms a thinner layer of nitride adjacent the openings for oxide growth, which reduc... | 05/23/2000 |
| 6001700 | Method and mask structure for self-aligning ion implanting to form various device structures A method for making self-aligned sub-micrometer bipolar transistors and FETs on a substrate for BiFET and BiCMOS circuits was achieved using a novel LOCOS structure as a self-aligned implant mask. This LOCOS structure uses a silicon nitride mask comprised... | 12/14/1999 |
| 6001709 | Modified LOCOS isolation process for semiconductor devices A modified LOCOS isolation process for semiconductor devices is disclosed. First, a shielding layer is formed overlying a semiconductor substrate. The shielding layer is then patterned to form an opening that exposes a portion of the semiconductor substra... | 12/14/1999 |
| 5985734 | Method for fabricating a semiconductor device A semiconductor device is disclosed, together with a fabricating method therefor. The semiconductor device has an etch barrier structure, made with SiN or SiON, which is formed on an element-isolating region alongside an active region. Although there is a... | 11/16/1999 |
| 5970355 | Method for fabricating semiconductor device A method for fabricating a semiconductor device having a base electrode, an emitter electrode, and a collector electrode, includes the steps of: forming first, second, and buried layers in a semiconductor substrate; forming first, second, and third epitax... | 10/19/1999 |
