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| Number | Title | Issue Date |
| 7279399 | Method of forming isolated pocket in a semiconductor substrate A family of semiconductor devices is formed in a substrate that contains no epitaxial layer. In one embodiment the family includes a 5V CMOS pair, a 12V CMOS pair, a 5V NPN, a 5V PNP, several forms of a lateral trench MOSFET, and a 30V lateral N-channel DMOS. Each o... | 10/09/2007 |
| 7265434 | Modular bipolar-CMOS-DMOS analog integrated circuit and power transistor technology A family of semiconductor devices is formed in a substrate that contains no epitaxial layer. In one embodiment the family includes a 5V CMOS pair, a 12V CMOS pair, a 5V NPN, a 5V PNP, several forms of a lateral trench MOSFET, and a 30V lateral N-channel DMOS. Each o... | 09/04/2007 |
| 7238583 | Back-illuminated imaging device and method of fabricating same A method for fabricating a back-illuminated semiconductor imaging device on a thin semiconductor-on-insulator substrate, and resulting imaging device. Resulting device has a monotonically varying doping profile which provides a desired electric field and eliminates ... | 07/03/2007 |
| 7211863 | Modular bipolar-CMOS-DMOS analog integrated circuit and power transistor technology A family of semiconductor devices is formed in a substrate that contains no epitaxial layer. In one embodiment the family includes a 5V CMOS pair, a 12V CMOS pair, a 5V NPN, a 5V PNP, several forms of a lateral trench MOSFET, and a 30V lateral N-channel DMOS. Each o... | 05/01/2007 |
| 7202533 | Thin film resistors integrated at a single metal interconnect level of die An integrated circuit structure includes a first dielectric layer disposed on a semiconductor layer, a first thin film resistor disposed on the first dielectric layer, a second dielectric layer disposed on the first dielectric layer and the first thin film resistor,... | 04/10/2007 |
| 7202536 | Modular bipolar-CMOS-DMOS analog integrated circuit and power transistor technology A family of semiconductor devices is formed in a substrate that contains no epitaxial layer. In one embodiment the family includes a 5V CMOS pair, a 12V CMOS pair, a 5V NPN, a 5V PNP, several forms of a lateral trench MOSFET, and a 30V lateral N-channel DMOS. Each o... | 04/10/2007 |
| 7151035 | Semiconductor device and manufacturing method thereof A sidewall-insulation film 9 is provided on a side surface of a first opening portion 8a formed in a base extraction electrode 5B of a hetero-junction bipolar transistor, and a portion of the sidewall-insulation film 9 extends so a... | 12/19/2006 |
| 7135738 | Modular bipolar-CMOS-DMOS analog integrated circuit and power transistor technology A family of semiconductor devices is formed in a substrate that contains no epitaxial layer. In one embodiment the family includes a 5V CMOS pair, a 12V CMOS pair, a 5V NPN, a 5V PNP, several forms of a lateral trench MOSFET, and a 30V lateral N-channel DMOS. Each o... | 11/14/2006 |
| 7091100 | Polysilicon bipolar transistor and method of manufacturing it In the inventive method of producing a base terminal structure for a bipolar transistor, an etch stop layer is applied on a single-crystal semiconductor substrate, a poly-crystal base terminal layer is produced on the etch stop layer and an emitter window is etched ... | 08/15/2006 |
| 7078325 | Process for producing a doped semiconductor substrate A process is described which allows a buried, retrograde doping profile or a delta doping to be produced in a relatively simple and inexpensive way. The process uses individual process steps that are already used in the mass production of integrated circuits and acc... | 07/18/2006 |
| 7053464 | System and method for providing a variable breakdown bipolar transistor A system and method is disclosed for providing a variable breakdown bipolar transistor. A trench is etched in a substrate between a first area (base/emitter area) and a second area (sinker/collector area). The sinker/collector contact area and a portion of the botto... | 05/30/2006 |
| 7018927 | Method for forming isolation film for semiconductor devices An isolation film for semiconductor devices is formed from a pad oxide film and a pad nitride film on a substrate, etching the pad nitride film, the pad oxide film and the substrate to form a trench in an active region of the substrate; forming a sidewall oxide film... | 03/28/2006 |
| 6977426 | Semiconductor device including high speed transistors and high voltage transistors disposed on a single substrate In a semiconductor device comprising a first bipolar transistor and a second bipolar transistor having different voltages formed on a semiconductor substrate made by forming an epitaxial layer on a silicon substrate, in an upper part of the silicon substrate the fir... | 12/20/2005 |
| 6972237 | Lateral heterojunction bipolar transistor and method of manufacture using selective epitaxial growth A method for manufacturing a heterojunction bipolar transistor is provided. An intrinsic collector structure is formed on a substrate. An extrinsic base structure partially overlaps the intrinsic collector structure. An intrinsic base structure is formed adjacent th... | 12/06/2005 |
| 6927460 | Method and structure for BiCMOS isolated NMOS transistor A structure of and a method for making an isolated NMOS transistor using standard BiCMOS processing steps and techniques. No additional masks and processing steps are needed for the isolated NMOS device relative to the standard process flow. A P-type substrate with ... | 08/09/2005 |
| 6927442 | Charge pump device A semiconductor device for a charge pump device suitable for providing large current capacity and preventing a latch up from occurring is offered. A first and a second N-type epitaxial silicon layers are stacked on a P-type single crystalline silicon substrate, and ... | 08/09/2005 |
| 6909150 | Mixed signal integrated circuit with improved isolation An integrated circuit having improved isolation includes a first circuit section formed in a substrate and a second circuit section formed in the substrate, the second circuit section being spaced laterally from the first circuit section. The integrated circuit furt... | 06/21/2005 |
| 6881641 | Semiconductor device having a retrograde dopant profile in a channel region and method for fabricating the same An epitaxially grown channel layer is provided on a well structure after ion implantation steps and heat treatment steps are performed to establish a required dopant profile in the well structure. The channel layer may be undoped or slightly doped, as required, so t... | 04/19/2005 |
| 6768173 | High voltage MOS transistor with up-retro well A high voltage MOS transistor is provided that is compatible with low-voltage, sub-micron CMOS and BiCMOS processes. The high voltage transistor of the present invention has dopants that are implanted into the substrate prior to formation of the epitaxial layer. The... | 07/27/2004 |
| 6756273 | Semiconductor component and method of manufacturing A semiconductor component includes a semiconductor layer (110) having a trench (326). The trench has first and second sides. A portion (713) of the semiconductor layer has a conductivity type and a charge density. The semiconductor component als... | 06/29/2004 |
| 6589830 | Self-aligned process for fabricating power MOSFET with spacer-shaped terraced gate A process forms a power semiconductor device with reduced input capacitance and improved switching speed. A substrate with an epitaxial has an oxide layer patterned to form a narrow terraced gate. A gate oxide layer is formed on the upper surface of the e... | 07/08/2003 |
| 6495421 | Manufacture of semiconductor material and devices using that material A method is described of manufacturing a semiconductor material having a zone (200) with p-conductivity type and n-conductivity type regions with dopant concentrations and dimensions such that, when the n- and p-conductivity type regions are depleted of f... | 12/17/2002 |
| 6365447 | High-voltage complementary bipolar and BiCMOS technology using double expitaxial growth A method of making high voltage complementary bipolar and BiCMOS devices on a common substrate. The bipolar devices are vertical NPN and PNP transistors having the same structure. The fabrication process utilizes trench isolation and thus is scalable. The... | 04/02/2002 |
| 6313000 | Process for formation of vertically isolated bipolar transistor device A vertically-isolated bipolar transistor occupying reduced surface area is fabricated by circumscribing an expected active device region within a first narrow trench. The first trench is filled with sacrificial material impermeable to diffusion of conduct... | 11/06/2001 |
| 6297120 | Method of manufacturing a semiconductor device To provide a method of manufacturing a semiconductor device in which an epitaxial growth film is formed on a semiconductor substrate having a buried layer, which is capable of reducing the manufacturing time of the semiconductor device or reducing the IC ... | 10/02/2001 |
| 6291304 | Method of fabricating a high voltage transistor using P+ buried layer A new design for a high voltage bipolar transistor is disclosed. Instead of a buried subcollector (which would be N+ in an NPN device)d a buried P+ layer is used. The presence of this P+ layer results in pinch-off between itself and the bipolar base. This... | 09/18/2001 |
| 6184100 | Method of manufacturing a photodiode In a light receiving element and a semiconductor device manufacturing method, the low density PN junction is formed by constructing the internal composition of the photodiode with N+ type diffusion layer, N- type epitaxial layer, P | 02/06/2001 |
| 6171891 | Method of manufacture of CMOS device using additional implant regions to enhance ESD performance A method of forming a semiconductor memory device formed on a semiconductor substrate with an N-well and a P-well comprises the following steps. Form over a substrate the combination of a gate oxide layer and a gate layer patterned into gate stacks with s... | 01/09/2001 |
| 6150225 | Method for fabricating a semiconductor device having vertical and lateral type bipolar transistors A semiconductor device has a P type semiconductor substrate 1, a vertical type bipolar transistor having an N type base region 4, a lateral type bipolar transistor having an N type base region 4 formed on the semiconductor substrate 1, an N type collector... | 11/21/2000 |
| 6146957 | Method of manufacturing a semiconductor device having a buried region with higher impurity concentration Since the PN junction of a photodiode is formed of a silicon substrate having a low impurity concentration and an epitaxial layer, the width of the depletion layer in the PN junction is formed wider, the parasitic capacitance by the junction capacitance i... | 11/14/2000 |
| 6090652 | Method of manufacturing a semiconductor device including implanting threshold voltage adjustment ions Disclosed is a manufacturing method of semiconductor device which can simplify the manufacturing procedures for transistors with different gate insulation film thickness in the same substrate. According to the present invention, a manufacturing method for... | 07/18/2000 |
| 6057184 | Semiconductor device fabrication method using connecting implants A semiconductor device and method of fabrication for such device in which a P- epitaxial layer is positioned above a P++ substrate. A P++ buried layer implant is positioned within the device between the P++ substrate and the P- epitaxial layer. A connecti... | 05/02/2000 |
| 5976942 | Method of manufacturing a high-voltage semiconductor device An epitaxial layer with a doping of approximately 1012 atoms per cm2 is used in accordance with the resurf condition for the high-voltage circuit element in high-voltage integrated circuits of the resurf type. If the circuit comprise... | 11/02/1999 |
| 5976940 | Method of making plurality of bipolar transistors In a semiconductor device comprising a first bipolar transistor and a second bipolar transistor having different voltages formed on a semiconductor substrate made by forming an epitaxial layer on a silicon substrate, in an upper part of the silicon substr... | 11/02/1999 |
| 5899714 | Fabrication of semiconductor structure having two levels of buried regions Integrated circuits suitable for high-performance applications, especially mixed signal products that have analog and digital sections, are fabricated from a semiconductor structure in which lower buried regions of opposite conductivity types are situated... | 05/04/1999 |
| 5895249 | Integrated edge structure for high voltage semiconductor devices and related manufacturing process An integrated edge structure for a high voltage semiconductor device comprising a PN junction represented by a diffused region of a first conductivity type extending from a semiconductor device top surface is described. The edge structure comprises a firs... | 04/20/1999 |
| 5880002 | Method for making isolated vertical PNP transistor in a digital BiCMOS process A vertical PNP transistor (11) and method for making it includes forming an N- region (19) in a P substrate (12), and forming an N+ region (26) in the substrate (12) laterally surrounding and partially extending into the N- region (19). A P region (30) is... | 03/09/1999 |
| 5759902 | Method of making an integrated circuit with complementary junction-isolated bipolar transistors Process for making an integrated-circuit (IC) chip with junction-isolated complementary bipolar transistors, and novel chip made by such process. P-type dopant is implanted and diffused in an N-type substrate to form a sub-collector for a pnp transistor a... | 06/02/1998 |
| 5756387 | Method for forming zener diode with high time stability and low noise Zener diode with high stability in time and low noise for integrated circuits and provided in an epitaxial pocket insulated from the rest of a type N epitaxial layer grown on a substrate of type P semiconductor material. In said pocket are included a type... | 05/26/1998 |
| 5716887 | Method of manufacturing BiCMOS device A semiconductor device and a method for manufacturing such a device are presented. The type of semiconductor device is one which merges one type of transistor (e.g., bipolar junction transistors) with another type (e.g., CMOS transistors). Specifically, t... | 02/10/1998 |
