Class 438/350 - Forming base region of specified dopant concentration profile (e.g., inactive base region more heavily doped than active base region, etc.)

Subclass of Class 438 - Semiconductor device manufacturing: process
Definition: Process for making a bipolar transistor with a semiconductor
No. of patents: 182
Last issue date: 05/01/2012

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Number	Title	Issue Date
8168505	Method of fabricating transistor with epitaxial layers having different germanium concentrations A method of fabricating a transistor is provided. The transistor includes a SiGe epitaxial layer formed in a recess region of a substrate at both side of a gate electrode and a SiGe capping layer formed on the SiGe epitaxial layer. The transistor further includes a ...	05/01/2012
7772079	Vertical organic transistor A vertical organic transistor and a method for fabricating the same are provided, wherein an emitter, a grid with openings and a collector are sequentially arranged above a substrate. Two organic semiconductor layers are interposed respectively between the emitter a...	08/10/2010
7485538	High performance SiGe HBT with arsenic atomic layer doping A base structure for high performance Silicon Germanium (SiGe) based heterojunction bipolar transistors (HBTs) with arsenic atomic layer doping (ALD) is disclosed. The ALD process subjects the base substrate to nitrogen gas or hydrogen gas (in ambient temperature ap...	02/03/2009
7442616	Method of manufacturing a bipolar transistor and bipolar transistor thereof A bipolar transistor (100) is manufactured using the following processes: (a) forming a base electrode layer (129) as a portion of a base electrode over a semiconductor substrate (110); (b) forming a first portion of an emitter electrode (154...	10/28/2008
7378325	Semiconductor device and manufacturing method thereof A high voltage semiconductor device having a high current gain hFE is formed with a collector region (20) of a first conduction type, an emitter region (40) of the first conduction type, and a base region (30) of a second conduction type opposit...	05/27/2008
7378324	Selective links in silicon hetero-junction bipolar transistors using carbon doping and method of forming same Bipolar transistors and methods of forming the bipolar transistors. The method including forming a P-type collector in a silicon substrate; forming an intrinsic base on the collector, the intrinsic base including a first N-type dopant species, germanium and carbon; ...	05/27/2008
7368361	Bipolar junction transistors and method of manufacturing the same A substrate has a collector region of a first conductivity type, and a base layer of a single crystalline structure and including impurities of a second conductivity type is located over the collector region. An emitter region is defined at least in part by impuriti...	05/06/2008
7364976	Selective etch for patterning a semiconductor film deposited non-selectively A method to selectively etch, and hence pattern, a semiconductor film deposited non-selectively is described. In one embodiment, a carbon-doped silicon film is deposited non-selectively such that the film forms an epitaxial region where deposited on a crystalline su...	04/29/2008
7335547	Method for effective BiCMOS process integration According to an exemplary embodiment, a method for integrating bipolar and CMOS devices on a substrate, where the substrate includes bipolar and CMOS regions and has a sacrificial oxide layer situated thereon, includes removing a portion of the sacrificial oxide lay...	02/26/2008
7317215	SiGe heterojunction bipolar transistor (HBT) A heterojunction bipolar transistor is formed in a semiconductor substrate of a first conductivity type including a collector region. A base region is formed on the substrate and an emitter region is formed over the base region. At least one of the collector, base a...	01/08/2008
7300850	Method of forming a self-aligned transistor In one embodiment, a transistor is formed to use two conductors to make electrical connection to one of the active regions of the transistor. ...	11/27/2007
7288829	Bipolar transistor with self-aligned retrograde extrinsic base implant profile and self-aligned silicide Disclosed is a method of forming a transistor in an integrated circuit structure that begins by forming a collector in a substrate and an intrinsic base above the collector. Then, the invention patterns an emitter pedestal for the lower portion of the emitter on the...	10/30/2007
7271070	Method for producing transistors The invention relates to a method for producing integrable semiconductor components, especially transistors or logic gates, using a p-doped semiconductor substrate. First of all, a mask is applied to the semiconductor substrate in order to define a window that is de...	09/18/2007
7268376	Bipolar transistor for increasing signal transfer efficiency and method of manufacturing the same A bipolar transistor having a base semiconductor layer structure to minimize base parasitic resistance and a method of manufacturing the bipolar transistor are provided. In the provided bipolar transistor, a collector region of a second conductivity type, which is d...	09/11/2007
7262483	Semiconductor device and method for manufacturing the same By a non-selective epitaxial growth method, an SiGe film is grown on the whole surface of a silicon oxide film so as to cover an inner wall of a base opening. Here, such film forming conditions are selected that, inside the base opening, a bottom portion is formed o...	08/28/2007
7262946	Integrated electronic disconnecting circuits, methods, and systems Merged devices for transient blocking. A pass transistor is placed so that its body potential drives the gate of a depletion-mode JFET-type blocking transistor. Thus a transient which appears on an external terminal is very rapidly propagated to shut off the blockin...	08/28/2007
7229861	Method for producing semiconductor device In producing a thin film transistor, after an amorphous silicon film is formed on a substrate, a nickel silicide layer is formed by spin coating with a solution (nickel acetate solution) containing nickel as the metal element which accelerates (promotes) the crystal...	06/12/2007
7202136	Silicon germanium heterojunction bipolar transistor with carbon incorporation A silicon germanium heterojunction bipolar transistor device and method comprises a semiconductor region, and a diffusion region in the semiconductor region, wherein the diffusion region is boron-doped, wherein the semiconductor region comprises a carbon dopant ther...	04/10/2007
7183627	Independent control of polycrystalline silicon-germanium in an HBT and related structure In one embodiment a precursor gas for growing a polycrystalline silicon-germanium region and a single crystal silicon-germanium region is supplied. The precursor gas can be, for example, GeH4. The polycrystalline silicon-germanium region can be, for examp...	02/27/2007
7173274	Incorporation of carbon in silicon/silicon germanium epitaxial layer to enhance yield for Si-Ge bipolar technology A SiGe bipolar transistor containing substantially no dislocation defects present between the emitter and collector region and a method of forming the same are provided. The SiGe bipolar transistor includes a collector region of a first conductivity type; a SiGe bas...	02/06/2007
7169660	Lithography-independent fabrication of small openings for forming vertical mos transistor A method for formation of openings in semiconducting devices not limited by constraints of photolithography include forming a first dielectric layer over a semiconducting substrate, depositing a polysilicon layer over the first dielectric layer, forming a second die...	01/30/2007
7141865	Low noise semiconductor amplifier A Low Noise semiconductor amplifier structure formed from layers of differently doped semiconductor material. This structure when properly biased will amplify voltage signals applied to the input terminal (Base1 or signal-base), and provide the same signal, a...	11/28/2006
7118995	Yield improvement in silicon-germanium epitaxial growth A method for determining a SiGe deposition condition so as to improve yield of a semiconductor structure. Fabrication of the semiconductor structure starts with a single-crystal silicon (Si) layer. Then, first and second shallow trench isolation (STI) regions are fo...	10/10/2006
7091099	Bipolar transistor and method for fabricating the same A bipolar transistor includes a Si single crystalline layer serving as a collector, a single crystalline Si/SiGeC layer and a polycrystalline Si/SiGeC layer which are formed on the Si single crystalline layer, an oxide film having an emitter opening portion, an emit...	08/15/2006
7084485	Method of manufacturing a semiconductor component, and semiconductor component formed thereby A method of manufacturing a semiconductor component includes: providing a semiconductor substrate (210, 510); forming a trench (130, 430) in the semiconductor substrate to define a plurality of active areas separated from each other by the trench; form...	08/01/2006
7084015	Semiconductor constructions The invention includes methods of forming implant regions between and/or under transistor gates. In one aspect, a pair of transistor gates is partially formed, and a layer of conductive material is left extending between the transistor gates. A dopant is implanted t...	08/01/2006
7071530	Multiple layer structure for substrate noise isolation A method of forming a semiconductor structure, comprising: providing a substrate having a buried insulative layer and a heavily doped layer; forming a first trench within the substrate around a protected area; filling the first trench with an insulative material, wh...	07/04/2006
7064416	Semiconductor device and method having multiple subcollectors formed on a common wafer A semiconductor device and a method of fabricating a semiconductor device having multiple subcollectors which are formed in a common wafer, in order to provide multiple structures having different characteristic and frequency response are provided. The subcollectors...	06/20/2006
7064361	NPN transistor having reduced extrinsic base resistance and improved manufacturability According to one exemplary embodiment, an NPN bipolar transistor comprises a base layer situated over a collector, where the base layer comprises an intrinsic base region and an extrinsic base region. The NPN bipolar transistor may be, for example, an NPN silicon-ge...	06/20/2006
7064042	Self aligned compact bipolar junction transistor layout, and method of making same The invention relates to a process of forming a bipolar junction transistor (BJT) that includes forming a topology over a substrate. Thereafter, a spacer is formed at the topology. A base layer is formed from epitaxial silicon above the spacer and at the topology. A...	06/20/2006
7060583	Method for manufacturing a bipolar transistor having a polysilicon emitter In the inventive method for manufacturing a bipolar transistor having a polysilicon emitter, a collector region of a first conductivity type and, adjoining thereto, a basis region of a second conductivity type will be generated at first. At least one layer of an ins...	06/13/2006
7037798	Bipolar transistor structure with self-aligned raised extrinsic base and methods The invention includes methods of fabricating a bipolar transistor that adds a silicon germanium (SiGe) layer or a third insulator layer of, e.g., high pressure oxide (HIPOX), atop an emitter cap adjacent the intrinsic base prior to forming a link-up layer. This add...	05/02/2006
7037799	Breakdown voltage adjustment for bipolar transistors Devices and methods are disclosed related to a bipolar transistor device and methods of fabrication. A top region is formed at a surface of and within a base region. The top region is formed by implanting a dopant of an opposite conductivity to that of the base regi...	05/02/2006
7019383	Gallium arsenide HBT having increased performance and method for its fabrication According to one exemplary embodiment, a gallium arsenide heterojunction bipolar transistor comprises a collector layer and a first spacer layer situated over the collector layer, where the first spacer layer is a high-doped P+ layer. For example, the first spacer l...	03/28/2006
7015551	Semiconductor device and method of fabricating same A semiconductor device (100) according to the present invention comprises a vertical PNP bipolar transistor (20), an NMOS transistor (50) and a PMOS transistor (60) that are of high dielectric strength, and a P-type semiconductor substrat...	03/21/2006
7009259	Semiconductor device and method of fabricating same A semiconductor device (100) according to the present invention comprises a vertical PNP bipolar transistor (20), an NMOS transistor (50) and a PMOS transistor (60) that are of high dielectric strength, and a P-type semiconductor substrat...	03/07/2006
7002221	Bipolar transistor having raised extrinsic base with selectable self-alignment and methods of forming same A bipolar transistor with raised extrinsic base and selectable self-alignment between the extrinsic base and the emitter is disclosed. The fabrication method may include the formation of a predefined thickness of a first extrinsic base layer of polysilicon or silico...	02/21/2006
6992338	CMOS transistor spacers formed in a BiCMOS process According to an exemplary method in one embodiment, a transistor gate is fabricated on a substrate. Next, an etch stop layer may be deposited on the substrate. The etch stop layer may, for example, be TEOS silicon dioxide. Thereafter, a conformal layer is deposited ...	01/31/2006
6979624	Reduced mask count buried layer process An N type buried layer is formed, in one embodiment, by a non selective implant on the surface of a wafer and later diffusion. Subsequently, the wafer is masked and a selective P type buried layer is formed by implant and diffusion. The coefficient of diffusion of t...	12/27/2005
6967144	Low doped base spacer for reduction of emitter-base capacitance in bipolar transistors with selectively grown epitaxial base A bipolar transistor structure includes a collector region having a first conductivity type formed in a semiconductor substrate. A base region is formed over the collector region; the base region includes a highly doped lower layer having a second conductivity type ...	11/22/2005

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Class 438/350 - Forming base region of specified dopant concentration profile (e.g., inactive base region more heavily doped than active base region, etc.)