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Class 438/314 - And additional electrical device


Subclass of Class 438 - Semiconductor device manufacturing: process
Definition: Process for making a heterojunction bipolar transistor and
No. of patents: 87
Last issue date: 02/28/2012


1      
NumberTitleIssue Date
8124489Monolithic microwave integrated circuit device and method of forming the same
Provided are a monolithic microwave integrated circuit device and a method for forming the same. The method includes: forming an sub-collector layer, a collector layer, a base layer, an emitter layer, and an emitter cap layer on a Heterojunction Bipolar Transistor (...
02/28/2012
7727847Method for manufacturing display device
A light-absorbing layer is selectively formed over an insulating surface, an insulating layer is formed over the insulating surface and the light-absorbing layer, the insulating surface, the light-absorbing layer, and the insulating layer are irradiated with laser l...
06/01/2010
7682919Semiconductor process and PMOS varactor
A method in the fabrication of an integrated circuit including a PMOS varactor and an npn transistor, comprises the steps of (i) simultaneously forming buried n+-doped regions (31) for the PMOS varactor and the npn transistor in a p-doped substrate...
03/23/2010
7625803Memory devices, electronic systems, and methods of forming memory devices
The invention includes a memory device having a capacitor in combination with a transistor. The memory device can be within a TFT construction. The capacitor is configured to provide both area and perimeter components of capacitance for capacitive enhancement. The c...
12/01/2009
7439144CMOS gate structures fabricated by selective oxidation
A sidewall image transfer process for forming sub-lithographic structures employs a layer of sacrificial polymer containing silicon that is deposited over a gate conductor layer and covered by a cover layer. The sacrificial polymer layer is patterned with convention...
10/21/2008
7342276Method and apparatus utilizing monocrystalline insulator
A semiconductor device, including: a semiconductor material; a conductive element; and a substantially monocrystalline insulator disposed between the semiconductor material and the conductive eleme...
03/11/2008
7303968Semiconductor device and method having multiple subcollectors formed on a common wafer
A semiconductor device and a method of fabricating a semiconductor device having multiple subcollectors which are formed in a common wafer, in order to provide multiple structures having different characteristic and frequency response are provided. The subcollectors...
12/04/2007
7300595Method for filling concave portions of concavo-convex pattern and method for manufacturing magnetic recording medium
A method for filling concave portions of a concavo-convex pattern by which the concave portions of the concavo-convex pattern can be filled to flatten the surface with reliability, and a method for manufacturing a magnetic recording medium by which a magnetic record...
11/27/2007
7273788Ultra-thin semiconductors bonded on glass substrates
A method for forming a semiconductor on insulator structure includes providing a glass substrate, providing a semiconductor wafer, and performing a bonding cut process on the semiconductor wafer and the glass substrate to provide a thin semiconductor layer bonded to...
09/25/2007
7262428Strained Si/SiGe/SOI islands and processes of making same
A process of making a strained silicon-on-insulator structure is disclosed. A recess is formed in a substrate to laterally isolate an active area. An undercutting etch forms a bubble recess under the active area to partially vertically isolate the active area. A the...
08/28/2007
7247892Imaging array utilizing thyristor-based pixel elements
An improved imaging array (and corresponding method of operation) includes a plurality of heterojunction thyristor-based pixel elements disposed within resonant cavities formed on a substrate. Each thyristor-based pixel element includes complementary n-type and p-ty...
07/24/2007
7176098Semiconductor element and method for fabricating the same
A heterojunction bipolar transistor comprises a collector layer, a base layer formed on the collector layer and an emitter layer formed on the base layer. The emitter layer includes a first semiconductor layer covering the entire top surface of the base layer and a ...
02/13/2007
7170109Heterojunction semiconductor device with element isolation structure
A technique enabling to improve element isolation characteristic of a semiconductor device is provided. An element isolation structure is provided in a semiconductor substrate in which a silicon layer, a compound semiconductor layer and a semiconductor layer are lam...
01/30/2007
7166517Semiconductor device and method of manufacture thereof
The present invention provides a method of manufacturing a semiconductor device which includes an amorphous semiconductor film forming treatment of supplying a starting material gas containing germanium to a semiconductor substrate, thereby forming an amorphous semi...
01/23/2007
7153753Strained Si/SiGe/SOI islands and processes of making same
A process of making a strained silicon-on-insulator structure is disclosed. A recess is formed in a substrate to laterally isolate an active area. An undercutting etch forms a bubble recess under the active area to partially vertically isolate the active area. A the...
12/26/2006
7132320Method for manufacturing semiconductor device
The present invention achieves the enhancement of a manufacturing yield factor and the reduction of manufacturing cost in a manufacturing method of a semiconductor device having a hetero junction bipolar transistor (HBT), a Schottky diode and a resistance element. T...
11/07/2006
7115426Method and apparatus for addressing thickness variations of a trench floor formed in a semiconductor substrate
A method for utilizing interference fringe patterns generated when milling a trench through a semiconductor substrate by a method such as FIB milling, to determine and optimize the thickness uniformity of the trench bottom. The interference fringes may be mapped and...
10/03/2006
7049681Bipolar transistor device having phosphorous
A Si1-xGex layer 111b functioning as the base composed of an i-Si1-xGex layer and a p+ Si1-xGex layer is formed on a collector layer 102, and a Si cap layer 111
05/23/2006
7037799Breakdown voltage adjustment for bipolar transistors
Devices and methods are disclosed related to a bipolar transistor device and methods of fabrication. A top region is formed at a surface of and within a base region. The top region is formed by implanting a dopant of an opposite conductivity to that of the base regi...
05/02/2006
7018884Method for a parallel production of an MOS transistor and a bipolar transistor
The present invention provides a method for parallel production of an MOS transistor in an MOS area of a substrate and a bipolar transistor in a bipolar area of the substrate. The method comprises generating an MOS preparation structure in the MOS area, wherein the ...
03/28/2006
7008854Silicon oxycarbide substrates for bonded silicon on insulator
A method for forming a semiconductor on insulator structure includes forming a semiconductor layer on an insulating substrate, where the substrate is a different material than the semiconductor layer, and has a coefficient of thermal expansion substantially equal to...
03/07/2006
6992338CMOS transistor spacers formed in a BiCMOS process
According to an exemplary method in one embodiment, a transistor gate is fabricated on a substrate. Next, an etch stop layer may be deposited on the substrate. The etch stop layer may, for example, be TEOS silicon dioxide. Thereafter, a conformal layer is deposited ...
01/31/2006
6953728Semiconductor device and method of manufacturing thereof
This semiconductor device manufacturing method comprises the steps of: forming a thick gate oxide film (thick oxide film) in a first region of a substrate, forming a thin gate oxide film (thin oxide layer) in a second region, and then, applying oxynitridation to the...
10/11/2005
6951790Method of forming select lines for NAND memory devices
Methods and apparatus are provided. A NAND memory array has a select line coupled to each of a plurality of NAND strings of memory cells of the memory array. The select line has a select gate at each intersection of one of the plurality of NAND strings and the selec...
10/04/2005
6929984Gettering using voids formed by surface transformation
One aspect of this disclosure relates to a method for creating a gettering site in a semiconductor wafer. In various embodiments, a predetermined arrangement of a plurality of holes is formed in the semiconductor wafer through a surface of the wafer. The wafer is an...
08/16/2005
6919615Semiconductor device for integrated injection logic cell and process for fabricating the same
A semiconductor device for an integrated injection logic cell having a pnp bipolar transistor structure formed on a semiconductor substrate, wherein at least one layer of insulating films formed on a base region of the pnp bipolar transistor structure is comprised o...
07/19/2005
6913981Method of fabricating a bipolar transistor using selective epitaxially grown SiGe base layer
Embodiments of a bipolar transistor are disclosed, along with methods for making the transistor. An exemplary transistor includes a collector region in a semiconductor substrate, a base layer overlying the collector region and bound by a field oxide layer, a dielect...
07/05/2005
6911369Discontinuity prevention for SiGe deposition
The present disclosure provides a process for producing a SiGe layer in a bipolar device having a reduced amount of gaps or discontinuities on a shallow trench isolation (STI) region use for a base electrode connection. The process is used for forming an SiGe layer ...
06/28/2005
6894362Method and apparatus for a self-aligned heterojunction bipolar transistor using dielectric assisted metal liftoff process
Disclosed is a manufacturing method to fabricate Heterojunction Bipolar Transistors (HBTs) that enables self-alignment of emitter and base metal contact layers with precise sub-micron spacing using a dielectric-assisted metal lift-off process. Such an HBT process re...
05/17/2005
6828205Method using wet etching to trim a critical dimension
A method for using an isotropic wet etching process chemical process for trimming semiconductor feature sizes with improved critical dimension control including providing a hard mask overlying a substrate included in a semiconductor wafer said hard mask patterned fo...
12/07/2004
6800532Method of manufacturing a semiconductor device comprising a bipolar transistor and a variable capacitor
A variable capacitor includes an N+ layer including a variable capacitance region, a P+ layer epitaxially grown on the N+ layer and formed from a SiGe film and a Si film, and a P-type electrode. An NPN-HBT (Hetero-junction Bipolar Tr...
10/05/2004
6784063Method for fabricating BiCMOS transistor
The present invention discloses a method for fabricating a BiCMOS transistor, which improves the high frequency characteristics of a bipolar transistor by reducing base resistance and a parasitic capacitance between the base and collector. The method comprises the s...
08/31/2004
6780725METHOD FOR FORMING A SEMICONDUCTOR DEVICE INCLUDING FORMING VERTICAL NPN AND PNP TRANSISTORS BY EXPOSING THE EPITAXIAL LAYER, FORMING A MONOCRYSTAL LAYER AND ADJUSTING THE IMPURITY CONCENTRATION IN THE EPITAXIAL LAYER
A method of manufacturing vertical NPN and PNP transistors on a substrate includes forming a first oxide film, a P-polycrystal silicon film, and a second oxide film successively on N-silicon epitaxial film on the substrate. An opening is made in the first oxide film...
08/24/2004
6767774Producing multi-color stable light emitting organic displays
A polymer or organic light emitting display may be formed on a substrate by patterning the light emitting material using a screen printing technique. In this way, displays may be formed economically, overcoming the difficulties associated with photoprocessing light ...
07/27/2004
6746928Method for opening a semiconductor region for fabricating an HBT
According to one disclosed embodiment, a transistor gate is fabricated on a substrate. For example, the gate can be a polycrystalline silicon gate in a FET. Thereafter, a conformal layer is deposited over the substrate and the gate and is then etched back to form sp...
06/08/2004
6727146Semiconductor device and method of manufacturing thereof
This semiconductor device manufacturing method comprises the steps of: forming a thick gate oxide film (thick oxide film) in a first region of a substrate, forming a thin gate oxide film (thin oxide layer) in a second region, and then, applying oxynitridation to the...
04/27/2004
6723476Methods of patterning materials; and photomasks
The invention includes a method of patterning a mass of material. A beam of activated particles is formed proximate the mass of material, and a pattern of deposit is formed on a surface of the mass with the beam of activated particles. The mass is then etched while ...
04/20/2004
6649458Method for manufacturing semiconductor device with hetero junction bipolar transistor
The present invention achieves the enhancement of a manufacturing yield factor and the reduction of manufacturing cost in a manufacturing method of a semiconductor device having a hetero junction bipolar transistor (HBT), a Schottky diode and a resistance...
11/18/2003
6645875Method of processing metal and method of manufacturing semiconductor device using the metal
When a barrier metal disposed on a thin film resistor material is wet-etched to expose the underlying thin film resistor material as a thin film resistor, the wet etching is performed at first and second steps. The first step is performed using H2
11/11/2003
6624051Semiconductor thin film and semiconductor device
After an amorphous semiconductor thin film is crystallized by utilizing a catalyst element, the catalyst element is removed by performing a heat treatment in an atmosphere containing a halogen element. A resulting crystalline semiconductor thin film has f...
09/23/2003
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