Class 438/297 - Recessed oxide formed by localized oxidation (i.e., LOCOS)

Subclass of Class 438 - Semiconductor device manufacturing: process
Definition: Process for making an insulated gate field effect transistor
No. of patents: 592
Last issue date: 04/23/2013

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Number	Title	Issue Date
8426282	Method for forming semiconductor substrate isolation The present invention provides a method for forming a semiconductor substrate isolation, comprising: providing a semiconductor substrate; forming a first oxide layer and a nitride layer sequentially on the semiconductor substrate; forming openings in the nitride lay...	04/23/2013
8318567	Thermal treatment equipment and method for heat-treating The invention provides a method for activating impurity element added to a semiconductor and performing gettering process in shirt time, and a thermal treatment equipment enabling to perform such the heat-treating. The thermal treatment equipment comprises treatment...	11/27/2012
7863145	Method and resulting structure using silver for LCOS devices A method for fabricating an LCOS device. The method includes providing a semiconductor substrate and forming a plurality of MOS transistor devices formed on a portion of the semiconductor substrate. The method includes forming a first dielectric layer overlying the ...	01/04/2011
7855117	Method of forming a thin layer and method of manufacturing a semiconductor device In a method of forming a thin layer (e.g., a charge trapping nitride layer) of a semiconductor device (e.g. a charge trapping type non-volatile memory device), the nitride layer may be formed on a first area of a substrate. A blocking layer may be formed on the nitr...	12/21/2010
7759205	Methods for fabricating semiconductor devices minimizing under-oxide regrowth Methods for producing a semiconductor device are provided. In one embodiment, a method includes the steps of: (i) fabricating a partially-completed semiconductor device including a substrate, a source/drain region in the substrate, a gate stack overlaying the substr...	07/20/2010
7666747	Process of manufacturing semiconductor device A method that suppresses etching damage without increasing a chip area of a semiconductor device. An integrated circuit including a MOS transistor is formed in a device area, and a discharge diffusion region is formed in a device area, and a discharge diffusion regi...	02/23/2010
7608515	Diffusion layer for stressed semiconductor devices A diffusion layer for semiconductor devices is provided. In accordance with embodiments of the present invention, a semiconductor device, such as a transistor, comprises doped regions surrounded by a diffusion barrier. The diffusion barrier may be formed by recessin...	10/27/2009
7544574	Methods for discretized processing of regions of a substrate The present invention provides methods and systems for discretized, combinatorial processing of regions of a substrate such as for the discovery, implementation, optimization, and qualification of new materials, processes, and process sequence integration schemes us...	06/09/2009
7476592	Method for manufacturing semiconductor device A semiconductor device is provided. The semiconductor device according to the present invention includes a semiconductor substrate, a second insulation layer, a buffer insulation layer adjacent to the second insulation layer, a third insulation layer and transistors...	01/13/2009
7436030	Strained MOSFETs on separated silicon layers A method of fabricating and a structure of an IC incorporating strained MOSFETs on separated silicon layers are disclosed. N-channel field effect transistors (nFET) and P-channel FETs (pFET) are formed on the separated silicon layers, respectively. Shallow trench in...	10/14/2008
7425475	Method for fabricating semiconductor device and semiconductor device A method for fabricating a semiconductor device according to the present invention is a method for fabricating a semiconductor device including a substrate layer including a plurality of first regions each having an active region and a plurality of second regions ea...	09/16/2008
7384836	Integrated circuit transistor insulating region fabrication method A transistor of an integrated circuit is provided. A first doped well region is formed in a well layer at a first active region. At least part of the first doped well region is adjacent to a gate electrode of the transistor. A recess is formed in the first doped wel...	06/10/2008
7374999	Semiconductor device A semiconductor device includes a substrate including a high-voltage transistor area provided with a high-voltage transistor and a low-voltage transistor area provided with a low-voltage transistor; a LOCOS layer provided as a device isolation layer of the high-volt...	05/20/2008
7371645	Method of manufacturing a field effect transistor device with recessed channel and corner gate device Fabrication of recessed channel array transistors (RCAT) with a corner gate device includes forming pockets between a semiconductor fin that includes a gate groove and neighboring shallow trench isolations that extend along longs sides of the semiconductor fin. A pr...	05/13/2008
7368045	Gate stack engineering by electrochemical processing utilizing through-gate-dielectric current flow A method is provided for electroplating a gate metal or other conducting or semiconducting material directly on a dielectric such as a gate dielectric. The method involves selecting a substrate, dielectric layer, and electrolyte solution or melt, wherein the combina...	05/06/2008
7364997	Methods of forming integrated circuitry and methods of forming local interconnects In one implementation, field oxide is grown within bulk semiconductive material in a first circuitry area and not over immediately adjacent bulk semiconductive material in a second circuitry area. The field oxide is etched from the first circuitry area. After the et...	04/29/2008
7358168	Ion implantation method for forming a shallow junction A shallow junction that previously would require the use of a low-energy ion implanter can be directly formed by high-energy or middle-energy ion implanters such that the manufacturer need not purchase a new low-energy ion implanter. In one embodiment, an ion-implan...	04/15/2008
7358577	High voltage field effect transistor A high voltage field effect transistor according to the present invention has: a p-type low concentration drain region and a low concentration source region formed on both sides of a channel formation region within a n-type region of a semiconductor substrate; a hig...	04/15/2008
7358569	Semiconductor device with semiconductor layer having various thickness An SOI layer is provided in a buried oxide film and a source and a drain are provided on the upper surface of the SOI layer so that they are kept from contact with the buried oxide film. A depletion layer formed by the source, the drain, and the SOI layer extends to...	04/15/2008
7354817	Semiconductor device, manufacturing method thereof, and CMOS integrated circuit device A semiconductor device includes a semiconductor substrate. A gate electrode is formed on the semiconductor substrate via a gate insulating film. A source region and a drain region of a first conductivity type are formed on the first side and the second side of the g...	04/08/2008
7348636	CMOS transistor having different PMOS and NMOS gate electrode structures and method of fabrication thereof In a CMOS semiconductor device using a silicon germanium gate and a method of fabricating the same, a gate insulating layer, a conductive electrode layer that is a seed layer, a silicon germanium electrode layer, and an amorphous conductive electrode layer are seque...	03/25/2008
7342276	Method and apparatus utilizing monocrystalline insulator A semiconductor device, including: a semiconductor material; a conductive element; and a substantially monocrystalline insulator disposed between the semiconductor material and the conductive eleme...	03/11/2008
7342290	Semiconductor metal contamination reduction for ultra-thin gate dielectrics A bilayer dielectric structure for substantially reducing or eliminating metal contaminants formed during subsequent polysilicon deposition is provided. The bilayer dielectric structure includes an upper surface region that is rich in chlorine located atop a bottom ...	03/11/2008
7338881	Method for manufacturing semiconductor element A method for manufacturing a semiconductor element includes preparing an SOI layer having a transistor forming area and an element isolation area, forming an oxidation-resistant mask layer on the SOI layer, forming a resist mask over the transistor forming area on t...	03/04/2008
7338873	Method of fabricating a field effect transistor structure with abrupt source/drain junctions Microelectronic structures embodying the present invention include a field effect transistor (FET) having highly conductive source/drain extensions. Formation of such highly conductive source/drain extensions includes forming a passivated recess which is back filled...	03/04/2008
7335948	Integrated circuit incorporating higher voltage devices and low voltage devices therein An integrated circuit formed on a semiconductor substrate and configured to accommodate higher voltage devices and low voltage devices therein. In one embodiment, the integrated circuit includes a switch formed on the semiconductor substrate and a driver switch of a...	02/26/2008
7335549	Semiconductor device and method for fabricating the same An N-channel transistor includes: an N-type source region, a gate electrode, a P-type body region, an N-type drain offset region, and a drain contact region, which is an N-type drain region. The transistor further includes a gate insulating film that has a thin oxid...	02/26/2008
7332387	MOSFET structure and method of fabricating the same A MOSFET structure and a method of forming it are described. The thickness of a portion of the gate dielectric layer of the MOSFET structure adjacent to the drain region is increased to form a bird's beak structure. The gate-to-drain overlap capacitance is reduced b...	02/19/2008
7329599	Method for fabricating a semiconductor device Methods are provided for semiconductor devices having low contact resistance. The method in accordance with one embodiment of the invention comprises forming an insulating layer overlying a semiconductor substrate, the semiconductor substrate having a device region ...	02/12/2008
7329582	Methods for fabricating a semiconductor device, which include selectively depositing an electrically conductive material Methods are provided for fabricating a semiconductor device having an impurity doped region in a silicon substrate. The method comprises forming a metal silicide layer electrically contacting the impurity doped region and depositing a conductive layer overlying and ...	02/12/2008
7326975	Buried channel type transistor having a trench gate and method of manufacturing the same In a method of manufacturing a buried channel type transistor, a trench is formed at a surface portion of a substrate. A first and a second threshold voltage control regions are formed at portions of the substrate beneath a bottom face of the trench and adjacent to ...	02/05/2008
7326622	Method of manufacturing semiconductor MOS transistor device A method of manufacturing a metal-oxide-semiconductor (MOS) transistor device is disclosed. A semiconductor substrate having a main surface is prepared. A gate dielectric layer is formed on the main surface. A gate electrode is patterned on the gate dielectric layer...	02/05/2008
7327001	PMOS transistor with compressive dielectric capping layer A salicide layer is deposited on the source/drain regions of a PMOS transistor. A dielectric capping layer having residual compressive stress is formed on the salicide layer by depositing a plurality of PECVD dielectric sublayers and plasma-treating each sublayer. C...	02/05/2008
7316959	Semiconductor device and method for fabricating the same The semiconductor device comprises a semiconductor layer 18 formed on an insulation layer 16, a gate electrode 22 formed on the semiconductor layer with a gate insulation film 20 formed therebetween, a source/drain region 24 formed...	01/08/2008
7314792	Method for fabricating transistor of semiconductor device A method for fabricating a transistor of a semiconductor device is provided. The method includes: forming device isolation layers in a substrate including a bottom structure, thereby defining an active region; etching the active region to a predetermined depth to fo...	01/01/2008
7312125	Fully depleted strained semiconductor on insulator transistor and method of making the same An integrated circuit includes multiple layers. A semiconductor-on-insulator (SOI) wafer can be used to house transistors. Two substrates or wafers can be bonded to form the multiple layers. A strained semiconductor layer can be between a silicon germanium layer and...	12/25/2007
7291560	Method of production pitch fractionizations in semiconductor technology Spacers are formed on sidewalls of striplike parts of a pattern layer of periodic structure. The pattern layer is removed, and the spacers are covered with a further spacer layer, which is then structured to second sidewall spacers. Gaps between the spacers are fill...	11/06/2007
7288828	Metal oxide semiconductor transistor device A metal-oxide-semiconductor (MOS) transistor device is provided. The MOS transistor device includes a substrate, a gate structure, a spacer, a source/drain region and a barrier layer. The gate structure is disposed on the substrate. The gate structure includes a gat...	10/30/2007
7279399	Method of forming isolated pocket in a semiconductor substrate A family of semiconductor devices is formed in a substrate that contains no epitaxial layer. In one embodiment the family includes a 5V CMOS pair, a 12V CMOS pair, a 5V NPN, a 5V PNP, several forms of a lateral trench MOSFET, and a 30V lateral N-channel DMOS. Each o...	10/09/2007
7279732	Enhanced atomic layer deposition A method of enhanced atomic layer deposition is described. In an embodiment, the enhancement is the use of plasma. Plasma begins prior to flowing a second precursor into the chamber. The second precursor reacts with a prior precursor to deposit a layer on the substr...	10/09/2007

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Class 438/297 - Recessed oxide formed by localized oxidation (i.e., LOCOS)