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| Number | Title | Issue Date |
| 8101486 | Methods for forming isolated fin structures on bulk semiconductor material Methods are provided for fabricating a semiconductor device. A method comprises forming a layer of a first semiconductor material overlying the bulk substrate and forming a layer of a second semiconductor material overlying the layer of the first semiconductor mater... | 01/24/2012 |
| 8026142 | Method of fabricating semiconductor transistor devices with asymmetric extension and/or halo implants A method of fabricating semiconductor devices begins by providing or fabricating a device structure that includes a semiconductor material and a plurality of gate structures formed overlying the semiconductor material. The method continues by creating light dose ext... | 09/27/2011 |
| 8012836 | Semiconductor devices and methods for fabricating the same Semiconductor devices and methods for fabricating the same are provided. An exemplary embodiment of a semiconductor device comprises a substrate with a plurality of isolation structures formed therein, defining first and second areas over the substrate. A transistor... | 09/06/2011 |
| 7998818 | Method for making semiconductor element structure A method for forming a semiconductor element structure is provided. First, a substrate including a first MOS and a second MOS is provided. The gate electrode of the first MOS is connected to the gate electrode of the second MOS, wherein the first MOS includes a firs... | 08/16/2011 |
| 7919377 | Contactless flash memory array A method for forming a contactless flash memory cell array is disclosed. According to an embodiment of the invention, a plurality of active regions is formed on a substrate. An insulating layer is then deposited over the active regions, and a portion of the insulati... | 04/05/2011 |
| 7915125 | Semiconductor device and method of manufacturing the same A method of manufacturing a semiconductor device is provided which comprises: forming a first gate insulating film and a second gate insulating film in an active region of a semiconductor substrate; introducing an impurity of a first conductivity type into a first s... | 03/29/2011 |
| 7858480 | Semiconductor device and method of fabricating the same A semiconductor device according to one embodiment includes: a semiconductor substrate comprising an element isolation region; two gate electrodes formed in substantially parallel on the semiconductor substrate via respective gate insulating films; two channel regio... | 12/28/2010 |
| 7851312 | Semiconductor component and method of manufacture A semiconductor component that includes a field plate and a semiconductor device and a method of manufacturing the semiconductor component. A body region is formed in a semiconductor material that has a major surface. A gate trench is formed in the epitaxial layer a... | 12/14/2010 |
| 7829419 | Semiconductor device and method for manufacturing the same A semiconductor device is provided with a semiconductor substrate, a plurality of active regions separated from each other by element isolation regions formed on the semiconductor substrate; gate oxide films formed on the active regions; gate electrodes formed on th... | 11/09/2010 |
| 7781291 | Semiconductor device and method for fabricating the same A semiconductor device includes a memory section formed at a semiconductor substrate and including a first transistor having an ONO film that can store charges between the semiconductor substrate and a memory electrode and a first STI region for isolating the first ... | 08/24/2010 |
| 7767531 | Method of forming transistor having channel region at sidewall of channel portion hole According to some embodiments of the invention, a method of forming a transistor includes forming a device isolation layer in a semiconductor substrate. The device isolation layer is formed to define at least one active region. A channel region is formed in a predet... | 08/03/2010 |
| 7732283 | Fabricating method of semiconductor device A method of fabricating a semiconductor device is provided. Spacers can be formed on adjacent gate structures and used as an ion implantation mask for forming source/drain regions. The spacers can include a nitride layer and an oxide layer. An etch stop layer can be... | 06/08/2010 |
| 7713825 | LDMOS transistor double diffused region formation process Exemplary embodiments provide manufacturing methods for forming a doped region in a semiconductor. Specifically, the doped region can be formed by multiple ion implantation processes using a patterned photoresist (PR) layer as a mask. The patterned PR layer can be f... | 05/11/2010 |
| 7704837 | Cell based integrated circuit and unit cell architecture therefor A unit cell for an integrated circuit includes a first conductive type active region and a second conductive type active region which extend in a first direction. Each of the active regions has first and second ends. The first end of the second conductive type activ... | 04/27/2010 |
| 7700444 | Post-lithography misalignment correction with shadow effect for multiple patterning Misalignment created during a multiple-patterning process is a serious challenge for critical dimension (CD) control and layout design in continuing integrated-circuit device scaling. A number of post-lithography misalignment correction technologies based on the sha... | 04/20/2010 |
| 7696048 | Method of improving gate resistance in a memory array A semiconductor device is formed with a normal, non-recessed, spacer structure in a cell region and a recessed spacer structure in a peripheral region. The recessed spacer structure is formed as by etch masking those in the cell region and exposing those in the peri... | 04/13/2010 |
| 7585733 | Method of manufacturing semiconductor device having multiple gate insulation films A method of manufacturing a semiconductor device includes the steps of: preparing a semiconductor substrate having first and second element forming regions, the first and second element forming regions divided by an element separating insulation film; forming a firs... | 09/08/2009 |
| 7537998 | Method for forming salicide in semiconductor device Forming salicide in a semiconductor device includes the steps of: forming a first and a second gate oxide film and in a non-salicide region and a salicide region, the first gate oxide film being thicker than the second gate oxide film; forming a conductive layer and... | 05/26/2009 |
| 7528042 | Method for fabricating semiconductor devices having dual gate oxide layer A method for forming a dual gate oxide layer, including the steps of: a) forming a gate oxide layer on a semiconductor substrate; and b) increasing a thickness of a part of the gate oxide layer by performing a decoupled plasma treatment. Additional heat processes ar... | 05/05/2009 |
| 7514325 | Fin-FET having GAA structure and methods of fabricating the same Example embodiments of the present invention relate to a semiconductor device and methods of fabricating the same. Other example embodiments of the present invention relate to a fin-field effect transistor (Fin-FET) having a fin-type channel region and methods of fa... | 04/07/2009 |
| 7429524 | Transistor design self-aligned to contact The present invention provides a method of manufacturing a transistor device, a transistor device, and a method for manufacturing an integrated circuit. In one aspect, the method of manufacturing a transistor device includes providing a gate structure (140) o... | 09/30/2008 |
| 7422945 | Cell based integrated circuit and unit cell architecture therefor In a unit cell, a first conductive type active region and a second conductive type active region are provided. Those two active regions extend in a first direction. Each of the active regions have first and second ends thereof. The first end of the second conductive... | 09/09/2008 |
| 7422949 | High voltage transistor and method of manufacturing the same The present invention relates to a high voltage transistor and method of manufacturing the same. The high voltage transistor includes: a channel region which is formed in a semiconductor substrate; a gate insulating film which is formed on the channel region of the ... | 09/09/2008 |
| 7417291 | Method for manufacturing semiconductor integrated circuit device Disclosed is a technique for reducing the leak current by reducing contamination of metal composing a polymetal gate of a MISFET. Of a polycrystalline silicon film, a WN film, a W film, and a cap insulating film formed on a gate insulating film on a p-type well (sem... | 08/26/2008 |
| 7410851 | Low voltage superjunction MOSFET A power semiconductor switching device such as a power MOSFET that includes breakdown voltage enhancement regions formed by self-alignment. ... | 08/12/2008 |
| 7405110 | Methods of forming implant regions relative to transistor gates The invention includes methods of forming implant regions between and/or under transistor gates. In one aspect, a pair of transistor gates is partially formed, and a layer of conductive material is left extending between the transistor gates. A dopant is implanted t... | 07/29/2008 |
| 7399671 | Disposable pillars for contact formation Sacrificial plugs for forming contacts in integrated circuits, as well as methods of forming connections in integrated circuit arrays are disclosed. Various pattern transfer and etching steps can be used to create densely-packed features and the connections between ... | 07/15/2008 |
| 7393737 | Semiconductor device and a method of manufacturing the same A semiconductor device which, in spite of the existence of a dummy active region, eliminates the need for a larger chip area and improves the surface flatness of the semiconductor substrate. In the process of manufacturing it, a thick gate insulating film for a high... | 07/01/2008 |
| 7371667 | Semiconductor device and method of fabricating same There are disclosed TFTs that have excellent characteristics and can be fabricated with a high yield. The TFTs are fabricated, using an active layer crystallized by making use of nickel. Gate electrodes are comprising tantalum. Phosphorus is introduced into source/d... | 05/13/2008 |
| 7371647 | Methods of forming transistors The invention encompasses a method of forming a structure over a semiconductor substrate. A silicon dioxide containing layer is formed across at least some of the substrate. Nitrogen is formed within the silicon dioxide containing layer. Substantially all of the nit... | 05/13/2008 |
| 7372108 | Semiconductor device and manufacturing method thereof The present invention discloses a semiconductor device and a manufacturing method thereof which improves its characteristics even though it is miniaturized. According to one aspect of the present invention, it is provided a semiconductor device comprising a first se... | 05/13/2008 |
| 7364959 | Method for manufacturing a MOS transistor A method for manufacturing a MOS transistor integrated into a chip of semi-conductive material comprising a first and a second active region which extend from the inside of the chip to a surface of the chip. The method comprises the steps of: a) forming a layer of i... | 04/29/2008 |
| 7365015 | Damascene replacement metal gate process with controlled gate profile and length using SiGeas sacrificial material A method of forming a metal gate in a wafer. PolySi1-xGex and polysilicon are used to form a tapered groove. Gate oxide, PolySi1-xGex, and polysilicon is deposited on a wafer. A resist pattern is formed. A portion of the p... | 04/29/2008 |
| 7364973 | Method of manufacturing NOR-type mask ROM device and semiconductor device including the same A method of manufacturing a NOR-type mask ROM device includes forming a first gate electrode for an OFF cell and a second gate electrode for an ON cell on a semiconductor substrate of a first conductivity type. To code the mask ROM device, a plurality of source/drai... | 04/29/2008 |
| 7361583 | RF semiconductor devices and methods for fabricating the same RF semiconductor devices and methods of making the same are disclosed. In a disclosed method, a trench for defining an active region and an element isolation region is formed in a semiconductor substrate. One or more gate lines is then formed within the active regio... | 04/22/2008 |
| 7358574 | Semiconductor device having silicide-blocking layer and fabrication method thereof A semiconductor device having a silicide-blocking layer is provided. The device includes a field oxide layer defining an active region, source/drain regions in the active region of a substrate, a gate oxide layer and a gate electrode on the substrate between the sou... | 04/15/2008 |
| 7355256 | MOS Devices with different gate lengths and different gate polysilicon grain sizes A semiconductor device 1 according to the present invention includes a semiconductor substrate 5, a first transistor 10 which is formed on the semiconductor substrate 5 and includes a first gate electrode portion 16 constituted by ... | 04/08/2008 |
| 7354825 | Methods and apparatus to form gates in semiconductor devices A method of formation a gate in a semiconductor device includes forming a gate oxide layer and a sacrificial layer on a semiconductor substrate. The sacrificial layer is then selectively etched to form a sidewall opening. Next, a polycrystalline silicon layer is for... | 04/08/2008 |
| 7354838 | Technique for forming a contact insulation layer with enhanced stress transfer efficiency By removing an outer spacer, used for the formation of highly complex lateral dopant profiles, prior to the formation of metal silicide, a high degree of process compatibility with conventional processes is obtained, while at the same time a contact liner layer may ... | 04/08/2008 |
| 7351627 | Method of manufacturing semiconductor device using gate-through ion implantation Disclosed herein is a method of manufacturing a semiconductor device via gate-through ion implantation, comprising forming a gate stack on a semiconductor substrate and performing ion implantation for control of the threshold voltage and junction ion implantation fo... | 04/01/2008 |
