Class 438/274 - Short formed in recess in substrate

Subclass of Class 438 - Semiconductor device manufacturing: process
Definition: Process wherein the integral short is formed in a groove
No. of patents: 67
Last issue date: 08/12/2008

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Number	Title	Issue Date
7411266	Semiconductor device having trench charge compensation regions and method In one embodiment, a semiconductor device is formed having charge compensation trenches in proximity to channel regions of the device. The charge compensation trenches comprise at least two opposite conductivity type semiconductor layers. A channel connecting region...	08/12/2008
7361585	System for and method of planarizing the contact region of a via by use of a continuous inline vacuum deposition A multi-layer electronic device can be formed to include an insulative substrate (212), a first vapor deposited conductor layer (312) on the insulative substrate (212), a first vapor deposited insulator layer (314) on the first conductor ...	04/22/2008
7354786	Sensor element with trenched cavity A micromechanical sensor element and a method for the production of a micromechanical sensor element that is suitable, for example in a micromechanical component, for detecting a physical quantity. Provision is made for the sensor element to include a substrate, an ...	04/08/2008
7348233	Methods for fabricating a CMOS device including silicide contacts Methods are provided for fabricating a CMOS device having a silicon substrate including a first N-type region and a second P-type region. The method includes the steps of forming a first gate electrode overlying the first N-type region and a second gate electrode ov...	03/25/2008
7348630	Semiconductor device for high frequency uses and manufacturing method of the same The semiconductor device has a semiconductor substrate, gate electrodes formed above the semiconductor substrate, and a pair of impurity diffusion layers formed in a surface layer of the semiconductor substrate at both sides of each of the gate electrodes. The semic...	03/25/2008
7344943	Method for forming a trench MOSFET having self-aligned features A semiconductor device is formed as follows. A plurality of trenches is formed in a silicon layer. An insulating layer filling an upper portion of each trench is formed. Exposed silicon is removed from adjacent the trenches to expose an edge of the insulating layer ...	03/18/2008
7338864	Memory device and method for fabricating the same Disclosed are a memory device and a method for fabricating the same. The memory device includes: a substrate provided with a trench; a bit line contact junction formed beneath the trench; a plurality of storage node contact junctions formed outside the trench; and a...	03/04/2008
7332396	Semiconductor device with recessed trench and method of fabricating the same A semiconductor device with a recessed channel and a method of fabricating the same are provided. The semiconductor device comprises a substrate, a gate, a source, a drain, and a reverse spacer. The substrate comprises a recessed trench. The gate is formed above the...	02/19/2008
7314792	Method for fabricating transistor of semiconductor device A method for fabricating a transistor of a semiconductor device is provided. The method includes: forming device isolation layers in a substrate including a bottom structure, thereby defining an active region; etching the active region to a predetermined depth to fo...	01/01/2008
7314794	Low-cost high-performance planar back-gate CMOS A method of fabricating a high-performance planar back-gate CMOS structure having superior short-channel characteristics and reduced capacitance using processing steps that are not too lengthy or costly is provided. Also provided is a high-performance planar back-ga...	01/01/2008
7282412	Trench semiconductor device having gate oxide layer with multiple thicknesses and processes of fabricating the same The a trench semiconductor device such as a power MOSFET the high electric field at the corner of the trench is diminished by increasing the thickness of the gate oxide layer at the bottom of the trench. Several processes for manufacturing such devices are described...	10/16/2007
7244654	Drive current improvement from recessed SiGe incorporation close to gate A method (100) of forming a transistor includes forming a gate structure (106, 108) over a semiconductor body and forming recesses (112) substantially aligned to the gate structure in the semiconductor body. Silicon germanium is then epitaxially...	07/17/2007
7126173	Method for enhancing the electric connection between a power electronic device and its package An electronic power device of improved structure is fabricated with MOS technology to have a gate finger region and corresponding source regions on either sides of the gate region. This device has a first-level metal layer arranged to independently contact the gate ...	10/24/2006
7087973	Ballast resistors for transistor devices A transistor is formed with a source ballast resistor that regulates channel current. In an LDMOS transistor embodiment, the source ballast resistance may be formed using a high sheet resistance diffusion self aligned to the polysilicon gate, and/or by extending a d...	08/08/2006
7029969	Method of manufacture of a silicon carbide MOSFET including a masking with a tapered shape and implanting ions at an angle A semiconductor device and its manufacturing method in which the trade-off relationship between channel resistance and JFET resistance is improved. The same mask is used to form a source region and a base region by ion implantation. In a vertical MOSFET including Si...	04/18/2006
7029977	Fabrication method of semiconductor wafer A fabrication method of a semiconductor wafer can fill trenches formed in a semiconductor substrate with an epitaxial film with high crystal quality without leaving cavities in the trenches. The trenches are formed in the first conductivity type semiconductor substr...	04/18/2006
7005352	Trench-type MOSFET having a reduced device pitch and on-resistance A trench-type lateral power MOSFET is manufactured by forming an n−-type diffusion region, which will be a drift region, on a p−-type substrate; selectively removing a part of substrate and a part of n−-type diffusion region to...	02/28/2006
6977203	Method of forming narrow trenches in semiconductor substrates A method of forming a trench within a semiconductor substrate. The method comprises, for example, the following: (a) providing a semiconductor substrate; (b) providing a patterned first CVD-deposited masking material layer having a first aperture over the semiconduc...	12/20/2005
6975015	Modulated trigger device An integrated circuit structure, a trigger device and a method of electrostatic discharge protection, the integrated circuit structure including: a substrate having a top surface defining a horizontal direction, the substrate of a first dopant type; a first horizont...	12/13/2005
6972232	Method of manufacturing a semiconductor device There is provided a method of manufacturing a high quality P-channel trench MOSFET which stably operates. In the method of manufacturing a P-channel trench MOSFET having a P-type gate electrode, the process in which BF2 ions are implanted into a polycryst...	12/06/2005
6940126	Field-effect-controllable semiconductor component and method for producing the semiconductor component A semiconductor component has at least one first terminal zone of a first conductivity type in a semiconductor body. The first terminal zone is contact-connected by a first terminal electrode. A drift zone of the first conductivity type is adjoined by a second termi...	09/06/2005
6933215	Process for doping a semiconductor body In a method of producing a doped semiconductor structure with a trench, it is possible to set the doping of the trench side walls independently from the doping of the trench bottom, and to set different doping concentrations of the individual trench side walls relat...	08/23/2005
6921939	Power MOSFET and method for forming same using a self-aligned body implant A method for making a power MOSFET includes forming a trench in a semiconductor layer, forming a gate dielectric layer lining the trench, forming a gate conducting layer in a lower portion of the trench, and forming a dielectric layer to fill an upper portion of the...	07/26/2005
6916745	Structure and method for forming a trench MOSFET having self-aligned features In accordance with an embodiment of the present invention, a semiconductor device is formed as follows. An exposed surface area of a silicon layer where silicon can be removed is defined. A portion of the silicon layer is removed to form a middle section of a trench...	07/12/2005
6902980	Method of fabricating a high performance MOSFET device featuring formation of an elevated source/drain region A method of fabricating a MOSFET device featuring a raised source/drain structure on a heavily doped source/drain region as well as on a portion of a lightly doped source/drain (LDD), region, after removal of an insulator spacer component, has been developed. After ...	06/07/2005
6875657	Method of fabricating trench MIS device with graduated gate oxide layer A process for manufacturing a trench MIS device includes depositing a conformal nitride layer in the trench; etching the nitride layer to create an exposed area at the bottom of the trench; and heating the substrate and thereby growing an oxide layer in the exposed ...	04/05/2005
6855581	Method for fabricating a high-voltage high-power integrated circuit device The present invention relates to a method of fabricating a high-voltage high-power integrated circuit device using a substrate of a SOI structure in which an insulating film and a silicon layer are sequentially stacked on a silicon substrate. The method comprising t...	02/15/2005
6639275	Semiconductor device with vertical MOSFET A semiconductor device improves the gate withstand voltage of vertical MOSFETs and raises their operation speed. The gate electrode is formed in the trench of the second semiconductor layer. The interlayer dielectric layer has the contact hole that expose...	10/28/2003
6432775	Trench DMOS transistor structure having a low resistance path to a drain contact located on an upper surface A semiconductor device includes a first region of semiconductor material, which is doped to a first concentration with a dopant of a first conductivity type. A gate trench formed within the first region has sides and a bottom. A drain access trench is als...	08/13/2002
6426259	Vertical field effect transistor with metal oxide as sidewall gate insulator For fabricating a vertical field effect transistor on a semiconductor substrate, a first layer of dielectric material is deposited on the semiconductor substrate. A layer of metal is then deposited on the first layer of dielectric material, and a second l...	07/30/2002
6291298	Process of manufacturing Trench gate semiconductor device having gate oxide layer with multiple thicknesses The a trench semiconductor device such as a power MOSFET the high electric field at the corner of the trench is diminished by increasing the thickness of the gate oxide layer at the bottom of the trench. Several processes for manufacturing such devices ar...	09/18/2001
6214673	Process for forming vertical semiconductor device having increased source contact area A process for forming a vertical semiconductor device having increased source contact area comprises forming a gate and a well region in a silicon substrate. Using dopant of a second conductivity type, a shallow source region is formed in the well region,...	04/10/2001
6150671	Semiconductor device having high channel mobility and a high breakdown voltage for high power applications A transistor of SiC having a drain and a highly doped substrate layer is formed on the drain. A highly n type buffer layer may optionally be formed on the substrate layer. A low doped n-type drift layer, a p-type base layer, a high doped n-type source reg...	11/21/2000
6127248	Fabrication method for semiconductor device A fabrication method for a semiconductor device capable of adjusting a thickness of each portion of gate insulating film at both sides of a gate, which includes the steps of: providing a semiconductor substrate having a first region and a second region; f...	10/03/2000
6096608	Bidirectional trench gated power mosfet with submerged body bus extending underneath gate trench A trench power MOSFET includes a body region which is not shorted to the source region and which is entirely covered by the source region within each cell of the MOSFET. The body region within each MOSFET cell is brought to the surface of the substrate (o...	08/01/2000
5918114	Method of forming vertical trench-gate semiconductor devices having self-aligned source and body regions Methods of forming vertical trench-gate semiconductor devices include the steps of patterning an oxidation resistant layer having an opening therein, on a face of a semiconductor substrate, and then forming a trench in the semiconductor substrate, opposit...	06/29/1999
5891776	Methods of forming insulated-gate semiconductor devices using self-aligned trench sidewall diffusion techniques A method of forming an insulated gate semiconductor device includes the steps of patterning an insulated gate electrode on a face of a substrate containing a first conductivity type region and forming a trench at the face using the gate electrode as a mas...	04/06/1999
5672528	Method for making semiconductor device having field limiting ring A semiconductor device characterized by a field limiting ring formed by a number of field limiting cells that define wells which are laterally diffused to form a continuous equipotential ring between interior and exterior regions of a semiconductor device...	09/30/1997
5583060	Method for manufacturing field effect controlled semiconductor components The base zones of MOSFETs and IGBTs are generated by implanting dopants of the second conductivity type into the surface of a first layer of the first conductivity type, and a second layer of the first conductivity type is deposited thereon. During the de...	12/10/1996
5576245	Method of making vertical current flow field effect transistor A transistor constructed in accordance with our invention includes an N+ substrate, an N- region formed on the N+ substrate, a P- body region formed on the N- region, and an N+ source region formed on the P- body region. A vertical groove extends through ...	11/19/1996

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Class 438/274 - Short formed in recess in substrate