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| Number | Title | Issue Date |
| 8187940 | Method for fabricating semiconductor device A method for fabricating a semiconductor device, including (a) etching a semiconductor substrate to form a first trench defining an active region; (b) forming a first spacer on sidewalls of the first trench; (c) etching a bottom of the first trench to form a second ... | 05/29/2012 |
| 8187941 | Method of manufacturing semiconductor device A trench gate type power transistor of high performance is provided. A trench gate as a gate electrode is formed in a super junction structure comprising a drain layer and an epitaxial layer. In this case, the gate electrode is formed in such a manner that an upper ... | 05/29/2012 |
| 8187939 | Direct contact in trench with three-mask shield gate process A semiconductor device and a method for making a semiconductor device are disclosed. A trench mask may be applied to a semiconductor substrate, which is etched to form trenches with three different widths. A first conductive material is formed at the bottom of the t... | 05/29/2012 |
| 8183112 | Method for fabricating semiconductor device with vertical channel A method for fabricating a semiconductor device with a vertical channel includes providing a substrate over which a hard mask pattern is formed, forming pillars over the substrate using the hard mask pattern thereby forming a resultant structure, forming an insulati... | 05/22/2012 |
| 8183113 | Methods of forming recessed gate structures including blocking members, and methods of forming semiconductor devices having the recessed gate structures A recessed gate structure in a semiconductor device includes a gate electrode partially buried in a substrate, a blocking member formed in the buried portion of the gate electrode, and a gate insulation layer formed between the gate electrode and the substrate. The ... | 05/22/2012 |
| 8178409 | Semiconductor device with alternately arranged P-type and N-type thin semiconductor layers and method for manufacturing the same The invention is related to a semiconductor device with alternately arranged P-type and N-type thin semiconductor layers and method for manufacturing the same. For P-type device, the method includes trench formation, thermal oxide formation on trench sidewalls, N-ty... | 05/15/2012 |
| 8173509 | Semiconductor device and method for manufacturing the same A type semiconductor device includes: a first semiconductor layer of a first conductivity type; a second semiconductor layer of a second conductivity type; a third semiconductor layer of the first conductivity type; a plurality of gate electrodes which are formed in... | 05/08/2012 |
| 8173510 | Lateral drain-extended MOSFET having channel along sidewall of drain extension dielectric An integrated circuit (200) includes one of more transistors (210) on or in a substrate (10) having semiconductor surface layer, the surface layer having a top surface. At least one of the transistors are drain extended metal-oxide-semiconductor... | 05/08/2012 |
| 8173508 | Semiconductor device having vertical type MOSFET and manufacturing method thereof A method (and resultant structure) includes forming a semiconductor layer having plural stripe-like trenches, forming a gate electrode buried partially in each of the plural trenches, and introducing an impurity into the semiconductor layer by ion implantation after... | 05/08/2012 |
| 8168496 | Single die output power stage using trench-gate low-side and LDMOS high-side MOSFETS, structure and method A voltage converter includes an output circuit having a high-side device and a low-side device which can be formed on a single die (a “PowerDie”). The high-side device can include a lateral diffused metal oxide semiconductor (LDMOS) while the low-side device can... | 05/01/2012 |
| 8168498 | Insulated gate type semiconductor device and method for fabricating the same In an insulated-gate type semiconductor device in which a gate-purpose conductive layer is embedded into a trench which is formed in a semiconductor substrate, and a source-purpose conductive layer is provided on a major surface of the semiconductor substrate, a por... | 05/01/2012 |
| 8168497 | Low-resistance electrode design A solution for designing a semiconductor device, in which two or more attributes of a pair of electrodes are determined to, for example, minimize resistance between the electrodes, is provided. Each electrode can include a current feeding contact from which multiple... | 05/01/2012 |
| 8153490 | Fabrication method of power semiconductor structure with reduced gate impedance A fabrication method of a power semiconductor structure with reduced gate impedance is provided. Firstly, a polysilicon gate is formed in a substrate. Then, dopants are implanted into the substrate with the substrate being partially shielded by the polysilicon gate.... | 04/10/2012 |
| 8148224 | Insulated gate type semiconductor device and method for fabricating the same In an insulated-gate type semiconductor device in which a gate-purpose conductive layer is embedded into a trench which is formed in a semiconductor substrate, and a source-purpose conductive layer is provided on a major surface of the semiconductor substrate, a por... | 04/03/2012 |
| 8143125 | Structure and method for forming a salicide on the gate electrode of a trench-gate FET A method for forming a trench-gate FET includes the following steps. A plurality of trenches is formed extending into a semiconductor region. A gate dielectric is formed extending along opposing sidewalls of each trench and over mesa surfaces of the semiconductor re... | 03/27/2012 |
| 8143126 | Method for forming a vertical MOS transistor A method is used to form a vertical MOS transistor. The method utilizes a semiconductor layer. An opening is etched in the semiconductor layer. A gate dielectric is formed in the opening that has a vertical portion that extends to a top surface of the first semicond... | 03/27/2012 |
| 8143124 | Methods of making power semiconductor devices with thick bottom oxide layer A method of manufacturing a semiconductor device having a charge control trench and an active control trench with a thick oxide bottom includes forming a drift region, a well region extending above the drift region, an active trench extending through the well region... | 03/27/2012 |
| 8133785 | Semiconductor device and method of manufacturing the same Provided is a method of manufacturing a semiconductor device, that buried gate electrodes are formed in a pair of trenches in a substrate, so as to be recessed from the level of the top end of the trenches, a base region is formed between a predetermined region loca... | 03/13/2012 |
| 8129245 | Methods of manufacturing power semiconductor devices with shield and gate contacts Methods of manufacturing power semiconductor devices include forming an epitaxial and dielectric layer, patterning and etching the dielectric layer, forming a first oxide layer, forming a first conductive layer on top of the first oxide layer, etching the first cond... | 03/06/2012 |
| 8124481 | Semiconductor device for reducing interference between adjoining gates and method for manufacturing the same A semiconductor device includes a semiconductor substrate having an active region having a plurality of recessed channel areas extending across the active region and a plurality of junction areas also extending across the active region. Gates are formed in and over ... | 02/28/2012 |
| 8124482 | MOS transistor with gate trench adjacent to drain extension field insulation An integrated circuit containing an MOS transistor with a trenched gate abutting an isolation dielectric layer over a drift region. The body well and source diffused region overlap the bottom surface of the gate trench. An integrated circuit containing an MOS transi... | 02/28/2012 |
| 8119485 | Semiconductor device and fabrication method thereof Disclosed herein is a fabrication method of a semiconductor device to order to increase an operation liability of the semiconductor device. A method for fabricating a semiconductor device comprises forming a recess in a semiconductor substrate, forming a word line i... | 02/21/2012 |
| 8119486 | Methods of manufacturing semiconductor devices having a recessed-channel A method according to example embodiments includes forming isolation regions in a substrate, the isolation regions defining active regions. Desired regions of the active regions and the isolation regions are removed, thereby forming recess channel trenches to a desi... | 02/21/2012 |
| 8114743 | Integrated circuit device with a semiconductor body and method for the production of an integrated circuit device An integrated circuit device with a semiconductor body and a method for the production of a semiconductor device a provided. The semiconductor body comprises a cell field with a drift zone of a first conduction type. In addition, the semiconductor device comprises a... | 02/14/2012 |
| 8105904 | Method of manufacturing semiconductor devices A semiconductor device includes an insulation layer disposed on a substrate having a first area and a second area, a first wiring disposed on the insulation layer in the first area, a first active structure disposed on the first wiring, a first gate insulation layer... | 01/31/2012 |
| 8105905 | Configuration and method to form MOSFET devices with low resistance silicide gate and mesa contact regions A novel integration scheme for forming power MOSFET, particularly forming salicides for both gate and mesa contact regions, as well as using multiple energy contact implants through the salicided layer to form conductive body contacts which short to the source regio... | 01/31/2012 |
| 8105903 | Method for making a trench MOSFET with shallow trench structures A method for making a trench MOSFET with shallow trench structures with a thick trench bottom is disclosed. The improved method resolves the problem of deterioration of breakdown voltage resulted by LOCOS having a bird's beak shape introduced in prior art, and at th... | 01/31/2012 |
| 8101484 | Method of forming a FET having ultra-low on-resistance and low gate charge In accordance with an exemplary embodiment of the invention, a substrate of a first conductivity type silicon is provided. A substrate cap region of the first conductivity type silicon is formed such that a junction is formed between the substrate cap region and the... | 01/24/2012 |
| 8097512 | MOSFET having a JFET embedded as a body diode A field effect transistor, in accordance with one embodiment, includes a metal-oxide-semiconductor field effect transistor (MOSFET) having a junction field effect transistor (JFET) embedded as a body diode. ... | 01/17/2012 |
| 8097513 | Vertical transistor of semiconductor device and method of forming the same A vertical transistor of a semiconductor device has a channel area formed in a vertical direction to a semiconductor substrate. After semiconductor poles corresponding to the length of semiconductor channels and gate electrodes surrounding sidewalls of the semicondu... | 01/17/2012 |
| 8097511 | Semiconductor device having P-N column layer and method for manufacturing the same A semiconductor device is provided, which includes a substrate; a P-N column layer disposed on the substrate; a second conductivity type epitaxial layer disposed on the P-N column layer. The P-N column layer includes first conductivity type columns and second conduc... | 01/17/2012 |
| 8088662 | Fabrication method of trenched metal-oxide-semiconductor device A fabrication method of a trenched metal-oxide-semiconductor device is provided. Firstly, an epitaxial layer is formed on a substrate. Then, a plurality of gate trenches is formed in the epitaxial layer. Afterward, a spacer is formed on the sidewall of the trench ga... | 01/03/2012 |
| 8088661 | Nonvolatile semiconductor memory with resistance elements and method of manufacturing the same A nonvolatile semiconductor memory of an aspect of the present invention comprises a memory cell transistor and a resistance element arranged on a semiconductor substrate. The memory cell transistor includes a floating gate electrode constituted of a first conductiv... | 01/03/2012 |
| 8084327 | Method for forming trench gate field effect transistor with recessed mesas using spacers A method for forming a field effect transistor with an active area and a termination region surrounding the active area includes forming a well region in a first silicon region, where the well region and the first silicon region are of opposite conductivity type. Ga... | 12/27/2011 |
| 8080459 | Self aligned contact in a semiconductor device and method of fabricating the same A method of fabricating a self-aligned contact in a semiconductor device, in accordance with one embodiment of the present invention, includes etching a trench in a core area and partially extending into a termination area of a substrate. A first oxide is grown on t... | 12/20/2011 |
| 8076202 | Method of fabricating semiconductor device In a method of fabricating a semiconductor device having a MISFET of trench gate structure, a trench is formed from a major surface of a semiconductor layer of first conductivity type which serves as a drain region, in a depth direction of the semiconductor layer, a... | 12/13/2011 |
| 8067286 | Methods of forming recessed access devices associated with semiconductor constructions The invention includes methods of forming recessed access devices. A substrate is provided to have recessed access device trenches therein. A pair of the recessed access device trenches are adjacent one another. Electrically conductive material is formed within the ... | 11/29/2011 |
| 8067285 | Methods of forming a conductive layer structure and methods of manufacturing a recessed channel transistor including the same In a method of forming a conductive layer structure and a method of manufacturing a recess channel transistor, a first insulating layer and a first conductive layer are sequentially formed on a substrate having a first region a second region and the substrate is exp... | 11/29/2011 |
| 8058127 | Manufacturing method of semiconductor power devices Disclosed is a power semiconductor device, in particular, a trench type power semiconductor device for use in power electronic devices. A method of manufacturing the same is provided. The method of manufacturing the power semiconductor device adopts a trench MOSFET ... | 11/15/2011 |
| 8058128 | Methods of fabricating recessed channel metal oxide semiconductor (MOS) transistors A method of fabricating a semiconductor device includes forming a mask pattern on an active region of a substrate defined by an isolation region. The mask pattern includes an opening therein exposing a portion of the active region. The exposed portion of the active ... | 11/15/2011 |
