"It is my heart-warmed and world-embracing Christmas hope and aspiration that all of us, the high, the low, the rich, the poor, the admired, the despised, the loved, the hated, the civilized, the savage (every man and brother of us all throughout the whole earth), may eventually be gathered together in a heaven of everlasting rest and peace and bliss, except the inventor of the telephone. "
Mark Twain ; Christmas greetings, 1890
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| Number | Title | Issue Date |
| 8394700 | Device including memory array and method thereof An electronic device includes a first memory cell and a second memory cell, of a nonvolatile memory array. The first memory cell includes a body region, a gate structure, a source region, and a drain region. The second memory cell includes a body region, a gate stru... | 03/12/2013 |
| 8334180 | Flash memory cell arrays having dual control gates per memory cell charge storage element A flash NAND type EEPROM system with individual ones of an array of charge storage elements, such as floating gates, being capacitively coupled with at least two control gate lines. The control gate lines are preferably positioned between floating gates to be couple... | 12/18/2012 |
| 8273625 | Structure for flash memory cells A semiconductor structure is provided. The semiconductor structure includes a first floating gate on the semiconductor substrate, the floating gate having a concave side surface; a first control gate on the first floating gate; a first spacer adjacent to the first c... | 09/25/2012 |
| 8207036 | Method for forming self-aligned dielectric cap above floating gate A method for fabricating a non-volatile storage element. The method comprises forming a layer of polysilicon floating gate material over a substrate and forming a layer of nitride at the surface of the polysilicon floating gate material. Floating gates are formed fr... | 06/26/2012 |
| 8158480 | Method of forming a pattern for a semiconductor device, method of forming a charge storage pattern using the same method, non-volatile memory device and methods of manufacturing the same A method of forming a semiconductor device pattern, a method of forming a charge storage pattern, a non-volatile memory device including a charge storage pattern and a method of manufacturing the same are provided. The method of forming the charge storage pattern in... | 04/17/2012 |
| 8071449 | Semiconductor storage device and method for manufacturing the same A semiconductor storage device has a plurality of word lines formed with a predetermined interval on a semiconductor substrate, a selection transistor provided at an end portion of the plurality of word lines, a first insulating film formed so as to cover side surfa... | 12/06/2011 |
| 8043914 | Methods of fabricating flash memory devices comprising forming a silicide on exposed upper and side surfaces of a control gate Provided are methods of fabricating flash memory devices that may prevent a short circuit from occurring between cell gate lines. Methods of fabricating such flash memory devices may include forming gate lines including a series of multiple cell gate lines and multi... | 10/25/2011 |
| 7994004 | Flash memory cell arrays having dual control gates per memory cell charge storage element A flash NAND type EEPROM system with individual ones of an array of charge storage elements, such as floating gates, being capacitively coupled with at least two control gate lines. The control gate lines are preferably positioned between floating gates to be couple... | 08/09/2011 |
| 7977190 | Memory devices having reduced interference between floating gates and methods of fabricating such devices A floating gate memory array comprising transistors having isolated inter-gate dielectric regions with respect to one another and methods of fabricating the same. Floating gate transistors are formed such that each of the floating gate transistors in the array has a... | 07/12/2011 |
| 7968408 | MIM capacitor and method of fabricating the same A M-I-M capacitor semiconductor device capable of enhancing the reliability and capacitance of a capacitor and maximizing the integration density of the device, and a method of fabricating the same are disclosed. The semiconductor device includes a semiconductor sub... | 06/28/2011 |
| 7943464 | Non-volatile electromechanical field effect devices and circuits using same and methods of forming same Non-volatile field effect devices and circuits using same. A non-volatile field effect device includes a source, drain and gate with a field-modulatable channel between the source and drain. Each of the source, drain, and gate have a corresponding terminal. An elect... | 05/17/2011 |
| 7923328 | Split gate non-volatile memory cell with improved endurance and method therefor A non-volatile memory cell including a substrate in which is formed a source region and a drain region defining a channel region between the source region and the drain region is provided. The non-volatile memory cell further includes a select gate structure overlyi... | 04/12/2011 |
| 7902023 | Method of manufacturing non-volatile semiconductor storage device A non-volatile semiconductor storage device includes: a substrate; a control circuit layer provided on the substrate; a support layer provided on the control circuit layer; and a memory cell array layer provided on the support layer. The memory cell array layer incl... | 03/08/2011 |
| 7888210 | Non-volatile memory fabrication and isolation for composite charge storage structures Fabricating semiconductor-based non-volatile memory that includes composite storage elements, such as those with first and second charge storage regions, can include etching more than one charge storage layer. To avoid inadvertent shorts between adjacent storage ele... | 02/15/2011 |
| 7858474 | Nonvolatile semiconductor memory device and manufacturing method thereof A nonvolatile semiconductor memory device is provided in such a manner that a semiconductor layer is formed over a substrate, a charge accumulating layer is formed over the semiconductor layer with a first insulating layer interposed therebetween, and a gate electro... | 12/28/2010 |
| 7842573 | Virtual ground memory array and method therefor A virtual ground memory array (VGA) is formed by a storage layer over a substrate with a conductive layer over the storage layer. The conductive layer is opened according to a patterned photoresist layer. The openings are implanted to form source/drain lines in the ... | 11/30/2010 |
| 7811889 | FinFET memory cell having a floating gate and method therefor A fin field effect transistor (FinFET) memory cell and method of formation has a substrate for providing mechanical support. A first dielectric layer overlies the substrate. A fin structure overlies the dielectric layer and has a first current electrode and a second... | 10/12/2010 |
| 7803682 | Semiconductor memory device and method for manufacturing same A semiconductor memory device includes a plurality of memory transistors. Each of the memory transistors has: a floating gate electrode; an interelectrode insulating film; and a control gate electrode. The floating gate electrode includes, in a cross section taken a... | 09/28/2010 |
| 7803683 | Method of fabricating a semiconductor device A semiconductor device includes an insulating film formed above an upper surface of a semiconductor substrate and including a contact hole, the contact hole including an upper portion and a lower portion located on the upper portion via a boundary as a first lower e... | 09/28/2010 |
| 7772069 | Methods of forming a semiconductor device A method of forming a semiconductor device is provided. A plurality of first guide patterns are formed on a substrate. A mask layer is conformally formed on the substrate. Second guide patterns are formed in empty regions on respective sides of the first guide patte... | 08/10/2010 |
| 7759196 | Multi-bit non-volatile memory device, method of operating the same, and method of fabricating the same A multi-bit non-volatile memory device and methods of operating and fabricating the same may be provided. The memory device may include a channel region formed in a semiconductor substrate, and a source and drain that form a Schottky contact with the channel region.... | 07/20/2010 |
| 7754565 | Manufacturing method of semiconductor device and semiconductor device A manufacturing method of a semiconductor device disclosed herein, comprises: forming a first member to be patterned on a semiconductor substrate; forming a second member to be patterned on the first member; forming a third member to be patterned on the second membe... | 07/13/2010 |
| 7732281 | Methods for fabricating dual bit flash memory devices Methods for fabricating dual bit memory devices are provided. In an exemplary embodiment of the invention, a method for fabricating a dual bit memory device comprises forming a charge trapping layer overlying a substrate and etching an isolation opening through the ... | 06/08/2010 |
| 7709325 | Method of forming ring electrode The present invention in one embodiment provides a method of forming an electrode that includes the steps of providing at least one metal stud in a layer of an interlevel dielectric material; forming a pillar of a first dielectric material atop the at least one meta... | 05/04/2010 |
| 7691710 | Fabricating non-volatile memory with dual voltage select gate structure A select gate structure for a non-volatile storage system include a select gate and a coupling electrode which are independently drivable. The coupling electrode is adjacent to a word line in a NAND string and has a voltage applied which reduces gate induced drain l... | 04/06/2010 |
| 7682908 | Non-volatile memory and operating method thereof A non-volatile memory including a substrate, a first doped region, a second doped region, a third doped region, a first gate structure, and a second gate structure is disclosed. The doped regions are disposed in the substrate and the second doped region is disposed ... | 03/23/2010 |
| 7674679 | Manufacturing method of semiconductor device and semiconductor device A manufacturing method of a semiconductor device disclosed herein, comprises: forming a first member to be patterned on a semiconductor substrate; patterning the first member to form a plurality of parallel linear patterns and a connecting portion which connects the... | 03/09/2010 |
| 7659167 | Method for improving the performance of flash memory by using microcrystalline silicon film as a floating gate This invention provides a method for forming polysilicon by using silane with introducing hydrogen, such that polysilicon is microcrystalline. This microcrystal polysilicon can be applied to floating gate of flash memory to improve the character of flash memory.... | 02/09/2010 |
| 7611948 | Methods of forming non-volatile memory device A method of forming a non-volatile memory device includes forming first mask patterns, which can have relatively large distances therebetween. A distance regulating layer is formed that conformally covers the first mask patterns. Second mask patterns are formed in g... | 11/03/2009 |
| 7560343 | Manufacturing method of non-volatile memory A manufacturing method of a non-volatile memory includes first providing a substrate for defining multiple pairs of active regions; forming a control gate in one of each pair of the active regions of the substrate; sequentially forming a gate oxide layer, a conducto... | 07/14/2009 |
| 7560342 | Method of manufacturing a semiconductor device having a plurality of memory and non-memory devices Embodiments relate to a method of manufacturing a semiconductor device that may simplify a manufacturing process and may reduce process costs. According to embodiments, the method may include simultaneously forming a first gate of a first device area and a second ga... | 07/14/2009 |
| 7557004 | Method for fabricating semiconductor device The method for fabricating the semiconductor device includes the steps of: forming an insulating film 20, a conductive film 22 and an insulating film 24 over a semiconductor substrate 10 having a first to a third region; removing an insul... | 07/07/2009 |
| 7553729 | Method of manufacturing non-volatile memory device A method of manufacturing a non-volatile memory device includes the steps of forming gates respectively having a structure in which a gate insulating layer, a first conductive layer, a dielectric layer, a second conductive layer and a metal-silicide layer are lamina... | 06/30/2009 |
| 7544569 | Bidirectional split gate NAND flash memory structure and array, method of programming, erasing and reading thereof, and method of manufacturing A split gate NAND flash memory structure is formed on a semiconductor substrate of a first conductivity type. The NAND structure comprises a first region of a second conductivity type and a second region of the second conductivity type in the substrate, spaced apart... | 06/09/2009 |
| 7537996 | Self-aligned method of forming a semiconductor memory array of floating gate memory cells with buried source line and floating gate A method of forming an array of floating gate memory cells, and an array formed thereby, wherein each memory cell includes a trench formed into a surface of a semiconductor substrate, and spaced apart source and drain regions with a channel region formed therebetwee... | 05/26/2009 |
| 7528039 | Method of fabricating flash memory A method of fabricating a flash memory is provided. The method includes forming a tunneling insulating film, a charge storage film, and a blocking insulating film on a semiconductor substrate; performing High Temperature (HT) anneal for the resultant semiconductor s... | 05/05/2009 |
| 7510936 | Nonvolatile memory device and methods of fabricating and driving the same Nonvolatile memory devices and methods of fabricating and driving the same are disclosed. Disclosed devices and method comprises: growing an oxide layer on a substrate and depositing a nitride layer on the oxide layer; patterning the nitride layer; forming injection... | 03/31/2009 |
| 7488648 | Methods of fabricating scalable two-transistor memory devices having metal source/drain regions A scalable two-transistor memory (STTM) device includes a planar transistor and a vertical transistor on a semiconductor substrate. The planar transistor includes spaced apart metal silicide source/drain regions on the substrate and a floating gate electrode on the ... | 02/10/2009 |
| 7470587 | Flash memory device and method of manufacturing the same A flash memory device includes trenches that are formed at regions on a semiconductor substrate spaced apart from one another at predetermined distances, buried floating gates buried into the trenches, a plurality of isolation structures formed between the buried fl... | 12/30/2008 |
| 7439157 | Isolation trenches for memory devices A method includes removing a portion of a substrate to define an isolation trench; forming a first dielectric layer on exposed surfaces of the substrate in the trench; forming a second dielectric layer on at least the first dielectric layer, the second dielectric la... | 10/21/2008 |