"To place a man in a multi-stage rocket and project him into the controlling gravitational field of the moon where the passengers can make scientific observations, perhaps land alive, and then return to earth--all that constitutes a wild dream worthy of Jules Verne. I am bold enough to say that such a man-made voyage will never occur regardless of all future advances."
Lee deForest, American radio pioneer ; 1957
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| Number | Title | Issue Date |
| 8138045 | Method of forming sidewall spacers to reduce formation of recesses in the substrate and increase dopant retention in a semiconductor device A method of forming sidewall spacers for a gate in a semiconductor device includes depositing a gate oxide layer over a gate and source/drain regions, and using a thermal anneal to oxidize silicon of the substrate and silicon of the gate after formation of the depos... | 03/20/2012 |
| 8114741 | Oxygen-rich layers underlying BPSG An integrated circuit structure and a method of forming the same are provided. The method includes providing a surface; performing an ionized oxygen treatment to the surface; forming an initial layer comprising silicon oxide using first process gases comprising a fi... | 02/14/2012 |
| 8071448 | Semiconductor device and manufacturing method of the same A disclosed semiconductor device includes multiple gate electrodes disposed on a semiconductor substrate; and multiple sidewall spacers disposed on sidewalls of the gate electrodes. The thickness of the sidewall spacers is larger on the sidewalls along longer sides ... | 12/06/2011 |
| 7932150 | Lateral oxidation with high-K dielectric liner Disclosed are methods of making and using a high-K dielectric liner to facilitate the lateral oxidation of a high-K gate dielectric, integrated circuit structures containing the high-K dielectric liner and/or oxidized high-K gate dielectric, and other associated met... | 04/26/2011 |
| 7811888 | Method for fabricating semiconductor memory device A method of fabricating a semiconductor memory device to protect a tunneling insulating layer from etching-damage includes the steps of forming sequentially a tunnel insulating layer, a first conductive layer, a dielectric layer and a second conductive layer on a se... | 10/12/2010 |
| 7799639 | Methods of fabricating non-volatile memory devices including a chlorine cured tunnel oxide layer Fabrication of a nonvolatile memory device includes sequentially forming a tunnel oxide layer, a first conductive layer, and a nitride layer on a semiconductor substrate. A stacked pattern is formed from the tunnel oxide layer, the first conductive layer, and the ni... | 09/21/2010 |
| 7772068 | Method of manufacturing non-volatile memory A method of manufacturing a non-volatile memory including the following steps is provided. First, a dielectric layer, a first conductive layer and a patterned mask layer are sequentially formed on a substrate. A portion of the first conductive layer is removed using... | 08/10/2010 |
| 7723187 | Semiconductor memory device and method of manufacturing the same A salicide treatment is performed on a common source line to reduce surface resistance and contact resistance, thereby improving a cell current characteristic. Therefore, a chip can be reduced in size and chips per wafer can be increased, thereby achieving high yiel... | 05/25/2010 |
| 7608509 | Method of manufacturing a flash memory device having compensation members formed on edge portions of a tunnel oxide layer In a semiconductor device and a method of manufacturing the semiconductor device, preliminary isolation regions having protruded upper portions are formed on a substrate to define an active region. After an insulation layer is formed on the active region, a first co... | 10/27/2009 |
| 7598140 | Method of producing a semiconductor device having an oxide film A semiconductor device having excellent characteristics is provided without deteriorated film quality. A first oxide film is divided into three regions A, B and C. Lengths I, II and III of the regions A, B and C in a plane direction of the silicon substrate are set ... | 10/06/2009 |
| 7592227 | Methods of manufacturing a semiconductor device Example embodiments of the present invention relate to methods of manufacturing a semiconductor device. Other example embodiments of the present invention relate to methods of manufacturing a semiconductor device having a gate electrode. In the method of manufacturi... | 09/22/2009 |
| 7582530 | Managing floating gate-to-floating gate spacing to support scalability Formation techniques are utilized to increase the space or distance between floating gates of a memory array of floating gate transistors. In at least some embodiments, floating gates are first formed over the substrate and then portions of the floating gates are re... | 09/01/2009 |
| 7494874 | Method of manufacturing a flash memory device A method of manufacturing a flash memory device includes the steps of forming a tunnel oxide layer and a polysilicon layer over a semiconductor substrate. An etch process is then performed to form a pattern and a trench. An isolation layer is formed in the trench. A... | 02/24/2009 |
| 7439106 | Gate CD trimming beyond photolithography A semiconductor device is fabricated with a selected critical dimension. A gate dielectric layer is formed over a semiconductor body. A gate layer comprised of a conductive material, such as polysilicon, is formed over the gate dielectric layer. The gate layer is pa... | 10/21/2008 |
| 7439157 | Isolation trenches for memory devices A method includes removing a portion of a substrate to define an isolation trench; forming a first dielectric layer on exposed surfaces of the substrate in the trench; forming a second dielectric layer on at least the first dielectric layer, the second dielectric la... | 10/21/2008 |
| 7439131 | Flash memory device having resistivity measurement pattern and method of forming the same A flash memory device has a resistivity measurement pattern and method of forming the same. A trench is formed in an isolation film in a Self-Aligned Floating Gate (SAFG) scheme. The trench is buried to form a resistivity measurement floating gate. This allows the r... | 10/21/2008 |
| 7413953 | Method of forming floating gate array of flash memory device The method of forming a floating gate array of a flash memory device includes: (a) sequentially forming a tunnel oxide film, a floating gate forming film, a capping oxide film and a first nitride film on a semiconductor substrate with an active device region defined... | 08/19/2008 |
| 7410869 | Method of manufacturing a semiconductor device In a method of manufacturing a semiconductor device such as a flash memory device, an insulating pattern having an opening is formed to partially expose a surface of a substrate. A first silicon layer is formed on the exposed surface portion of the substrate and the... | 08/12/2008 |
| 7402492 | Method of manufacturing a memory device having improved erasing characteristics In a method of manufacturing a memory device having improved erasing characteristics, the method includes sequentially forming a tunneling oxide layer, a charge storing layer, and a blocking oxide layer on a semiconductor substrate; annealing the semiconductor subst... | 07/22/2008 |
| 7371645 | Method of manufacturing a field effect transistor device with recessed channel and corner gate device Fabrication of recessed channel array transistors (RCAT) with a corner gate device includes forming pockets between a semiconductor fin that includes a gate groove and neighboring shallow trench isolations that extend along longs sides of the semiconductor fin. A pr... | 05/13/2008 |
| 7368348 | Methods of forming MOS transistors having buried gate electrodes therein Methods of forming field effect transistors having buried gate electrodes include the steps of forming a semiconductor substrate having a sacrificial gate electrode buried beneath a surface of the semiconductor substrate and then removing the sacrificial gate electr... | 05/06/2008 |
| 7364963 | Method for fabricating semiconductor device A method for fabricating a semiconductor device is provided. The method includes: implanting impurities onto a substrate by performing an ion implantation process; recessing portions of the substrate to form a plurality of trenches; performing a first thermal proces... | 04/29/2008 |
| 7358139 | Method of forming a field effect transistor including depositing and removing insulative material effective to expose transistor gate conductive material but not transistor gate semiconductor material The invention includes methods of forming field effect transistors. In one implementation, a method of forming a field effect transistor having a gate comprising a conductive metal or metal compound received over conductively doped semiconductive material includes f... | 04/15/2008 |
| 7358130 | Method for monitoring lateral encroachment of spacer process on a CD SEM A process implementing steps for determining encroachment of a spacer structure in a semiconductor device having thick and thin spacer regions, including a transition region formed therebetween. The method steps comprise: obtaining a line width roughness (LWR) measu... | 04/15/2008 |
| 7354824 | Fabrication method of non-volatile memory A method for fabricating a non-volatile memory is provided. A dielectric layer, a first conductive layer, and a mask layer are formed sequentially on a substrate and then patterned to form a number of openings and floating gates. In addition, spacers are formed on t... | 04/08/2008 |
| 7341906 | Method of manufacturing sidewall spacers on a memory device, and device comprising same The present invention is generally directed to a method of manufacturing sidewall spacers on a memory device, and a memory device comprising such sidewall spacers. In one illustrative embodiment, the method includes forming sidewall spacers on a memory device compri... | 03/11/2008 |
| 7332408 | Isolation trenches for memory devices Methods and apparatus are provided. A first dielectric plug is formed in a portion of a trench that extends into a substrate of a memory device so that an upper surface of the first dielectric plug is recessed below an upper surface of the substrate. The first diele... | 02/19/2008 |
| 7329578 | Method of forming floating-gate tip for split-gate flash memory process A split-gate flash memory process for improving sharpness and height of a floating-gate tip has steps as follows. Using a dry etching process, a trench is formed in the first polysilicon layer through the pattern opening. An oxide layer is then deposited on the firs... | 02/12/2008 |
| 7323743 | Floating gate A floating gate and fabrication method thereof. A semiconductor substrate is provided, on which an oxide layer, a first conducting layer, and a patterned hard mask layer having an opening are sequentially formed. A spacer is formed on the sidewall of the opening. A ... | 01/29/2008 |
| 7320915 | Method of manufacturing flash memory device The present invention relates to a method of manufacturing a flash memory device. According to the method of manufacturing the flash memory device, a gate line is formed to have a structure in which a tunnel oxide film, a polysilicon layer for floating gate, dielect... | 01/22/2008 |
| 7317222 | Memory cell using a dielectric having non-uniform thickness A memory cell is programmed by injecting charge into a charge storage layer of the memory cell. A desired programmed charge results in the charge storage layer over an edge portion of a channel region of the memory cell. An undesired programmed charge results in the... | 01/08/2008 |
| 7315058 | Semiconductor memory device having a floating gate To prevent the extraction of electrons from the floating gate during a read operation. A semiconductor memory device comprises a selection gate 3a provided in a first region on a substrate 1 through an insulating film 2, a floating gate | 01/01/2008 |
| 7303960 | Method for fabricating flash memory device A method for fabricating a flash memory device including the steps of: providing a substrate having thereon a gate with therein a control gate; lining the substrate and the gate with a liner; forming a silicon layer on the liner; forming a sacrificing layer on the s... | 12/04/2007 |
| 7300842 | Method of fabricating a mask ROM A mask ROM and fabrication method thereof are disclosed, in which a bit line is formed of a conductive material such as polysilicon, by which a device size can be minimized, and by which resistance characteristics are enhanced. ... | 11/27/2007 |
| 7297598 | Process for erase improvement in a non-volatile memory device A method of making embedded non-volatile memory devices includes forming a first mask layer overlying a polycrystalline silicon layer in a cell region and a peripheral region on a semiconductor substrate wherein the first mask layer has a plurality of openings in th... | 11/20/2007 |
| 7282780 | Semiconductor device A capacitor having low voltage dependency and high pn junction diode reverse breakdown voltage. A first n-well is formed in the surface of a p-type silicon substrate. A second n-well is superimposed and formed in the first n-well. A gate electrode is formed along th... | 10/16/2007 |
| 7276403 | Selective oxidation of silicon in diode, TFT, and monolithic three dimensional memory arrays The present invention relates to use of selective oxidation to oxidize silicon in the presence of tungsten and/or tungsten nitride in memory cells and memory arrays. This technique is especially useful in monolithic three dimensional memory arrays. In one aspect of ... | 10/02/2007 |
| 7271064 | Method of forming a field effect transistor using conductive masking material The invention includes methods of forming field effect transistors. In one implementation, a method of forming a field effect transistor having a gate comprising a conductive metal or metal compound received over conductively doped semiconductive material includes f... | 09/18/2007 |
| 7259419 | Programmable memory device, integrated circuit including the programmable memory device, and method of fabricating same An integrated circuit comprises a memory device including an isolation layer for defining an active area of a substrate, a tunnel oxide layer formed on the active area, a floating gate formed over the active area and the isolation layer, an inter-gate dielectric lay... | 08/21/2007 |
| 7250341 | Flash memory device having poly spacers A non-volatile memory device includes a substrate having a first active region and a second active region. A first floating gate is provided over the first active region and having an edge, the first floating gate being made of a conductive material. A first spacer ... | 07/31/2007 |