Class 438/264 - Tunneling insulator

Subclass of Class 438 - Semiconductor device manufacturing: process
Definition: Process for making a floating gate-type insulated gate field
No. of patents: 1018
Last issue date: 05/29/2012

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Number	Title	Issue Date
8187936	Ultrahigh density vertical NAND memory device and method of making thereof A method of making a monolithic three dimensional NAND string. The method includes forming a stack of alternating layers of a first material and a second material over a substrate. The first material includes a conductive or semiconductor control gate material and t...	05/29/2012
8114740	Profile of flash memory cells A semiconductor structure includes a semiconductor substrate; a tunneling layer on the semiconductor substrate; a source region adjacent the tunneling layer; and a floating gate on the tunneling layer. The floating gate comprises a first edge having an upper portion...	02/14/2012
8093126	Nonvolatile semiconductor memory device, semiconductor device and manufacturing method of nonvolatile semiconductor memory device A nonvolatile semiconductor memory device includes a gate portion formed by laminating a tunnel insulating film, floating gate electrode, inter-poly insulating film and control gate electrode on a semiconductor substrate, and source and drain regions formed on the s...	01/10/2012
8017481	Methods of forming nanoscale floating gate A memory cell is provided including a tunnel dielectric layer overlying a semiconductor substrate. The memory cell also includes a floating gate having a first portion overlying the tunnel dielectric layer and a second portion in the form of a nanorod extending from...	09/13/2011
8012831	Method of forming isolation layer of flash memory device An embodiment of the invention relates to a method of forming an isolation layer of a flash memory device. An isolation layer is formed using a PSZ-based material and a nitride film of liner form is deposited on a trench before the PSZ film is deposited. An oxide fi...	09/06/2011
8008154	Methods of forming impurity containing insulating films and flash memory devices including the same Methods of forming an insulating film include forming an insulating film on a substrate. A first impurity is injected into the insulating film using a thermal process under a first set of processing conditions to form a first impurity concentration peak in a lower p...	08/30/2011
7981746	Semiconductor device and method for manufacturing thereof The present invention provides a semiconductor device including a semiconductor substrate provided with a trench section; a tunnel insulating film covering an inner surface of the trench section; a trap layer provided in contact with the tunnel insulating film on an...	07/19/2011
7972926	Methods of forming memory cells; and methods of forming vertical structures Some embodiments include methods of forming memory. A series of photoresist features may be formed over a gate stack, and a placeholder may be formed at an end of said series. The placeholder may be spaced from the end of said series by a gap. A layer may be formed ...	07/05/2011
7972927	Method of manufacturing a nonvolatile semiconductor memory device According to a method of manufacturing a MONOS nonvolatile semiconductor memory device, a tunnel insulating film, a charge storage layer, a block insulating film containing a metal oxide and a control gate electrode are stacked on a semiconductor substrate. Heat tre...	07/05/2011
7919373	Method for doping polysilicon and method for fabricating a dual poly gate using the same A method for doping polysilicon improves a doping profile during plasma doping and includes forming a silicon layer using two separate operations. After forming a first silicon layer, thermal annealing is performed to crystallize the first silicon layer, such that t...	04/05/2011
7910436	Isolated-nitride-region non-volatile memory cell and fabrication method An isolated-nitride-region non-volatile memory cell is formed in a semiconductor substrate. Spaced-apart source and drain regions are disposed in the semiconductor substrate forming a channel therebetween. An insulating region is disposed over the semiconductor subs...	03/22/2011
7888209	Non-volatile sonos-type memory device A semiconductor memory device with the thickness of both a tunnel film and a top film provided thereon configured to be in the FN tunneling region (4 nm or more). Data retention characteristics can be improved by configuring both a tunnel film and a top film to have...	02/15/2011
7888208	Method of fabricating non-volatile memory device A method of fabricating a non-volatile memory device, A tunnel insulating layer, a floating gate, and a pad nitride layer is formed on a semiconductor substrate. A isolation region of the semiconductor substrate is formed by etching to a predetermined depth, and a l...	02/15/2011
7883967	Nonvolatile semiconductor memory device, semiconductor device and manufacturing method of nonvolatile semiconductor memory device A nonvolatile semiconductor memory device includes a gate portion formed by laminating a tunnel insulating film, floating gate electrode, inter-poly insulating film and control gate electrode on a semiconductor substrate, and source and drain regions formed on the s...	02/08/2011
7879674	Germanium-silicon-carbide floating gates in memories The use of a germanium carbide (GeC), or a germanium silicon carbide (GeSiC) layer as a floating gate material to replace heavily doped polysilicon (poly) in fabricating floating gates in EEPROM and flash memory results in increased tunneling currents and faster era...	02/01/2011
7867849	Method of manufacturing a non-volatile semiconductor device Example embodiments relate to methods of fabricating a non-volatile memory device. According to example embodiments, a method of fabricating a non-volatile memory device may include forming at least one gate structure on an upper face of a substrate. The at least on...	01/11/2011
7867850	Enhanced multi-bit non-volatile memory device with resonant tunnel barrier A non-volatile memory cell uses a resonant tunnel barrier that has an amorphous silicon and/or amorphous germanium layer between two layers of either HfSiON or LaAlO3. A charge trapping layer is formed over the tunnel barrier. A high-k charge blocking lay...	01/11/2011
7846797	Tunnel insulating layer of flash memory device and method of forming the same The present invention discloses a tunnel insulating layer in a flash memory device and a method of forming the same, the method according to the present invention comprises the steps of forming a first oxide layer on a semiconductor substrate through a first oxidati...	12/07/2010
7829414	Method for manufacturing non-volatile semiconductor memory device, and non-volatile semiconductor memory device An isolation oxide film whose upper surface is higher than a surface of a substrate is formed in the substrate. A silicon oxide film is formed on the substrate between the isolation oxide films. A self-aligned polysilicon film is formed on the silicon oxide film bet...	11/09/2010
7807532	Method and structure for self aligned formation of a gate polysilicon layer A method for processing semiconductor devices includes providing a semiconductor substrate. The method includes forming a pad oxide layer overlying the substrate and forming a silicon nitride layer overlying the pad oxide layer. The method includes forming a trench ...	10/05/2010
7807533	Method for forming non-volatile memory with shield plate for limiting cross coupling between floating gates A memory system is disclosed that includes a set of non-volatile storage elements. Each of the non-volatile storage elements includes source/drain regions at opposite sides of a channel in a substrate and a floating gate stack above the channel. The memory system al...	10/05/2010
7785965	Dual storage node memory devices and methods for fabricating the same Dual storage node memory devices and methods for fabricating dual storage node memory devices have been provided. In accordance with an exemplary embodiment, a method includes the steps of etching a plurality of trenches in a semiconductor substrate and forming a la...	08/31/2010
7745288	Semiconductor device and a method of manufacturing the same A semiconductor device having a non-volatile memory is disclosed, whose disturb defect can be diminished or prevented. A memory cell of the non-volatile memory has a memory gate electrode formed over a main surface of a semiconductor substrate through an insulating ...	06/29/2010
7736975	Method for manufacturing non-volatile memory device having charge trap layer A method for manufacturing a non-volatile memory device having a charge trap layer comprises in one embodiment: forming a first dielectric layer over a semiconductor substrate; forming a second dielectric layer having a higher dielectric constant than that of the fi...	06/15/2010
7723186	Method of forming memory with floating gates including self-aligned metal nanodots using a coupling layer Techniques are provided for fabricating memory with metal nanodots as charge-storing elements. In an example approach, a coupling layer such as an amino functional silane group is provided on a gate oxide layer on a substrate. The substrate is dip coated in a colloi...	05/25/2010
7718492	Non-volatile memory cell circuit with programming through band-to-band tunneling and impact ionization gate current Electronic circuitry is described having a first transistor having a first gate dielectric located between an electrically floating gate and a semiconductor substrate. The first injection current flows through the first gate dielectric to establish a first amount of...	05/18/2010
7687349	Growth of silicon nanodots having a metallic coating using gaseous precursors A technique to form metallic nanodots in a two-step process involving: (1) reacting a silicon-containing gas precursor (e.g., silane) to form silicon nuclei over a dielectric film layer; and (2) using a metal precursor to form metal nanodots where the metal nanodots...	03/30/2010
7682907	Non-volatile memory integrated circuit A nonvolatile memory integrated circuit arrayed in rows and columns is disclosed. Parallel lines of implant N-type regions are formed in a P-well of a semiconductor substrate, with lines of oxide material isolating each pair of the lines. Columns of memory cells str...	03/23/2010
7659166	Integration approach to form the core floating gate for flash memory using an amorphous carbon hard mask and ArF lithography Systems and methods are described that facilitate integrating ArF core patterning of floating gate structures in a flash memory device followed by KrF periphery gate patterning using a hard mask comprising a material such as amorphous carbon to facilitate core gate ...	02/09/2010
7635628	Nonvolatile memory device and method of manufacturing the same The nonvolatile memory device includes a semiconductor substrate on which a source, a drain, and a channel region are formed, a tunneling oxide film formed on the channel region, a floating gate formed of a transition metal oxide (TMO) on the tunneling oxide, a bloc...	12/22/2009
7635629	Method of manufacturing non-volatile memory device A method of manufacturing a non-volatile memory device includes forming a conductive layer to form a gate on a semiconductor substrate; forming a hard mask over the conductive layer; patterning the hard mask and the conductive layer of a cell region to form the gate...	12/22/2009
7605036	Method of forming floating gate array of flash memory device The method of forming a floating gate array of a flash memory device includes: (a) forming a plurality of device isolations, which define active device regions, in a semiconductor substrate, the device isolations being formed such that upper portions thereof protrud...	10/20/2009
7595240	Flash memory device with stacked dielectric structure including zirconium oxide and method for fabricating the same A dielectric structure disposed between a floating gate and a control gate of a flash memory device includes: a first dielectric layer; a third dielectric layer having a k-dielectric constant substantially the same as that of the first dielectric layer; and a second...	09/29/2009
7592226	Method for manufacturing non-volatile semiconductor memory device, and non-volatile semiconductor memory device An isolation oxide film whose upper surface is higher than a surface of a substrate is formed in the substrate. A silicon oxide film is formed on the substrate between the isolation oxide films. A self-aligned polysilicon film is formed on the silicon oxide film bet...	09/22/2009
7585730	Method of fabricating a non-volatile memory device A method of fabricating a non-volatile memory device includes forming a tunneling layer and a conductive layer on a semiconductor substrate, and patterning the conductive layer, the tunneling layer, and the semiconductor substrate to form a conductive pattern, a tun...	09/08/2009
7579242	High performance multi-level non-volatile memory device Non-volatile memory devices and arrays are described that utilize band engineered gate-stacks and multiple charge trapping layers allowing a multiple trapping site gate-insulator stack memory cell that utilizes a band engineered direct tunneling or crested barrier t...	08/25/2009
7560341	Semiconductor device and manufacturing method therefor The gate electrode of a high-voltage transistor having a high breakdown voltage is formed from a polysilicon layer having a larger average grain size, so that depletion of the gate electrode easily occurs. By utilizing this depletion, the electrical effective film t...	07/14/2009
7541243	Methods of forming integrated circuit devices having gate electrodes formed on non-uniformly thick gate insulating layers Methods of forming an integrated circuit device include forming first and second device isolation regions at side-by-side locations within a semiconductor substrate to thereby define a semiconductor active region therebetween. These first and second device isolation...	06/02/2009
7531411	Apparatus and method for a non-volatile memory structure comprising a multi-layer silicon-rich, silicon nitride trapping layer A non-volatile memory structure comprises a trapping layer that includes a plurality of silicon-rich, silicon nitride layers. Each of the plurality of silicon-rich, silicon nitride layers can trap charge and thereby increase the density of memory structures formed u...	05/12/2009
7528038	Non-volatile two-transistor semiconductor memory cell and method for producing the same The invention relates to a nonvolatile semiconductor memory cell and to an associated fabrication method, a source region (7), a drain region (8) and a channel region lying in between being formed in a substrate (1). In order to realize locally ...	05/05/2009

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Class 438/264 - Tunneling insulator