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| Number | Title | Issue Date |
| 8183111 | Method of fabricating conductive electrodes on the front and backside of a thin film structure A method of fabricating a thin film device having conductive front and backside electrodes or contacts. Top-side cavities are first formed on a first dielectric layer, followed by the deposition of a metal layer on the first dielectric layer to fill the cavities. De... | 05/22/2012 |
| 8173507 | Methods of forming integrated circuitry comprising charge storage transistors Methods include forming a charge storage transistor gate stack over semiconductive material. One such stack includes a tunnel dielectric, charge storage material over the tunnel dielectric, a high-k dielectric over the charge storage material, and conductive control... | 05/08/2012 |
| 8138044 | Method for manufacturing semiconductor flash memory and flash memory cell A semiconductor flash memory includes a tunnel oxide film formed over a semiconductor substrate, a first spacer composed of polysilicon formed over the semiconductor substrate including the tunnel oxide film, a second spacer composed of an insulating material formed... | 03/20/2012 |
| 8129242 | Method of manufacturing a memory device A method of manufacturing a flash memory device having an enhanced gate coupling ratio includes steps of forming a first semiconductor layer on a substrate and forming a semiconductor spacer layer on top of the first semiconductor layer. The semiconductor spacer lay... | 03/06/2012 |
| 8124477 | Non-volatile semiconductor memory device and method for manufacturing the same In a non-volatile semiconductor memory device having a MONOS structure, a memory cell section for storing information, and a periphery circuitry section for writing and reading the information with respect to the memory cell section are formed in the surface region ... | 02/28/2012 |
| 8119483 | Methods of forming memory cells Some embodiments include methods of utilizing polysilazane in forming non-volatile memory cells. The memory cells may be multi-level cells (MLCs). The polysilazane may be converted to silicon nitride, silicon dioxide, or silicon oxynitride with thermal processing an... | 02/21/2012 |
| 8076200 | Charge trapping dielectric structures with variable band-gaps A nonvolatile read-only memory having a thin nitrided tunnel insulator surface with a charge blocking insulator over the nitrided surface is presented. The tunnel insulator may be formed of a metal oxide, a metal oxycarbide, a semiconductor oxide, or oxycarbide. The... | 12/13/2011 |
| 8071446 | Manufacturing method of semiconductor device and substrate processing apparatus A manufacturing method of a semiconductor device, including the steps of: loading into a processing chamber a substrate having a high dielectric gate insulating film and a metal electrode, with a side wall exposed by etching; applying oxidation processing to the sub... | 12/06/2011 |
| 8071447 | Semiconductor device manufacturing method A semiconductor device manufacturing method includes removing an insulating film on a semiconductor substrate by etching and subsequently oxidizing a surface of the substrate by using a liquid oxidation agent without exposing this surface to an atmosphere, thereby f... | 12/06/2011 |
| 8039345 | Methods of forming semiconductor devices A method of forming a semiconductor device may include forming a first pattern on a substrate, and forming a first dielectric layer on the first pattern. The first pattern may be between portions of the first dielectric layer and the substrate. A second dielectric l... | 10/18/2011 |
| 8017480 | Apparatus and associated method for making a floating gate cell in a virtual ground array A method for fabricating a floating gate memory device comprises using thin buried diffusion regions with increased encroachment by a buried diffusion oxide layer into the buried diffusion layer and underneath the tunnel oxide under the floating gate. Further, the f... | 09/13/2011 |
| 8008152 | Method of manufacturing semiconductor device A method of manufacturing a semiconductor device comprising a first insulating film formed on a semiconductor substrate, a charge storage layer formed on the first insulating film, a second insulating film formed on the charge storage layer, and a control electrode ... | 08/30/2011 |
| 7994003 | Nonvolatile memory device and method of fabricating the same A method of fabricating a nonvolatile memory device includes forming a tunnel insulating layer on a semiconductor substrate, forming a charge storage layer on the tunnel insulating layer, forming a dielectric layer on the charge storage layer, the dielectric layer i... | 08/09/2011 |
| 7985650 | Nonvolatile semiconductor memory device and method of manufacturing the same A nonvolatile semiconductor memory device includes a floating gate electrode which is selectively formed on a main surface of a first conductivity type with a first gate insulating film interposed therebetween, a control gate electrode formed on the floating gate el... | 07/26/2011 |
| 7981745 | Sacrificial nitride and gate replacement Methods of forming a top oxide around a charge storage material layer of a memory cell and methods of improving quality of a top oxide around a charge storage material layer of a memory cell are provided. The method can involve providing a charge storage layer on a ... | 07/19/2011 |
| 7968407 | Methods of manufacturing semiconductor memory devices A method of manufacturing a semiconductor memory device, the method including forming a tunnel insulation layer on a substrate, forming a preliminary charge trapping layer on the tunnel insulation layer, forming an etch stop layer on the preliminary charge trapping ... | 06/28/2011 |
| 7964462 | Method of manufacturing semiconductor device Provided is a method of manufacturing a semiconductor device. The method includes: forming a charge storage layer on a substrate on which a gate insulating layer is formed; forming a first metal oxide layer on the charge storage layer using a first reaction source i... | 06/21/2011 |
| 7960230 | Semiconductor device and method of manufacturing the same According to an aspect of the invention, there is provided a semiconductor device including a plurality of memory cells, comprising a plurality of floating gate electrodes which are formed on a tunnel insulating film formed on a semiconductor substrate and have an u... | 06/14/2011 |
| 7951674 | Method for fabricating a SONOS memory The present invention provides a method for making SONOS memory, comprising the following steps: depositing silicon oxide layer and silicon oxynitride layer in sequence on underlayer; coating a layer of photoresist on the silicon oxynitride layer; removing part of t... | 05/31/2011 |
| 7932149 | Method of manufacturing a semiconductor device In a method of manufacturing a semiconductor device, a tunnel insulation layer is formed on a substrate. A charge trapping layer is formed on the tunnel insulation layer. A protection layer pattern or a mold is formed on the charge trapping layer. Charge trapping la... | 04/26/2011 |
| 7919372 | Method for forming oxide on ONO structure A semiconductor device having a silicon oxide/silicon nitride/silicon oxide (“ONO”) structure is formed by providing a first silicon oxide layer and a silicon nitride layer over a substrate having a memory region and a logic device region; patterning the first s... | 04/05/2011 |
| 7915124 | Method of forming dielectric layer above floating gate for reducing leakage current A method of fabricating a memory system is disclosed that includes a set of non-volatile storage elements. The method includes forming a floating gate having a top and at least two sides. A dielectric cap is formed at the top of the floating gate. An inter-gate diel... | 03/29/2011 |
| 7915123 | Dual charge storage node memory device and methods for fabricating such device A dual node memory device and methods for fabricating the device are provided. In one embodiment the method comprises forming a layered structure with an insulator layer, a charge storage layer, a buffer layer, and a sacrificial layer on a semiconductor substrate. T... | 03/29/2011 |
| 7892922 | Molecular electronic device including plurality of molecular active layers and method of manufacturing the molecular electronic device Provided are a molecular electronic device including a functional molecular active layer having a stack structure including oppositely charged first and second molecular active layers, and a method of manufacturing the molecular electronic device. The molecular elec... | 02/22/2011 |
| 7888207 | Transistor structures and methods for making the same Enhancement mode, field effect transistors wherein at least a portion of the transistor structure may be substantially transparent. One variant of the transistor includes a channel layer comprising a substantially insulating, substantially transparent, material sele... | 02/15/2011 |
| 7867847 | Method of manufacturing dielectric film that has hafnium-containing and aluminum-containing oxynitride The present invention provides a method of manufacturing a dielectric film having a high permittivity. An embodiment of the present invention is a method of manufacturing, on a substrate, a dielectric film including a metallic oxynitride containing an element A made... | 01/11/2011 |
| 7867848 | Methods for fabricating dual bit flash memory devices Methods for fabricating dual bit memory devices are provided. In an exemplary embodiment of the invention, a method for fabricating a dual bit memory device comprises forming a charge trapping layer overlying a substrate and etching an isolation opening through the ... | 01/11/2011 |
| 7846794 | Low-K spacer structure for flash memory flash memory cell includes a silicon substrate having a main surface, a source region in a portion of the silicon substrate proximate the main surface and a drain region in a portion of the silicon substrate proximate the main surface. The drain region is spaced apa... | 12/07/2010 |
| 7829412 | Method of manufacturing flash memory device A method of manufacturing a flash memory device is disclosed. A first oxide layer, a nitride layer, a second oxide layer, and a first polysilicon layer, which is a part of a polysilicon layer for a control gate, are formed to a predetermined thickness on a semicondu... | 11/09/2010 |
| 7824981 | Method and apparatus for semiconductor device and semiconductor memory device A method comprises providing a first conductive region, arranging a second conductive region adjacent to and insulated from the first conductive region by a dielectric region, arranging a third region adjacent to and insulated from the second conductive region, and ... | 11/02/2010 |
| 7811886 | Split-gate thin film storage NVM cell with reduced load-up/trap-up effects A semiconductor process and apparatus are disclosed for forming a split-gate thin film storage NVM device (10) by forming a select gate structure (3) on a first dielectric layer (2) over a substrate (1); forming a control gate structure (... | 10/12/2010 |
| 7799637 | Scaled dielectric enabled by stack sidewall process Non-volatile storage elements (or other device) are created. One embodiment includes creating floating gate stacks comprising a floating gate, a control gate and a dielectric between the floating gate and the control gate. One example of a suitable dielectric includ... | 09/21/2010 |
| 7799638 | Method for forming a memory array The invention is directed to a method for forming a memory array. The method comprises steps of providing a substrate having a charge trapping structure formed thereon. A patterned material layer is formed over the substrate and the patterned material layer having a... | 09/21/2010 |
| 7776691 | Semiconductor memory device and manufacturing method for semiconductor device The object is simplification of a manufacturing process for nonvolatile memory by reducing additional processes for forming a charge storage structure, and downsizing of nonvolatile memory. The solution is a manufacturing method for semiconductor memory device inclu... | 08/17/2010 |
| 7776690 | Method of forming a contact on a semiconductor device A method of forming a contact on a semiconductor device is provided. First, a substrate is provided. A plurality of gate structures defined by a plurality of word lines in a first direction, and a plurality of diffusion regions covered by a first dielectric layer in... | 08/17/2010 |
| 7749839 | Semiconductor device including a floating gate electrode having stacked structure A semiconductor device includes a semiconductor layer having a plurality of element regions in its surface area, which are delimited by at least one element isolation trench, a plurality of floating gate electrodes provided on the element regions with a first gate i... | 07/06/2010 |
| 7749838 | Fabricating method of non-volatile memory cell A super-silicon-rich oxide (SSRO) non-volatile memory cell includes a gate conductive layer on a substrate, a source/drain in the substrate at respective sides of the gate conductive layer, a tunneling dielectric layer between the gate conductive layer and the subst... | 07/06/2010 |
| 7718491 | Method for making a NAND Memory device with inversion bit lines A NAND based memory device uses inversion bit lines in order to eliminate the need for implanted bit lines. As a result, the cell size can be reduced, which can provide greater densities in smaller packaging. In another aspect, a method for fabricating a NAND based ... | 05/18/2010 |
| 7700438 | MOS device with nano-crystal gate structure Methods and apparatus are provided for non-volatile semiconductor devices. The apparatus comprises a substrate having therein a source region and a drain region separated by a channel region extending to a first surface of the substrate, and a multilayered gate stru... | 04/20/2010 |
| 7691709 | Method of fabricating flash memory using metal-oxide-crystal charge trap A method of fabricating a flash memory includes forming a first oxide film over a semiconductor substrate, forming a metal film over the first oxide film, forming a photoresist pattern on the metal film, etching the metal film using the photoresist pattern as a mask... | 04/06/2010 |
