Class 438/260 - Textured surface of gate insulator or gate electrode

Subclass of Class 438 - Semiconductor device manufacturing: process
Definition: Process for making a floating gate-type insulated gate field
No. of patents: 248
Last issue date: 10/04/2011

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Number	Title	Issue Date
8030161	Gate electrode for a nonvolatile memory cell A nonvolatile memory cell includes a substrate comprising a source, drain, and channel between the source and the drain. A tunnel dielectric layer overlies the channel, and a localized charge storage layer is disposed between the tunnel dielectric layer and a contro...	10/04/2011
7998814	Semiconductor memory device and method of fabricating the same A semiconductor memory devices and a method of fabricating the same includes sequentially stacking a tunnel insulating layer, a first nano-grain film, a conductive layer for a floating gate, and a second nano-grain film over a semiconductor substrate, forming a tren...	08/16/2011
7989290	Methods for forming rhodium-based charge traps and apparatus including rhodium-based charge traps Isolated conductive nanoparticles on a dielectric layer and methods of fabricating such isolated conductive nanoparticles provide charge traps in electronic structures for use in a wide range of electronic devices and systems. In an embodiment, conductive nanopartic...	08/02/2011
7989289	Floating gate structures Floating gate structures are generally described. In one example, an electronic device includes a semiconductor substrate, a tunnel dielectric coupled with the semiconductor substrate, and a floating gate structure comprising at least a first region having a first e...	08/02/2011
7985649	Method of making a semiconductor structure useful in making a split gate non-volatile memory cell A method of making a semiconductor device on a semiconductor layer is provided. The method includes: forming a select gate dielectric layer over the semiconductor layer; forming a select gate layer over the select gate dielectric layer; and forming a sidewall of the...	07/26/2011
7923327	Method of fabricating non-volatile memory device with concavely depressed electron injection region Provided are a non-volatile memory device and a method of fabricating the same. The non-volatile memory device comprises: a control gate region formed by doping a semiconductor substrate with second impurities; an electron injection region formed by doping the semic...	04/12/2011
7915122	Self-aligned cell integration scheme A method of forming a self-aligned logic cell. A nanotube layer is formed over the bottom electrode. A clamp layer is formed over the nanotube layer. The clamp layer covers the nanotube layer, thereby protecting the nanotube layer. A dielectric layer is formed over ...	03/29/2011
7897458	Method of forming floating gate, non-volatile memory device using the same, and fabricating method thereof Provided is a method of forming a floating gate, a non-volatile memory device using the same, and a method of fabricating the non-volatile memory device, in which nano-crystals of nano-size whose density and size can be easily adjusted, are synthesized using micelle...	03/01/2011
7846793	Plasma surface treatment for SI and metal nanocrystal nucleation A device, such as a nonvolatile memory device, and methods for forming the device in an integrated process tool are provided. The method includes depositing a tunnel oxide layer on a substrate, exposing the tunnel oxide layer to a plasma so that the plasma alters a ...	12/07/2010
7824980	Semiconductor device and method for manufacturing the same A semiconductor device and a method for manufacturing the same includes forming a poly-gate including a first poly-gate portion and a second poly-gate portion on and/or over a semiconductor substrate, forming a trench having a predetermined depth in the poly-gate, i...	11/02/2010
7785963	Method for fabricating inverted T-shaped floating gate memory A memory device having a floating gate with a non-rectangular cross-section is disclosed. The non-rectangular cross-section may be an inverted T shape, a trapezoid shape, or a double inverted T shape. Methods are disclosed for producing a floating gate memory device...	08/31/2010
7749837	High coupling memory cell A first dielectric layer is formed over a substrate. A single layer first conductive layer that acts as a floating gate is formed over the first dielectric layer. A trough is formed in the first conductive layer to increase the capacitive coupling of the floating ga...	07/06/2010
7718490	Nonvolatile semiconductor storage device and manufacturing method therefor A nonvolatile semiconductor storage device includes a semiconductor substrate; a plurality of isolation regions formed in the semiconductor substrate; an element-forming region formed between adjacent isolation regions; a first gate insulating film provided on the e...	05/18/2010
7682904	Method of fabricating flash memory device The present invention relates to a method of fabricating a flash memory device and includes forming an air-gap having a low dielectric constant between word lines and floating gates. Further, a tungsten nitride (WN) layer is formed on sidewalls of a tungsten (W) lay...	03/23/2010
7666739	Methods for fabricating a split charge storage node semiconductor memory Methods are provided for fabricating a split charge storage node semiconductor memory device. In accordance with one embodiment the method comprises the steps of forming a gate insulator layer having a first physical thickness and a first effective oxide thickness o...	02/23/2010
7642163	Process of forming an electronic device including discontinuous storage elements within a dielectric layer An electronic device can include a nonvolatile memory cell having DSEs within a dielectric layer. In one aspect, a process of forming the electronic device can include implanting and nucleating a first charge-storage material to form DSEs. The process can also inclu...	01/05/2010
7566616	Methods for fabricating flash memory devices Methods for fabricating flash memory devices are disclosed. A disclosed method comprises: forming a polysilicon layer on a semiconductor substrate; injecting dopants having stepped implantation energy levels into the polysilicon layer; forming a photoresist pattern ...	07/28/2009
7445997	Methods of forming non-volatile memory devices having floating gate electrodes Methods of forming non-volatile memory devices include the steps of forming a semiconductor substrate having first and second floating gate electrodes thereon and an electrically insulating region extending between the first and second floating gate electrodes. A st...	11/04/2008
7439157	Isolation trenches for memory devices A method includes removing a portion of a substrate to define an isolation trench; forming a first dielectric layer on exposed surfaces of the substrate in the trench; forming a second dielectric layer on at least the first dielectric layer, the second dielectric la...	10/21/2008
7432157	Method of fabricating flash memory Flash memory and methods of fabricating flash memory are disclosed. A disclosed method comprises: forming a first floating gate; and extending the first floating gate by forming a second floating gate adjacent a first sidewall of the floating gate. The second floati...	10/07/2008
7432156	Memory device and methods for its fabrication A semiconductor memory device and a method for its fabrication are provided. In accordance with one embodiment of the invention the method comprises the steps of forming a gate insulator and a gate electrode overlying a semiconductor substrate. The gate insulator is...	10/07/2008
7432158	Method for retaining nanocluster size and electrical characteristics during processing A method of making a semiconductor device includes a substrate having a semiconductor layer having a first portion for non-volatile memory and a second portion exclusive of the first portion. A first dielectric layer is formed over the semiconductor layer. A first p...	10/07/2008
7419870	Method of manufacturing a flash memory device Provided is a method of manufacturing a flash memory device. In the method, after forming a cell string and source/drain selection transistors, it forms a first oxide film in which a sidewall oxide film and a buffering oxide film are stacked, a nitride film, and a s...	09/02/2008
7407857	Method of making a scalable flash EEPROM memory cell with notched floating gate and graded source region An memory device, and method of making same, that includes source and drain regions defining a channel region therebetween. A select gate is formed over and insulated from a first portion of the channel region. A conductive floating gate is disposed over and insulat...	08/05/2008
7390691	Increasing phase change memory column landing margin A phase change memory with higher column landing margin may be formed. In one approach, the column landing margin may be increased by increasing the height of an electrode. For example, the electrode being made of two disparate materials, one of which includes nitri...	06/24/2008
7374989	Flash memory and methods of fabricating the same Flash memory and methods of fabricating the same are disclosed. An illustrated example flash memory includes a first source formed within a semiconductor substrate; an epitaxial layer formed on an upper surface of the semiconductor substrate; an opening formed withi...	05/20/2008
7371645	Method of manufacturing a field effect transistor device with recessed channel and corner gate device Fabrication of recessed channel array transistors (RCAT) with a corner gate device includes forming pockets between a semiconductor fin that includes a gate groove and neighboring shallow trench isolations that extend along longs sides of the semiconductor fin. A pr...	05/13/2008
7369435	Write once read only memory employing floating gates Structures and methods for write once read only memory employing floating gates are provided. The write once read only memory cell includes a floating gate transistor formed in a modified dynamic random access memory (DRAM) fabrication process. The floating gate tra...	05/06/2008
RE40275	Method for producing a memory cell A method for producing a memory cell includes masking a desired polysilicon structure with an oxidation-inhibiting layer, preferably a nitride layer. The polysilicon above source/drain regions and field regions is then converted into silicon dioxide. At the same tim...	04/29/2008
7361543	Method of forming a nanocluster charge storage device An integrated circuit and method of forming an integrated circuit having a memory portion minimizes an amount of oxidation of nanocluster storage elements in the memory portion. A first region of the integrated circuit has non-memory devices, each having a control e...	04/22/2008
7361575	Semiconductor device and method for manufacturing the same Embodiments relate to a semiconductor device and a method for manufacturing a semiconductor device that may be capable of improving a step coverage of main chip and scribe lane regions during a formation of an interlayer dielectric are provided. In embodiments, the ...	04/22/2008
7358134	Split gate flash memory cell and manufacturing method thereof A split gate flash memory cell includes a substrate having a device isolation structure; a selective gate structure disposed on the substrate; an interlayer dielectric layer having an opening disposed on the substrate, wherein the opening exposes a portion of the se...	04/15/2008
7354824	Fabrication method of non-volatile memory A method for fabricating a non-volatile memory is provided. A dielectric layer, a first conductive layer, and a mask layer are formed sequentially on a substrate and then patterned to form a number of openings and floating gates. In addition, spacers are formed on t...	04/08/2008
7341912	Split gate flash memory device having self-aligned control gate and method of manufacturing the same In a flash memory device, which can maintain an enhanced electric field between a control gate and a storage node (floating gate) and has a reduced cell size, and a method of manufacturing the flash memory device, the flash memory device includes a semiconductor sub...	03/11/2008
7341914	Method for forming a non-volatile memory and a peripheral device on a semiconductor substrate A method for forming a semiconductor device includes forming a first gate electrode over a semiconductor substrate, wherein the first gate electrode comprises silicon and forming a second gate electrode over the semiconductor substrate and adjacent the first gate el...	03/11/2008
7338894	Semiconductor device having nitridated oxide layer and method therefor A semiconductor device includes a substrate (12), a first insulating layer (14) over a surface of the substrate (12), a layer of nanocrystals (13) over a surface of the first insulating layer (14), a second insulating layer (15	03/04/2008
7335558	Method of manufacturing NAND flash memory device A method of manufacturing a NAND flash memory device, including the steps of providing a semiconductor substrate in which a cell region and a select transistor region are defined; simultaneously forming a plurality of cell gates on the semiconductor substrate of the...	02/26/2008
7332408	Isolation trenches for memory devices Methods and apparatus are provided. A first dielectric plug is formed in a portion of a trench that extends into a substrate of a memory device so that an upper surface of the first dielectric plug is recessed below an upper surface of the substrate. The first diele...	02/19/2008
7323743	Floating gate A floating gate and fabrication method thereof. A semiconductor substrate is provided, on which an oxide layer, a first conducting layer, and a patterned hard mask layer having an opening are sequentially formed. A spacer is formed on the sidewall of the opening. A ...	01/29/2008
7320914	System and method for gate formation in a semiconductor device A method for forming a memory device is provided. A first layer is formed over a substrate. A second layer is formed over the first layer. A mask is formed over the second layer. Spacers are formed adjacent opposite sides of the mask. The second layer is etched to f...	01/22/2008

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Class 438/260 - Textured surface of gate insulator or gate electrode