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| Number | Title | Issue Date |
| 8183110 | Memory cells, methods of forming dielectric materials, and methods of forming memory cells Some embodiments include memory cells. The memory cells may include a tunnel dielectric material, a charge-retaining region over the tunnel dielectric material, crystalline ultra-high k dielectric material over the charge-retaining region, and a control gate materia... | 05/22/2012 |
| 8163615 | Split-gate non-volatile memory cell having improved overlap tolerance and method therefor A method for forming a split-gate non-volatile memory (NVM) cell includes forming a first gate layer over a semiconductor substrate; forming a conductive layer over the first gate layer; patterning the first gate layer and the conductive layer to form a first sidewa... | 04/24/2012 |
| 8163614 | Method for forming NAND typed memory device A method for fabricating a NAND type flash memory device includes defining a select transistor region and a memory cell region in a semiconductor substrate, forming a tunnel insulating layer, a floating gate conductive layer, and a dielectric layer over a semiconduc... | 04/24/2012 |
| 8158479 | Semiconductor memory device and manufacturing method thereof This semiconductor memory device comprises a semiconductor substrate, a plurality of tunnel insulator films formed on the semiconductor substrate along a first direction and a second direction orthogonal to the first direction with certain spaces in each directions,... | 04/17/2012 |
| 8158478 | Strained semiconductor device and method of making same In a method of making a semiconductor device, a gate dielectric is formed over the semiconductor body. A floating gate is formed over the gate dielectric, an insulating region over the floating gate, and a control gate over the insulating region. The gate dielectric... | 04/17/2012 |
| 8153487 | Semiconductor device and method for manufacturing the same A semiconductor device includes a semiconductor substrate, a first insulating film provided on the semiconductor substrate, a charge storage layer provided on the first insulating film, a second insulating film comprising a plurality of insulating films provided on ... | 04/10/2012 |
| 8153488 | Method for manufacturing nonvolatile storage device Manufacturing a nonvolatile storage device including: stacking a first electrode film forming a first electrode and a first storage unit film forming a first storage unit on a substrate; processing the first electrode film and the first storage unit film into a stri... | 04/10/2012 |
| 8143122 | Nonvolatile semiconductor memory and method of manufacturing the same A nonvolatile semiconductor memory includes a first and a second diffusion layer regions, a floating gate electrode disposed, with a gate insulating film interposed therebetween, on a channel region between the first and second diffusion layer regions, and a control... | 03/27/2012 |
| 8133782 | Nonvolatile semiconductor memory device and manufacturing method thereof A memory device includes a semiconductor substrate, memory elements formed above the substrate in rows and columns, bit lines and word lines selectively connected with the memory elements in the respective columns and rows, each memory element including, a first gat... | 03/13/2012 |
| 8119477 | Memory system with protection layer to cover the memory gate stack and methods for forming same A memory system is provided including forming a memory gate stack having a charge trap layer over a semiconductor substrate, forming a protection layer to cover the memory gate stack, and forming a protection enclosure for the charge trap layer with the protection l... | 02/21/2012 |
| 8119478 | Multi-bit phase-change random access memory (PRAM) with diameter-controlled contacts and methods of fabricating and programming the same A phase-change random-access memory (PRAM) device includes a chalcogenide element, the chalcogenide element comprising a material which can assume a crystalline state or an amorphous state upon application of a heating current. A first contact is connected to a firs... | 02/21/2012 |
| 8119480 | Semiconductor memory devices performing erase operation using erase gate and methods of manufacturing the same A semiconductor memory device performing an erase operation using an erase gate and a method of manufacturing the same are provided. The memory device may include a charge trap layer storing a first charge transfer medium having a first polarity and at least one era... | 02/21/2012 |
| 8119479 | Scalable flash EEPROM memory cell with floating gate spacer wrapped by control gate and method of manufacture A polysilicon spacer as a floating gate of a Flash memory device. An advantage of such spacer structure is to reduce a cell size, which is desirable for state-of-the-art Flash memory technology. In a preferred embodiment, the floating gate can be self-aligned to a n... | 02/21/2012 |
| 8114736 | Integrated circuit system with memory system A method for forming an integrated circuit system is provided including forming a memory section having a spacer with a substrate, forming an outer doped region of the memory section in the substrate, forming a barrier metal layer over the spacer, and forming a meta... | 02/14/2012 |
| 8114737 | Methods of forming memory cells on pillars and memories with memory cells on pillars Methods of fabricating memory are disclosed. For example, a method includes fabricating rows of memory cells on pillars separated by isolation regions therebetween. Each pillar has a pair of memory cells, each on an opposite side thereof. The method also includes fa... | 02/14/2012 |
| 8114738 | System and method for providing low cost high endurance low voltage electrically erasable programmable read only memory A system and method are disclosed for increasing the reliability of a channel erase procedure in an electrically erasable programmable read only memory (EEPROM) memory cell. A memory cell of the present invention comprises a program gate, a control gate, and a float... | 02/14/2012 |
| 8114735 | Method of manufacturing a non-volatile memory device In a method of manufacturing a non-volatile memory device, a tunnel insulating layer may be formed on a channel region of a substrate. A charge trapping layer including silicon nitride may be formed on the tunnel insulating layer to trap electrons from the channel r... | 02/14/2012 |
| 8105897 | Method and structure for performing a chemical mechanical polishing process A method for fabricating flash memory devices, e.g., NAND, NOR, is provided. The method includes providing a semiconductor substrate. The method includes forming a second polysilicon layer overlying a plurality of floating gate structures to cause formation of an up... | 01/31/2012 |
| 8105899 | Method and structure for performing a chemical mechanical polishing process A method for fabricating flash memory devices, e.g., NAND, NOR, is provided. The method includes providing a semiconductor substrate. The method includes forming a second polysilicon layer overlying a plurality of floating gate structures to cause formation of an up... | 01/31/2012 |
| 8105900 | Manufacturing method of non-volatile memory In a manufacturing method of a non-volatile memory, a substrate is provided, and strip-shaped isolation structures are formed in the substrate. A first memory array including memory cell columns is formed on the substrate. Each memory cell column includes memory cel... | 01/31/2012 |
| 8105898 | Method and structure for performing a chemical mechanical polishing process A method for fabricating flash memory devices, e.g., NAND, NOR, is provided. The method includes providing a semiconductor substrate. The method includes forming a second polysilicon layer overlying a plurality of floating gate structures to cause formation of an up... | 01/31/2012 |
| 8097507 | Method of fabricating a semiconductor device A semiconductor device and a method of fabricating the same. In accordance with a method of fabricating a semiconductor device according to an aspect of the invention, a tunnel dielectric layer, a first conductive layer, a dielectric layer, a second conductive layer... | 01/17/2012 |
| 8097508 | Method and structure for performing a chemical mechanical polishing process A method for fabricating flash memory devices, e.g., NAND, NOR, is provided. The method includes providing a semiconductor substrate. The method includes forming a second polysilicon layer overlying a plurality of floating gate structures to cause formation of an up... | 01/17/2012 |
| 8097504 | Method for forming dual bit line metal layers for non-volatile memory Structures and techniques are disclosed for reducing bit line to bit line capacitance in a non-volatile storage system. The bit lines are formed at a 4f pitch in each of two separate metal layers, and arranged to alternate between each of the layers. In an alternati... | 01/17/2012 |
| 8097506 | Shallow trench isolation for a memory In some embodiments, a gate structure with a spacer on its side may be used as a mask to form self-aligned trenches in a microelectronic memory, such as a flash memory. A first portion of the gate structure may be used to form the mask, together with sidewall spacer... | 01/17/2012 |
| 8097505 | Method of forming isolation layer in semiconductor device A method of forming an isolation layer in a semiconductor device is disclosed, by which breakdown voltage and PN junction leakage characteristics of the isolation layer are enhanced. Embodiments include depositing a pad nitride layer over a semiconductor substrate, ... | 01/17/2012 |
| 8093124 | Method of manufacturing nonvolatile memory device A method of manufacturing a nonvolatile memory device includes forming a tunnel insulating layer over a semiconductor substrate, forming a charge trap layer, including first impurity ions of a first concentration, over the tunnel insulating layer, forming a compensa... | 01/10/2012 |
| 8084324 | Nonvolatile semiconductor memory and fabrication method for the same A nonvolatile semiconductor memory includes a memory cell transistor including a first floating gate electrode layer formed on a first tunneling insulating film, a first inter-gate insulating film, a first and a second control gate electrode layer, and a first metal... | 12/27/2011 |
| 8080456 | Robust top-down silicon nanowire structure using a conformal nitride In one exemplary embodiment, a method for fabricating a nanowire product comprising: providing a wafer having a buried oxide (BOX) upper layer in which a well is formed, the wafer further having a nanowire having ends resting on the BOX layer such that the nanowire ... | 12/20/2011 |
| 8076198 | Method of fabricating nonvolatile memory device A method of fabricating a nonvolatile memory device with a three-dimensional structure includes alternately stacking first and second material layers in two or more layers on a semiconductor substrate, forming trenches penetrating the stacked first and second materi... | 12/13/2011 |
| 8071444 | Nonvolatile semiconductor memory and method of manufacturing the same A nonvolatile semiconductor memory has a semiconductor substrate, a first insulating film formed on a channel region on a surface portion of the semiconductor substrate, a charge accumulating layer formed on the first insulating film, a second insulating film formed... | 12/06/2011 |
| 8071443 | Method of forming lutetium and lanthanum dielectric structures Methods of forming dielectric structures are shown. Methods of forming dielectric structures are shown that include lutetium oxide and lanthanum aluminum oxide crystals embedded within the lutetium oxide. Specific methods shown include monolayer deposition which yie... | 12/06/2011 |
| 8062944 | Method for fabricating non-volatile storage with individually controllable shield plates between storage elements A method for fabricating non-volatile storage having individually controllable shield plates between storage elements. The shield plates are formed by depositing a conductive material such as doped polysilicon between storage elements and their associated word lines... | 11/22/2011 |
| 8053312 | Semiconductor device and method for fabricating the same A semiconductor device and a method for fabricating the same are provided. The method includes: forming a plurality of protruded patterns smaller than gate structures by selectively removing predetermined portions of a substrate; and forming the gate structures over... | 11/08/2011 |
| 8048738 | Method for forming a split gate device A method for forming a semiconductor device includes forming a dielectric layer over a substrate. The method further includes forming a select gate layer over the dielectric layer. The method further includes etching the select gate layer at a first etch rate to for... | 11/01/2011 |
| 8030159 | Method of fabricating EEPROM There is provided a method of fabricating an EEPROM for forming a memory cell transistor and a selection transistor, the method includes: forming a first source region and a first drain region of the memory cell transistor; forming a first gate oxide film; forming a... | 10/04/2011 |
| 8030160 | Methods of forming NAND flash memory with fixed charge A string of nonvolatile memory cells connected in series includes fixed charges located between floating gates and the underlying substrate surface. Such a fixed charge affects distribution of charge carriers in an underlying portion of the substrate and thus affect... | 10/04/2011 |
| 8026139 | Method of fabricating a non-volatile memory device In a method of fabricating a non-volatile memory device, a semiconductor substrate includes an isolation layer formed in an isolation region, a tunnel insulating layer and a first conductive layer for a floating gate formed in an active region, and a dielectric laye... | 09/27/2011 |
| 8026140 | Method of forming flash memory device The present invention relates to a method of forming a flash memory device, which is capable of forming floating gates. According to a method of forming a flash memory device in accordance with the present invention, isolation mask patterns are first formed over a s... | 09/27/2011 |
| 8017477 | Nonvolatile memory devices and methods of fabricating the same A nonvolatile memory device includes a plurality of first control gate electrodes, second control gate electrodes, first storage node films, and second storage node films. The first control gate electrodes are recessed into a semiconductor substrate. Each second con... | 09/13/2011 |
