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| Number | Title | Issue Date |
| 7741175 | Methods of forming capacitors A method of forming a capacitor includes forming a first capacitor electrode over a semiconductor substrate. A capacitor dielectric region is formed onto the first capacitor electrode. The capacitor dielectric region has an exposed oxide containing surface. The expo... | 06/22/2010 |
| 7638392 | Methods of forming capacitor structures The invention includes methods of forming channel region implants for two transistor devices simultaneously, in which a mask is utilized to block a larger percentage of a channel region location of one of the devices relative to the other. The invention also pertain... | 12/29/2009 |
| 7601587 | Fabricating method of CMOS A method of forming a metal-oxide-semiconductor (MOS) device is provided. The method includes the following steps. First, a conductive type MOS transistor is formed on a substrate. Then, a first etching stop layer is formed over the substrate to cover conformably th... | 10/13/2009 |
| 7436067 | Methods for forming conductive structures and structures regarding same A method for forming a metal/metal oxide structure that includes forming metal oxide regions, e.g., ruthenium oxide regions, at grain boundaries of a metal layer, e.g., platinum. Preferably, the metal oxide regions are formed by diffusion of oxygen through grain bou... | 10/14/2008 |
| 7419874 | Method of manufacturing semiconductor device with capacitor and transistor The invention is to prevent dielectric breakdown of a capacitor in a semiconductor device having the capacitor and a MOS transistor formed on a same semiconductor substrate. A SiO2 film that is to be a gate insulation film of a high voltage MOS transistor... | 09/02/2008 |
| 7387929 | Capacitor in semiconductor device and method of manufacturing the same The present invention relates to a capacitor in semiconductor device and a method of manufacturing the same, wherein, owing to formation of a lower electrode and an upper electrode into a stack structure of a poly-silicon layer and an aluminum (Al) layer and formati... | 06/17/2008 |
| 7374993 | Methods of forming capacitors A method of forming a capacitor includes forming a first capacitor electrode over a semiconductor substrate. A capacitor dielectric region is formed onto the first capacitor electrode. The capacitor dielectric region has an exposed oxide containing surface. The expo... | 05/20/2008 |
| 7365409 | Two-transistor pixel with buried reset channel and method of formation A two-transistor pixel of an imager has a reset region formed adjacent a charge collection region of a photodiode and in electrical communication with a gate of a source follower transistor. The reset region is connected to one terminal of a capacitor which integrat... | 04/29/2008 |
| 7329573 | Methods of forming capacitors A method of forming a capacitor includes forming a first capacitor electrode over a semiconductor substrate. A capacitor dielectric region is formed onto the first capacitor electrode. The capacitor dielectric region has an exposed oxide containing surface. The expo... | 02/12/2008 |
| 7288453 | Method of fabricating analog capacitor using post-treatment technique There is provided a method of fabricating an analog capacitor using a post-treatment technique. The method includes forming a lower insulating layer on a semiconductor substrate. A bottom electrode is formed on the lower insulating layer, and a capacitor dielectric ... | 10/30/2007 |
| 7268052 | Method for reducing soft error rates of memory cells In one embodiment, a method of fabricating a transistor for a memory cell includes the steps of performing a counter doping implant before or after a source/drain implant. The counter doping implant may comprise one or more implant steps that move a metallurgical ju... | 09/11/2007 |
| 7259057 | Method for forming capacitor of semiconductor device Disclosed is a method for forming a capacitor of a semiconductor device capable of improving the film quality of a dielectric film. The method includes the steps of providing a semiconductor substrate having a storage node contact; forming a metal storage electrode ... | 08/21/2007 |
| 7250334 | Metal insulator metal (MIM) capacitor fabrication with sidewall spacers and aluminum cap (ALCAP) top electrode A method (10) of forming a MIM (metal insulator metal) capacitor is disclosed whereby adverse affects associated with copper diffusion are mitigated even as the capacitor is scaled down. A sidewall spacer (156) is formed against an edge (137) of... | 07/31/2007 |
| 7244650 | Transistor and method for manufacturing the same A transistor including a semiconductor substrate defined with an active region and a device isolation region, a gate formed on the semiconductor substrate, an insulating spacers formed on respective side walls of the gate, and source/drain junctions formed in the se... | 07/17/2007 |
| 7217616 | Non-volatile memory cell and method of forming the same A non-volatile memory cell comprising a transistor and two plane capacitors. In the memory cell, a switching device is disposed on a substrate, a first plane capacitor having a first doped region and a second plane capacitor having a second doped region. The switchi... | 05/15/2007 |
| 7214583 | Memory cell with an asymmetric crystalline structure Asymmetrically structured memory cells and a fabrication method are provided. The method comprises: forming a bottom electrode; forming an electrical pulse various resistance (EPVR) first layer having a polycrystalline structure over the bottom electrode; forming an... | 05/08/2007 |
| 7205190 | Semiconductor device fabrication method The present invention adequately activates a substrate contact region of a support substrate without substantially changing the conventional SOI-CMOS device formation process. An exposed face of the support substrate is formed in an element isolation region of a lay... | 04/17/2007 |
| 7192827 | Methods of forming capacitor structures The invention includes a method of forming a capacitor structure. A first electrical node is formed, and a layer of metallic aluminum is formed over the first electrical node. Subsequently, an entirety of the metallic aluminum within the layer is transformed into on... | 03/20/2007 |
| 7183171 | Pyramid-shaped capacitor structure A capacitor structure which has generally pyramidal or stepped profile to prevent or reduce dielectric layer breakdown is disclosed. The capacitor structure includes a first conductive layer, at least one dielectric layer having a first area provided on the first co... | 02/27/2007 |
| 7166883 | Capacitor structures The invention includes a method of forming a capacitor structure. A first electrical node is formed, and a layer of metallic aluminum is formed over the first electrical node. Subsequently, an entirety of the metallic aluminum within the layer is transformed into on... | 01/23/2007 |
| 7148103 | Multilevel poly-Si tiling for semiconductor circuit manufacture Method of manufacturing a semiconductor device, including a first baseline technology electronic circuit (1) and a second option technology electronic circuit (2) as functional parts of a system-on-chip, by: manufacturing the first electro... | 12/12/2006 |
| 7138321 | Boost capacitor layout technique for an H-bridge integrated circuit motor controller to ensure matching characteristics with that of the low-side switching devices of the bridge An H-bridge circuit having a boost capacitor coupled to the gate of the low-side driver. A driver, in the form of a switching transistor is connected between the load and ground, thus providing a low-side driver. A capacitor is coupled to the gate of the low-side dr... | 11/21/2006 |
| 7115938 | Non-volatile memory cell and method of forming the same A non-volatile memory cell comprising a transistor and two plane capacitors. In the memory cell, a switching device is disposed on a substrate, a first plane capacitor having a first doped region and a second plane capacitor having a second doped region. The switchi... | 10/03/2006 |
| 7105900 | Reduced floating body effect static random access memory cells and methods for fabricating the same An SRAM cell that may reduce or eliminate floating body effect when using a SOI and a method for fabricating the same are provided. A floating body of an access transistor of the SRAM is connected to a source region of a driver transistor, for example, through a bod... | 09/12/2006 |
| 7091083 | Method for producing a capacitor A method for producing a capacitor comprises providing a raw structure having a substrate and at least one dielectric layer, wherein a first area and a second area of the substrate are separated by an isolating layer. Above the first and second areas, an electricall... | 08/15/2006 |
| 7091543 | Embedded dual-port DRAM process A new method to form DRAM cells in an integrated circuit device is achieved. The method comprises providing a substrate. A plurality of STI regions is formed in the substrate. The STI regions comprise trenches in the substrate. The trenches are filled with a first d... | 08/15/2006 |
| 7087490 | Method and composite for decreasing charge leakage A dielectric insulating composite for insulating a floating gate from a control gate in a non-volatile memory is described. A material, such as an undoped polysilicon, amorphous silicon, or amorphous polysilicon or a silicon rich nitride, is inserted in the gate str... | 08/08/2006 |
| 7087486 | Method for scalable, low-cost polysilicon capacitor in a planar DRAM Capacitor structures that have increased capacitance without compromising cell area are provided as well as methods for fabricating the same. A first capacitor structure includes insulating material present in holes that are formed in a semiconductor substrate, wher... | 08/08/2006 |
| 7060556 | Drain extended MOS transistors with multiple capacitors and methods of fabrication Multi-capacitor drain extended transistor devices and methods are provided. A first capacitor structure comprises a first dielectric layer (14) and a first gate layer (16) and first and second lateral sides. The first capacitor structure overlies a cha... | 06/13/2006 |
| 7029971 | Thin film dielectrics for capacitors and methods of making thereof Dielectrics are formed having high dielectric constants, low loss tangents, and other desirable electrical and physical properties. The dielectrics are annealed at temperatures allowing the use of copper foil substrates, and at low oxygen partial pressures. ... | 04/18/2006 |
| 7026206 | Method of making resistive element having a stable contact resistance A semiconductor apparatus includes a MOS transistor and a resistive element having insulative first polysilicon and conductive second polysilicon films, an insulating film for a resistive element, and a third polysilicon film. The second polysilicon film is formed i... | 04/11/2006 |
| 7023043 | Top electrode in a strongly oxidizing environment An improved charge storing device and methods for providing the same, the charge storing device comprising a conductor-insulator-conductor (CIC) sandwich. The CIC sandwich comprises a first conducting layer deposited on a semiconductor integrated circuit. The CIC sa... | 04/04/2006 |
| 6967133 | Method for fabricating a semiconductor structure The present invention provides a method for fabricating a semiconductor structure having a plurality of gate stacks (GS1, GS2, GS3, GS4) on a semiconductor substrate (10), having the following steps: application of the gate stacks ... | 11/22/2005 |
| 6949442 | Methods of forming MIM capacitors A method for forming a MIM capacitor and a MIM capacitor device formed by same. A preferred embodiment comprises selectively forming a first cap layer over a wafer including a MIM capacitor bottom plate, and depositing an insulating layer over the MIM capacitor bott... | 09/27/2005 |
| 6936514 | Semiconductor component and method An SOI semiconductor component having a portion of a circuit element in the handle wafer and a method for manufacturing the SOI semiconductor component. An SOI substrate has a handle wafer bonded to an active wafer via a dielectric material. A shallow trench isolati... | 08/30/2005 |
| 6930013 | Method of forming a capacitor of an integrated circuit device A method of forming a capacitor having a lower electrode, an upper electrode, and a dielectric layer of an integrated circuit device is provided. A metal compound is adsorbed on the lower electrode by using a gaseous metal compound. A physisorbed metal compound on t... | 08/16/2005 |
| 6906373 | Power divider A power divider having metal capacitors is disclosed to detect and divide a frequency signal. The divide includes a first capacitor including first and second electrodes formed at a first portion of a substrate, a second capacitor including first and second electrod... | 06/14/2005 |
| 6881621 | Method of fabricating SOI substrate having an etch stop layer, and method of fabricating SOI integrated circuit using the same A method of fabricating a SOI substrate includes sequentially forming a first semiconductor layer, which may be either a porous semiconductor layer or a bubble layer, a second semiconductor layer and a buried oxide layer on a front surface of a semiconductor substra... | 04/19/2005 |
| 6881999 | Semiconductor device with analog capacitor and method of fabricating the same A semiconductor device having an analog capacitor and a method of fabricating the same are disclosed. The semiconductor device includes a bottom plate electrode disposed at a predetermined region of a semiconductor substrate, and an upper plate electrode having a re... | 04/19/2005 |
| 6833299 | Method of fabricating a stacked poly-poly and MOS capacitor using a sige integration scheme A stacked Poly-Poly/MOS capacitor useful as a component in a BiCMOS device comprising a semiconductor substrate having a region of a first conductivity-type formed in a surface thereof; a gate oxide formed on said semiconductor substrate overlaying said region of fi... | 12/21/2004 |
