Did You Know...
...that the x-ray was discovered purely by accident? When German physicist Wilhelm Konrad von Roentgen was experimenting with cathode rays in 1895, he put an activated Crookes tube in a book and went out to lunch. When he returned, he discovered that a key that had also been placed in the book showed up as an image on the developed film!
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| Number | Title | Issue Date |
| 8114734 | Metal capacitor and method of making the same A method of making a metal capacitor includes the following steps. A dielectric layer having a metal interconnection and a capacitor electrode is provided. Then, a treatment is performed to increase the dielectric constant of the dielectric layer surrounding the cap... | 02/14/2012 |
| 8017474 | Process of forming an electronic device including a resistor-capacitor filter A process of forming an electronic device can include forming a capacitor dielectric layer over a base region, wherein the base region includes a base semiconductor material, forming a gate dielectric layer over a substrate, forming a capacitor electrode over the ca... | 09/13/2011 |
| 8008148 | Method of manufacturing M-I-M capacitor of semiconductor device A method for manufacturing a semiconductor device includes sequentially forming an insulating layer and a metal layer over a semiconductor substrate, forming a photoresist pattern over the metal layer and etching the metal layer using the photoresist pattern as an e... | 08/30/2011 |
| 7745282 | Interconnect structure with bi-layer metal cap A structure and method of fabricating an interconnect structures with bi-layer metal cap is provided. In one embodiment, the method includes forming an interconnect feature in a dielectric material layer; and forming a bi-layer metallic cap on a top surface of the i... | 06/29/2010 |
| 7517752 | Method of fabricating semiconductor device having storage capacitor and higher voltage resistance capacitor and semiconductor device fabricated using the same Provided are a method of fabricating a semiconductor device having different kinds of capacitors, and a semiconductor device formed using the same. In a fabrication process, after preparing a substrate including a storage capacitor region and a higher voltage resist... | 04/14/2009 |
| 7488643 | MIM capacitor and method of making same A MIM capacitor device and method of making the device. The device includes an upper plate comprising one or more electrically conductive layers, the upper plate having a top surface, a bottom surface and sidewalls; a spreader plate comprising one or more electrical... | 02/10/2009 |
| 7470586 | Memory cell having bar-shaped storage node contact plugs and methods of fabricating same According to embodiments of the invention, a bit line interlayer insulating layer is placed over a semiconductor substrate. A plurality of parallel bit line patterns are placed on the bit line interlayer insulating layer. Each of the bit line patterns has a bit line... | 12/30/2008 |
| 7462535 | Semiconductor device with analog capacitor and method of fabricating the same A semiconductor device having an analog capacitor and a method of fabricating the same are disclosed. The semiconductor device includes a bottom plate electrode disposed at a predetermined region of a semiconductor substrate, and an upper plate electrode having a re... | 12/09/2008 |
| 7439129 | Methods for fabricating ferroelectric memory devices A ferroelectric memory device includes a semiconductor substrate, ferroelectric capacitors, conductive patterns, and plate lines. The ferroelectric capacitors are arranged in rows and columns on the semiconductor substrate. The conductive patterns are arranged in ev... | 10/21/2008 |
| 7439127 | Method for fabricating a semiconductor component including a high capacitance per unit area capacitor A method is provided for fabricating a semiconductor component that includes a capacitor having a high capacitance per unit area. The component is formed in and on a semiconductor on insulator (SOI) substrate having a first semiconductor layer, a layer of insulator ... | 10/21/2008 |
| 7439153 | Semiconductor device and manufacturing method thereof for reducing the area of the memory cell region A structure is adopted for a layout of an SRAM cell which provides a local wiring 3a between a gate 2a and gate 2b and connects an active region 1a and an active region 1b. This eliminates the nec... | 10/21/2008 |
| 7422921 | Micromesh material and micromesh mono-crystal high frequency capacitor and its producing method This invention is related to a micromesh material and a mono-crystal high frequency capacitor manufactured with said micromesh material as well as the producing method for the mono-crystal high frequency capacitor, i.e., disperse a colloidal material unevenly to for... | 09/09/2008 |
| 7419873 | Method and apparatus for providing flexible partially etched capacitor electrode interconnect The present subject matter includes a capacitor stack disposed in a case, the capacitor stack including one or more substantially planar electrode layers. The one or more substantially planar electrode layers have an etched surface, an unetched surface, and a grade ... | 09/02/2008 |
| 7416938 | Inkjet patterning for thin-film capacitor fabrication, thin-film capacitors fabricated thereby, and systems containing same An integrated thin-film capacitor includes a dielectric disposed between a first electrode and a second electrode. The thin-film capacitor includes a dielectric disposed upon the first electrode, and the dielectric exhibits a substantially uniform heat-altered morph... | 08/26/2008 |
| 7407853 | Display device and manufacturing method of the same The invention provides a method of manufacture of a display device which can achieve a reduction of the manufacturing process. In the manufacturing method, a semiconductor layer is formed over an upper surface of a substrate. An insulation film is formed over an upp... | 08/05/2008 |
| 7408218 | Semiconductor device having plural dram memory cells and a logic circuit A memory cell capacitor (C3) of a DRAM is formed by use of a MIM capacitor which uses as its electrode a metal wiring line of the same layer (M3) as metal wiring lines within a logic circuit (LOGIC), thereby enabling reduction of process costs. Higher ... | 08/05/2008 |
| 7404829 | Electrode-separator combination for improved assembly of layered electrolytic capacitors This disclosure provides methods for assembling multiple anode stacked capacitor configurations with a temporary adhesive to aide in the alignment of separator materials and electrodes without sacrificing energy density, and electrolytic capacitors comprising such c... | 07/29/2008 |
| 7402183 | High capacitance cathode foil produced by abrasion process using titanium nitride powder A dry titanium nitride (TiN) powder abrasion method roughens the surface of a valve metal foil for use as a cathode in an electrolytic capacitor. This increases the surface area of the foil, thereby increasing the double-layer capacitance of the cathode, and also me... | 07/22/2008 |
| 7368365 | Memory array buried digit line A method of forming a buried digit line is disclosed. Sacrificial spacers are formed along the sidewalls of an isolation trench, which is then filled with a sacrificial material. One spacer is masked while the other spacer is removed and an etch step into the substr... | 05/06/2008 |
| 7368343 | Low leakage MIM capacitor Capacitor structures for use in integrated circuits and methods of their manufacture. The capacitor structures include a bottom electrode, a top electrode and a dielectric layer interposed between the bottom electrode and the top electrode. The capacitor structures ... | 05/06/2008 |
| 7364961 | SRAM cell design for soft error rate immunity A new method to form a SRAM memory cell in an integrated circuit device is achieved. The method comprises providing a bi-stable flip-flop cell having a data storage node and a data bar storage node. A first capacitor is formed coupled to the data bar storage node, a... | 04/29/2008 |
| 7361568 | Embedded capacitors and methods for their fabrication and connection Embedded capacitors comprise a bimetal foil (500) that includes a first copper layer (205) and an aluminum layer (210) on the first copper layer. The aluminum layer has a smooth side adjacent the first copper layer and a high surface area textur... | 04/22/2008 |
| 7341901 | Semiconductor processing methods of forming integrated circuitry Semiconductor processing methods of forming integrated circuitry are described. In one embodiment, memory circuitry and peripheral circuitry are formed over a substrate. The peripheral circuitry comprises first and second type MOS transistors. Second type halo impla... | 03/11/2008 |
| 7338833 | Dual dielectric structure for suppressing lateral leakage current in high fill factor arrays A structure and method for suppressing lateral leakage current in full fill factor image arrays includes dual dielectric passivation layer. A first passivation layer includes a material that is an insulator, has a low dielectric constant to minimize capacitive coupl... | 03/04/2008 |
| 7335569 | In-situ formation of metal insulator metal capacitors The invention describes an in-situ method of fabricating a metal insulator metal (MIM) capacitor and products formed by the same. The method utilizes atomic layer deposition (ALD) or metal-organic chemical vapor deposition (MOCVD). In the method, a metal precursor i... | 02/26/2008 |
| 7329939 | Metal-insulator-metal capacitor and method of fabricating same A metal-insulator-metal (MIM) capacitor including a metal layer, an insulating layer formed on the metal layer, at least a first opening and at least a second opening formed in the first insultaing layer, a dielectric layer formed in the first opening, a conductive ... | 02/12/2008 |
| 7329572 | Method of forming PIP capacitor A method of forming a polysilicon-insulator-polysilicon (PIP) capacitor includes the steps of forming a lower electrode of a first polysilicon layer over a semiconductor substrate, forming a dielectric layer over the lower electrode, forming a second polysilicon lay... | 02/12/2008 |
| 7312116 | Method for forming a MIM capacitor in a semiconductor device In a method of forming a metal-insulator-metal (MIM) capacitor in a semiconductor device, after forming a capacitor insulation layer on a lower metal layer of the MIM capacitor, an upper electrode is formed by ion implantation into the capacitor insulation layer and... | 12/25/2007 |
| 7306987 | Capacitor and method for fabricating the same A capacitor structure and a method of fabricating the capacitor structure wherein. The lower electrode and the upper electrode are constructed to be separated from each other by a predetermined interval and to be engaged with each other using a series of alternating... | 12/11/2007 |
| 7300852 | Method for manufacturing capacitor of semiconductor element A method for manufacturing a capacitor of a semiconductor element including: forming a bottom electrode of the capacitor on a semiconductor substrate; performing rapid thermal nitrification (RTN) on the upper surface of the bottom electrode; performing a thermal pro... | 11/27/2007 |
| 7294544 | Method of making a metal-insulator-metal capacitor in the CMOS process A method for fabricating an improved metal-insulator-metal capacitor is achieved. An insulating layer is provided overlying conducting lines on a semiconductor substrate. Via openings through the insulating layer to the conducting lines are filled with metal plugs. ... | 11/13/2007 |
| 7285813 | Metal-insulator-metal capacitor and method for manufacturing the same A capacitor has a lower electrode formed on an insulation layer, a dielectric layer formed on the lower electrode, an upper electrode layer formed on the dielectric layer, and a first protection layer pattern formed on the upper electrode layer. The upper electrode ... | 10/23/2007 |
| 7285853 | Multilayer anti-reflective coating for semiconductor lithography and the method for forming the same An interconnect structure has a dielectric layer having a dielectric constant less than 3.9 overlying a substrate with a conductive region, a silicon oxycarbide layer overlying the dielectric layer, and a silicon oxynitride layer overlying the silicon oxycarbide lay... | 10/23/2007 |
| 7282408 | Surface treatment of an oxide layer to enhance adhesion of a ruthenium metal layer A method for forming a ruthenium metal layer on a dielectric layer comprises forming a silicon dioxide layer, then treating the silicon dioxide with a silicon-containing gas, for example silicon hydrides such as silane, disilane, or methylated silanes. Subsequently,... | 10/16/2007 |
| 7276422 | Post passivation interconnection schemes on top of the IC chips A new method is provided for the creation of interconnect lines. Fine line interconnects are provided in a first layer of dielectric overlying semiconductor circuits that have been created in or on the surface of a substrate. A layer of passivation is deposited over... | 10/02/2007 |
| 7271038 | Methods of forming ruthenium film by changing process conditions during chemical vapor deposition and ruthenium films formed thereby A ruthenium (Ru) film is formed on a substrate as part of a two-stage methodology. During the first stage, the Ru film is formed on the substrate in a manner in which the Ru nucleation rate is greater than the Ru growth rate. During the second stage, the Ru film is ... | 09/18/2007 |
| 7271053 | Methods of forming capacitors and electronic devices A method of forming a capacitor includes forming a first conductive capacitor electrode layer over a substrate. The first electrode layer has an outer surface comprising a noble metal in at least one of elemental and alloy forms. A gaseous mixture comprising a metal... | 09/18/2007 |
| 7271054 | Method of manufacturing a ferroelectric capacitor having RU1-XOX electrode A ferroelectric capacitor has the property that polarization of a ferroelectric thin film can readily be reversed and polarization-reversal charge increased. The ferroelectric capacitor has a bottom electrode, a ferroelectric thin film and a top electrode. The top e... | 09/18/2007 |
| 7268038 | Method for fabricating a MIM capacitor having increased capacitance density and related structure According to one embodiment of the invention, a method for fabricating a MIM capacitor in a semiconductor die includes a step of depositing a first interconnect metal layer. The method further includes depositing a layer of silicon nitride on the first interconnect ... | 09/11/2007 |
| 7264846 | Ruthenium layer formation for copper film deposition A method of ruthenium layer formation for high aspect ratios, interconnect features is described. The ruthenium layer is formed using a cyclical deposition process. The cyclical deposition process comprises alternately adsorbing a ruthenium-containing precursor and ... | 09/04/2007 |
