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| Number | Title | Issue Date |
| 8129239 | Semiconductor device having an expanded storage node contact and method for fabricating the same A semiconductor device is disclosed that stably ensures an area of a storage node contact connected to a junction region in an active region of the semiconductor device and is thus able to improve the electrical properties of the semiconductor device and enhance a y... | 03/06/2012 |
| 8071440 | Method of fabricating a dynamic random access memory A method of fabricating a dynamic random access memory is provided. First, a substrate at least having a memory device area and a peripheral device area is provided, wherein an isolation structure and a capacitor are formed in the substrate of the memory device area... | 12/06/2011 |
| 8030157 | Liner protection in deep trench etching A method of forming a trench in a semiconductor device formed of a substrate and a first layer formed over the substrate includes forming an initial trench that passes through the first layer to the substrate, the initial trench having a diameter that decreases from... | 10/04/2011 |
| 7863130 | Tunable stressed polycrystalline silicon on dielectrics in an integrated circuit System and method for creating stressed polycrystalline silicon in an integrated circuit. A preferred embodiment includes manufacturing an integrated circuit, including forming a trench in an integrated circuit substrate, forming a cavity within the integrated circu... | 01/04/2011 |
| 7846792 | Method for manufacturing semiconductor device and semiconductor device manufacturing system A method for manufacturing a semiconductor device that controls the influence of a thickness of a stopper film even if there is a change in the thickness of the stopper film by measuring the thickness prior to etching to a predetermined thickness. ... | 12/07/2010 |
| 7811881 | Methods for forming semiconductor structures with buried isolation collars and semiconductor structures formed by these methods A semiconductor structure including a trench formed in a substrate and a buried isolation collar that extends about sidewalls of the trench. The buried isolation collar is constituted by an insulator formed from a buried porous region of substrate material. The poro... | 10/12/2010 |
| 7799632 | Method of forming an isolation structure by performing multiple high-density plasma depositions One embodiment of the present invention relates to a method of forming an isolation structure. During this method, an isolation trench is formed within a semiconductor body. After this trench is formed, it is filled by performing multiple high-frequency plasma depos... | 09/21/2010 |
| 7678645 | Formation of thin semiconductor layers by low-energy plasma enhanced chemical vapor deposition and semiconductor heterostructure devices Method for forming a highly relaxed epitaxial semiconductor layer (52) with a thickness between 100 nm and 800 nm in a growth chamber includes four principle steps. In a first step, the method provides a substrate (51) in the growth chamber on a substr... | 03/16/2010 |
| 7592218 | Methods of forming vertical transistors A vertical transistor forming method includes forming a first pillar above a first source/drain and between second and third pillars, providing a first recess between the first and second pillars and a wider second recess between the first and third pillars, forming... | 09/22/2009 |
| 7514317 | Strained semiconductor device and method of making same A method of making a semiconductor device is disclosed. A semiconductor body, an STI region, a gate and a silicided source/drain region are provided. The STI area is etched, and a liner is formed at the upper surface. ... | 04/07/2009 |
| 7491604 | Trench memory with monolithic conducting material and methods for forming same A trench memory filled with a monolithic conducting material and methods for forming the same are disclosed. The trench memory includes a trench that has only a single, monolithic conducting material within the trench. The method includes forming a trench with a col... | 02/17/2009 |
| 7429512 | Method for fabricating flash memory device A method of fabricating a flash memory device. A DDD ion is implanted into a high voltage PMOS transistor and into source and drain junctions of a cell transistor in order to facilitate a pinch-off phenomenon in the gate to drain overlap region and also increase the... | 09/30/2008 |
| 7429509 | Method for forming a semiconductor device A method for forming a semiconductor device. A substrate is provided, wherein the substrate has recessed gates and deep trench capacitor devices therein. Protrusions of the recessed gates and upper portions of the deep trench capacitor devices are revealed. Spacers ... | 09/30/2008 |
| 7425486 | Method for forming a trench capacitor A method for forming a trench capacitor is presented in the following process steps. A trench is formed on a semiconductor substrate. A first trench dielectric is deposited into the trench without reaching a full height thereof. An etch stop layer is formed on the f... | 09/16/2008 |
| 7416937 | Semiconductor device and method for fabricating the same A method creates semiconductor device in which a storage dielectric film and a storage electrode included in the capacitor is transferred from an inactive region of a semiconductor substrate to the active region thereof, i.e., into a device isolating trench such tha... | 08/26/2008 |
| 7407852 | Trench capacitor of a DRAM and fabricating method thereof A method of fabricating trench capacitors is described. A substrate having at least one isolation structure is provided. A first trench and a second trench are formed in the substrate beside the isolation structure. A first lower electrode and a second lower electro... | 08/05/2008 |
| 7393750 | Method for manufacturing a semiconductor device Embodiments relate to a method of manufacturing a semiconductor device. According to embodiments, the method may include forming a first and a second insulating layer on a semiconductor substrate of which an active area and an isolation region are defined, forming a... | 07/01/2008 |
| 7390717 | Trench power MOSFET fabrication using inside/outside spacers A fabrication process for a trench type power semiconductor device includes forming inside spacers over a semiconductor surface. Using the spacers as masks, trenches with gates are formed in the semiconductor body. After removing the spacers, source implants are for... | 06/24/2008 |
| 7364962 | Shallow trench isolation process utilizing differential liners A method of manufacturing an integrated circuit (IC) can utilize a shallow trench isolation (STI) technique. The shallow trench isolation technique can be used in an IC process. Separate liners for the trench are used for NMOS and PMOS regions. The liners can induce... | 04/29/2008 |
| 7361546 | Method of forming conductive stud on vertical memory device A method of forming a conductive stud is provided. The method includes providing a substrate which has an upper surface and an opening. The opening exposes a portion of a vertical memory device. A conductive layer is formed over the substrate to fill the opening. A ... | 04/22/2008 |
| 7354812 | Multiple-depth STI trenches in integrated circuit fabrication Multiple trench depths within an integrated circuit device are formed by first forming trenches in a substrate to a first depth, but of varying widths. Formation of a dielectric layer can cause some of the trenches to fill or close off while leaving other, wider tre... | 04/08/2008 |
| 7351634 | Trench-capacitor DRAM device and manufacture method thereof A method for fabricating a trench capacitor is disclosed. A substrate having a first pad layer is provided. STI structure is embedded into the first pad layer and the substrate. A second pad layer is deposited over the first pad layer and the STI structure. Two adja... | 04/01/2008 |
| 7348235 | Semiconductor device and method of manufacturing the same An isolation insulation film is formed in an isolation trench in an upper portion of a silicon substrate. The isolation insulation film has an opening by which inner walls and bottom of the isolation trench are exposed. A lower diffusion layer serving as a lower ele... | 03/25/2008 |
| 7348622 | Memories having a charge storage node at least partially located in a trench in a semiconductor substrate and electrically coupled to a source/drain region formed in the substrate A memory charge storage node (120.1, 120.2, 120.3) is at least partially located in a trench (124). The memory comprises a transistor including a source/drain region (170) present at a first side (124.1) but not a second side (124.2 | 03/25/2008 |
| 7344953 | Process for vertically patterning substrates in semiconductor process technology by means of inconformal deposition On a substrate surface, which has been patterned in the form of a relief, of a substrate, typically of a semiconductor wafer, a deposition process is used to provide a covering layer on process surfaces which are vertical or inclined with respect to the substrate su... | 03/18/2008 |
| 7338878 | Method for forming capacitor in semiconductor device Upon a deep-hole capacitor fabrication, a hole is formed in an insulator layer, and then a film of a conductive material is formed on the insulator layer and on the whole inner surface of the hole. The film and the insulator layer are exposed to a chemical-mechanica... | 03/04/2008 |
| 7335554 | Method for fabricating semiconductor A method for fabricating a semiconductor device includes forming a first trench by etching a substrate already provided with a storage node contact (SNC) region and a bit line contact (BLC) region, forming a protection layer on sidewalls of the first trench, forming... | 02/26/2008 |
| 7332396 | Semiconductor device with recessed trench and method of fabricating the same A semiconductor device with a recessed channel and a method of fabricating the same are provided. The semiconductor device comprises a substrate, a gate, a source, a drain, and a reverse spacer. The substrate comprises a recessed trench. The gate is formed above the... | 02/19/2008 |
| 7321147 | Semiconductor device including a trench capacitor A device including a trench capacitor formed in a semiconductor substrate for configuring a DRAM cell together with a cell transistor is provided. The device also includes a cell transistor including diffused regions formed in a surface of a semiconductor substrate;... | 01/22/2008 |
| 7316951 | Fabrication method for a trench capacitor having an insulation collar The present invention provides a fabrication method for a trench capacitor having an insulation collar (10) in a silicon substrate (1), having the steps of: providing a trench (5) in the silicon substrate (1); providing the insulation col... | 01/08/2008 |
| 7316978 | Method for forming recesses A method for forming a recess. The method includes providing a substrate with two protrusions having a first side wall and a second side wall opposite to the first side wall disposed above the substrate, conformally forming a mask layer on the substrate and the prot... | 01/08/2008 |
| 7303953 | Production of an integrated capacitor A process for producing a capacitor integrated into an electronic circuit comprises the formation of a trench in a substrate through a conductive portion similar to an MOS transistor gate. Alternating conductive, insulating and conductive layers are deposited inside... | 12/04/2007 |
| 7279742 | Transistor structure with a curved channel, memory cell and memory cell array for DRAMs, and methods for fabricating a DRAM A transistor structure having source/drain regions arranged in a horizontal plane along an x axis has a recess structure, which separates the two source/drain regions from one another and increases the effective channel length Leff of the transistor struc... | 10/09/2007 |
| 7279393 | Trench isolation structure and method of manufacture therefor The present invention provides a trench isolation structure, a method for manufacturing a trench isolation structure, and a method for manufacturing an integrated circuit including the trench isolation structure. In one aspect, the method includes forming a hardmask... | 10/09/2007 |
| 7279381 | Method for fabricating cell transistor of flash memory A method for fabricating a cell transistor of a flash memory including a device isolation film is disclosed, to prevent the mouse bite and the residue of a gate electrode, which includes the steps of forming a moat pattern of STI structure on a semiconductor substra... | 10/09/2007 |
| 7273790 | Method for fabricating trench capacitor with insulation collar electrically connected to substrate through buried contact, in particular, for a semiconductor memory cell Fabricating a trench capacitor with an insulation collar in a substrate, which is electrically connected thereto on one side through a buried contact, in particular, for a semiconductor memory cell with a planar selection transistor in the substrate and connected th... | 09/25/2007 |
| 7265025 | Method for filling trench and relief geometries in semiconductor structures A method teaches how to fill trench structures formed in a semiconductor substrate. The trench structures are coated in a first deposition process with a first primary filling layer with a high conformity and minimal roughness. A V etching reaching down to a predete... | 09/04/2007 |
| 7262110 | Trench isolation structure and method of formation In general, the present invention discloses at least one trench isolation region formed in a semiconductor substrate to electrically and/or optically isolate at least one active region from another active region. The at least one trench isolation region comprises a ... | 08/28/2007 |
| 7262090 | Random access memory (RAM) capacitor in shallow trench isolation with improved electrical isolation to overlying gate electrodes A process for fabricating a novel random access memory (RAM) capacitor in a shallow trench isolation (STI) The method utilizes a novel node photoresist mask for plasma etching recesses in the STI that prevents plasma-etch-induced defects in the substrate. This novel... | 08/28/2007 |
| 7247534 | Silicon device on Si:C-OI and SGOI and method of manufacture A semiconductor structure and method of manufacturing is provided. The method of manufacturing includes forming shallow trench isolation (STI) in a substrate and providing a first material and a second material on the substrate. The first material and the second mat... | 07/24/2007 |
