Microwave Oven With Removable Storage Cassette in Dashboard of Motor Vehicle
A microwave oven adapted for use within a motor vehicle dashboard area. The microwave oven has a removable storage cassette, and slidable platforms for securing and serving containers of beverages and foods.
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| Number | Title | Issue Date |
| 8133781 | Method of forming a buried plate by ion implantation A mask layer formed over a semiconductor substrate is lithographically patterned to form an opening therein. Ions are implanted at an angle that is normal to the surface of the semiconductor substrate through the opening and into an upper portion of the semiconducto... | 03/13/2012 |
| 8129238 | Semiconductor devices having dual trench, methods of fabricating the same, and electronic system having the same A semiconductor device having a dual trench and methods of fabricating the same, a semiconductor module, an electronic circuit board, and an electronic system are provided. The semiconductor device includes a semiconductor substrate having a cell region including a ... | 03/06/2012 |
| 8114733 | Semiconductor device for preventing the leaning of storage nodes and method for manufacturing the same A semiconductor device for preventing the leaning of storage nodes and a method of manufacturing the same is described. The semiconductor device includes support patterns that are formed to support a plurality of cylinder type storage nodes. The support patterns are... | 02/14/2012 |
| 8110464 | SOI protection for buried plate implant and DT bottle ETCH An SOI layer has an initial trench extending therethrough, prior to deep trench etch. An oxidation step, such as thermal oxidation is performed to form a band of oxide on an inner periphery of the SOI layer to protect it during a subsequent RIE step for forming a de... | 02/07/2012 |
| 8101482 | Method of fabricating semiconductor device having transistor Provided is a method of fabricating a semiconductor device having a transistor. The method includes forming a first gate trench in a first active region of a semiconductor substrate. A first gate layer partially filling the first gate trench is formed. Ions may be i... | 01/24/2012 |
| 8071439 | Method for manufacturing semiconductor device A method for manufacturing a semiconductor device includes forming a first interlayer insulating film over a semiconductor substrate; forming a first opening in the first interlayer insulating film; forming a second interlayer insulating film on the first interlayer... | 12/06/2011 |
| 8053309 | Methods of fabricating semiconductor devices A semiconductor device includes a semiconductor substrate that includes first and second regions; first, second, and third insulating layers; a capacitor dielectric layer that includes first and second dielectric layers; a gate insulating layer formed on the first a... | 11/08/2011 |
| 8043912 | Manufacturing method of a semiconductor device having polycide wiring layer A semiconductor device is provided with a semiconductor substrate comprising element isolation regions and an element region surrounded by the element isolation regions, a first polysilicon layer formed in the element region of the semiconductor substrate, an elemen... | 10/25/2011 |
| 8021945 | Bottle-shaped trench capacitor with enhanced capacitance In accordance with an aspect of the invention, a method is provided for fabricating a semiconductor chip including a trench capacitor. In such method, a monocrystalline semiconductor region can be etched in a vertical direction through an opening in a dielectric lay... | 09/20/2011 |
| 7998808 | Semiconductor device fabrication using spacers A process for fabrication of a semiconductor device that includes forming a first trench in a semiconductor body, forming spaced spacers in the first trench, and forming a narrower second trench at the bottom of the first trench using the spacers as a mask. ... | 08/16/2011 |
| 7994002 | Method and apparatus for trench and via profile modification Embodiments of the present invention generally relates to an apparatus and a method for processing semiconductor substrates. Particularly, embodiments of the present invention relates to methods and apparatus for trench and via profile modification prior to filling ... | 08/09/2011 |
| 7989286 | Electronic devices using carbon nanotubes having vertical structure and the manufacturing method thereof Provided are an electronic device to which vertical carbon nanotubes (CNTs) are applied and a method of manufacturing the same. The method of manufacturing an electronic device having a vertical CNT includes the steps of: (a) preparing a substrate on which a silicon... | 08/02/2011 |
| 7923325 | Deep trench device with single sided connecting structure and fabrication method thereof A deep trench device with a single sided connecting structure. The device comprises a substrate having a trench therein. A buried trench capacitor is disposed in a lower portion of the trench. An asymmetric collar insulator is disposed on an upper portion of the sid... | 04/12/2011 |
| 7883962 | Trench DRAM cell with vertical device and buried word lines A DRAM array having trench capacitor cells of potentially 4F2 surface area (F being the photolithographic minimum feature width), and a process for fabricating such an array. The array has a cross-point cell layout in which a memory cell is located at the... | 02/08/2011 |
| 7871884 | Manufacturing method of dynamic random access memory A method for manufacturing the DRAM includes first providing a substrate where patterned first mask layer and deep trenches exposed by the patterned first mask layer are formed. Deep trench capacitors are formed in the deep trenches and each of the deep trench capac... | 01/18/2011 |
| 7871883 | Method of manufacturing semiconductor device includes the step of depositing the capacitor insulating film in a form of a hafnium silicate The invention aims at enabling leakage current characteristics and a step coverage property to be improved by depositing a hafnium silicate film by utilizing an atomic layer evaporation method using a hafnium raw material, a silicon raw material and an oxidizing age... | 01/18/2011 |
| 7863129 | Method for manufacturing semiconductor device A method for manufacturing a semiconductor device includes forming an oxide film uniformly in a trench in the device isolation by, for example, a radical oxidation process. The method also includes increasing the thickness of the oxide film positioned at recess side... | 01/04/2011 |
| 7851300 | Method of fabricating a trench gate MOSFET for maximizing breakdown voltage A trench gate MOSFET and a fabrication method thereof includes forming a first epitaxial layer over a semiconductor substrate, and then forming a second epitaxial layer formed over the first epitaxial layer, and then forming a body region over the second conductive ... | 12/14/2010 |
| 7846791 | Structure for a trench capacitor A design structure of a trench capacitor with an isolation collar in a semiconductor substrate where the substrate adjacent to the isolation collar is free of dopants caused by auto-doping. The design structure resulting from the means for fabricating the trench cap... | 12/07/2010 |
| 7795090 | Electrical device and method for fabricating the same A method of fabricating self-aligned recess utilizing asymmetric poly spacer is disclosed. A semiconductor substrate having thereon a first pad layer and second pad layer is provided. A plurality of trenches is embedded in a memory array region of the semiconductor ... | 09/14/2010 |
| 7767519 | One transistor/one capacitor dynamic random access memory (1T/1C DRAM) cell In general, in one aspect, a method includes forming a semiconductor fin. A first insulating layer is formed adjacent to the semiconductor fin. A second insulating layer is formed over the first insulating layer and the semiconductor fin. A first trench is formed in... | 08/03/2010 |
| 7759188 | Method of fabricating vertical body-contacted SOI transistor A method of fabricating a vertical field effect transistor (“FET”) is provided which includes a transistor body region and source and drain regions disposed in a single-crystal semiconductor-on-insulator (“SOI”) region of a substrate adjacent a sidewall of a... | 07/20/2010 |
| 7759189 | Method of manufacturing a dual contact trench capacitor A method of manufacturing a dual contact trench capacitor is provided. The method includes a first plate extending from a trench and isolated from a wafer body, and forming a second plate extending from the trench and isolated from the wafer body and the first plate... | 07/20/2010 |
| 7749835 | Trench memory with self-aligned strap formed by self-limiting process A semiconductor structure is described. The structure includes a trench opening formed in a semiconductor substrate having a semiconductor-on-insulator (SOI) layer and a buried insulating (BOX) layer; and a filling material formed in the trench opening, the filling ... | 07/06/2010 |
| 7732274 | High voltage deep trench capacitor A semiconductor process and apparatus provide a high voltage deep trench capacitor structure (10) that is integrated in an integrated circuit, alone or in alignment with a fringe capacitor (5). The deep trench capacitor structure is constructed from a ... | 06/08/2010 |
| 7723181 | Overlay alignment mark and alignment method for the fabrication of trench-capacitor dram devices A small-size (w | 05/25/2010 |
| 7713813 | Methods of forming capacitors The invention includes methods in which silicon is removed from titanium-containing container structures with an etching composition having a phosphorus-and-oxygen-containing compound therein. The etching composition can, for example, include one or both of ammonium... | 05/11/2010 |
| 7713814 | Hybrid orientation substrate compatible deep trench capacitor embedded DRAM Method of limiting the lateral extent of a trench capacitor by a dielectric spacer in a hybrid orientations substrate is provided. The dielectric spacer separates a top semiconductor portion from an epitaxially regrown portion, which have different crystallographic ... | 05/11/2010 |
| 7709320 | Method of fabricating trench capacitors and memory cells using trench capacitors A method of forming a trench capacitor and memory cells using the trench capacitor. The method includes: forming an opening in a masking layer; and forming a trench in the substrate through the opening, the trench having contiguous upper, middle and lower regions, t... | 05/04/2010 |
| 7700435 | Method for fabricating deep trench DRAM array A method for fabricating deep trench DRAM array is disclosed. A substrate having thereon a memory array area is provided. An array of deep trench patterns is formed in the memory array area. The deep trench (DT) capacitor patterns include first dummy DT patterns in ... | 04/20/2010 |
| 7700433 | MIM type capacitor A method of fabricating an MIM type capacitor includes at least one of: Forming a first trench within an insulating interlayer formed on a semiconductor substrate. Forming a lower electrode layer of a metal nitride layer substance to fill an inside of the first tren... | 04/20/2010 |
| 7700434 | Trench widening without merging A semiconductor fabrication method. First, a semiconductor structure is provided. The semiconductor structure includes a semiconductor substrate, a trench in the semiconductor substrate. The trench includes a side wall which includes {100} side wall surfaces and {11... | 04/20/2010 |
| 7696041 | Method for fabricating a semiconductor component and semiconductor component In a method for fabricating a semiconductor component, a semiconductor substrate comprising a first surface is provided and a shaping matrix is applied to the first surface. The shaping matrix comprises at least one continuous depression arranged in such a way that ... | 04/13/2010 |
| 7691704 | Method for manufacturing semiconductor device having damascene MIM type capacitor A method for manufacturing a semiconductor device having a damascene metal/insulator/metal (MIM)-type capacitor and metal lines including providing a semiconductor device; sequentially forming a first interlayer insulating film and a second interlayer insulating fil... | 04/06/2010 |
| 7682896 | Trench metal-insulator-metal (MIM) capacitors integrated with middle-of-line metal contacts, and method of fabricating same The present invention relates to a method of fabrication process which integrates the processing steps for fabricating the trench MIM capacitor with the conventional middle-of-line processing steps for fabricating metal contacts, so that the inner metallic electrode... | 03/23/2010 |
| 7674675 | Method of forming an integrated SOI fingered decoupling capacitor The invention provides a fingered decoupling capacitor in the bulk silicon region that are formed by etching a series of minimum or sub-minimum trenches in the bulk silicon region, oxidizing these trenches, removing the oxide from at least one or more disjoint trenc... | 03/09/2010 |
| 7670900 | Method and structure for fabricating capacitor devices for integrated circuits A dynamic random access memory device including a capacitor structure, e.g., trench, stack. The device includes a substrate (e.g., silicon, silicon on insulator, epitaxial silicon) having a surface region. The device includes an interlayer dielectric region overlyin... | 03/02/2010 |
| 7670901 | Method of fabricating a bottle trench and a bottle trench capacitor A method of fabricating a bottle trench and a bottle trench capacitor. The method including: providing a substrate; forming a trench in the substrate, the trench having sidewalls and a bottom, the trench having an upper region adjacent to a top surface of the substr... | 03/02/2010 |
| 7659163 | Semiconductor devices having recessed structures and methods of forming the same A method for forming a semiconductor device is provided. The method includes providing a substrate having a plurality of protrusions projecting from the substrate; forming a silicon layer over the substrate and each protrusion; performing an anisotropic etching to t... | 02/09/2010 |
| 7651908 | Methods of fabricating image sensors A method of fabricating an image sensor which reduces fabricating costs through simultaneous formation of capacitor structures and contact structures may be provided. The method may include forming a lower electrode on a substrate, forming an interlayer insulating f... | 01/26/2010 |