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| Number | Title | Issue Date |
| 8187932 | Three dimensional horizontal diode non-volatile memory array and method of making thereof A non-volatile memory device contains a three dimensional stack of horizontal diodes located in a trench in an insulating material, a plurality of storage elements, a plurality of word lines extending substantially vertically, and a plurality of bit lines. Each of t... | 05/29/2012 |
| 8163612 | Silicon germanium heterostructure barrier varactor Methods and heterostructure barrier varactor (HBV) diodes optimized for application with frequency multipliers at providing outputs at submillimeter wave frequencies and above. The HBV diodes include a silicon-containing substrate, an electrode over the silicon-cont... | 04/24/2012 |
| 8158475 | Gate electrodes of HVMOS devices having non-uniform doping concentrations A semiconductor structure includes a semiconductor substrate; a first high-voltage well (HVW) region of a first conductivity type overlying the semiconductor substrate; a second well region of a second conductivity type opposite the first conductivity type overlying... | 04/17/2012 |
| 8133778 | Layout method of semiconductor device with junction diode for preventing damage due to plasma charge Provided is a layout method of junction diodes for preventing damage caused by plasma charge. The layout method includes operations of forming an active layer so as to form a plurality of active regions in a unit layout pattern; forming a gate layer so as to form a ... | 03/13/2012 |
| 8129237 | Vertical light-emitting diode device structure with SiNlayer A vertical light-emitting diode (VLED) structure fabricated with a SixNy layer responsible for providing increased light extraction out of a roughened n-doped surface of the VLED are provided. Such VLED structures fabricated with a Six | 03/06/2012 |
| 8105895 | Enhancing Schottky breakdown voltage (BV) without affecting an integrated MOSFET-Schottky device layout This invention discloses a semiconductor power device that includes an active cell area having a plurality of power transistor cells. Each of said power transistor cells has a planar Schottky diode that includes a Schottky junction barrier metal covering areas above... | 01/31/2012 |
| 8076195 | Resistive memory architectures with multiple memory cells per access device A resistive memory structure, for example, phase change memory structure, includes one access device and two or more resistive memory cells. Each memory cell is coupled to a rectifying device to prevent parallel leak current from flowing through non-selected memory ... | 12/13/2011 |
| 8076196 | Semiconductor device and fabrication method for the same The semiconductor device includes: memory cells each having a first multilayer electrode including a first lower electrode made of a first conductive film and a first upper electrode made of a second conductive film formed one on the other with a first interface fil... | 12/13/2011 |
| 8034680 | Method of manufacturing a memory device Provided are a memory device formed using one or more source materials not containing hydrogen as a constituent element and a method of manufacturing the memory device. ... | 10/11/2011 |
| 8030155 | Schottky diode with minimal vertical current flow A method of forming a rectifying diode. The method comprises providing a first semiconductor region of a first conductivity type and having a first dopant concentration and forming a second semiconductor region in the first semiconductor region. The second semicondu... | 10/04/2011 |
| 7994001 | Trenched power semiconductor structure with schottky diode and fabrication method thereof A fabrication method of a trenched power semiconductor structure with a schottky diode is provided. Firstly, a drain region is formed in a substrate. Next, at least two gate structures are formed above the drain region, and then, a body and at least a source region ... | 08/09/2011 |
| 7968402 | Method for forming a high-performance one-transistor memory cell One aspect of this disclosure relates to a memory cell. In various embodiments, the memory cell includes an access transistor having a floating node, and a diode connected between the floating node and a diode reference potential line. The diode includes an anode, a... | 06/28/2011 |
| 7935594 | Damascene process for carbon memory element with MIIM diode Forming a metal-insulator diode and carbon memory element in a single damascene process is disclosed. A trench having a bottom and a sidewall is formed in an insulator. A first diode electrode is formed in the trench during a single damascene process. A first insula... | 05/03/2011 |
| 7910426 | Pixel and imager device having high-k dielectrics in isolation structures An imager device that has an isolation structure such that pinned photodiode characteristics are maintained without increasing doping levels. The invention provides an isolation structure to maintain pinned photodiode characteristics without increasing doping levels... | 03/22/2011 |
| 7897453 | Dual insulating layer diode with asymmetric interface state and method of fabrication An integrated circuit including vertically oriented diode structures between conductors and methods of fabricating the same are provided. The diode is a metal-insulator diode having a first metal layer, a first insulating layer, a second insulating layer and a secon... | 03/01/2011 |
| 7888200 | Embedded memory in a CMOS circuit and methods of forming the same In some aspects, a method of forming a memory circuit is provided that includes (1) forming a two-terminal memory element on a substrate between a gate layer and a first metal layer of the memory circuit; and (2) forming a CMOS transistor on the substrate, the CMOS ... | 02/15/2011 |
| 7883957 | Image sensor and method for manufacturing the same Provided is an image sensor and a method for manufacturing the same. In the image sensor, a first substrate has a lower metal line and circuitry thereon. A crystalline semiconductor layer contacts the lower metal line and is bonded to the first substrate. A photodio... | 02/08/2011 |
| 7883958 | Phase change memory device having a diode that has an enlarged PN interfacial junction and method for manufacturing the same A phase change memory device that has a diode with an enlarged, i.e., bulging, PN interfacial junction and a corresponding fabrication method are presented. The phase change memory device includes a semiconductor substrate, an insulation layer, a diode, and a phase ... | 02/08/2011 |
| 7879670 | Method of manufacturing nonvolatile storage device A method of manufacturing a nonvolatile storage device having memory cell arrays according to an embodiment of the present invention includes forming, in a memory cell array forming region above a processed film, first columnar members arrayed at substantially equal... | 02/01/2011 |
| 7858468 | Memory devices and formation methods A method includes forming an electrical insulator material over an integrated circuit having a metal-containing conductive interconnect and activating a dopant in a semiconductor material of a substrate to provide a doped region. The doped region provides a junction... | 12/28/2010 |
| 7858469 | Method for forming a trigger device for ESD protection circuit The present invention is a trigger device useful, for example, in triggering an SCR in an ESD protection circuit. Illustratively, an NMOS trigger device comprises a gate and heavily doped P and N regions in a P-well on opposite sides of the gate. A first N type sour... | 12/28/2010 |
| 7842568 | Lateral power semiconductor device for high frequency power conversion system, has isolation layer formed over substrate for reducing minority carrier storage in substrate A lateral power semiconductor device has a substrate and an isolation layer formed over the substrate for reducing minority carrier storage in the substrate. A well region is formed over the isolation layer. A source region, drain region, and channel region are form... | 11/30/2010 |
| 7811880 | Fabrication of recordable electrical memory A memory cell of a memory device is fabricated by forming a first electrode on a substrate, positioning a photo mask at a first position relative to the substrate, and forming a first material layer on the first electrode based on a pattern on the photo mask. The ph... | 10/12/2010 |
| 7803679 | Method of forming a vertical diode and method of manufacturing a semiconductor device using the same A method of forming a vertical diode and a method of manufacturing a semiconductor device (e.g., a semiconductor memory device such as a phase-change memory device) includes forming an insulating structure having an opening on a substrate and filling the opening wit... | 09/28/2010 |
| 7741172 | Positive-intrinsic-negative (PIN)/negative-intrinsic-positive (NIP) diode A positive-intrinsic-negative (PIN)/negative-intrinsic-positive (NIP) diode includes a semiconductor substrate having first and second main surfaces opposite to each other. The semiconductor substrate is of a first conductivity. The PIN/NIP diode includes at least o... | 06/22/2010 |
| 7723180 | Multilevel nonvolatile memory device containing a carbon storage material and methods of making and using same A method of making a non-volatile memory device includes forming a first electrode, forming a steering element, forming at least one feature, forming a carbon resistivity switching material on at least one sidewall of the at least one feature such that the carbon re... | 05/25/2010 |
| 7704825 | Method of fabricating memory including diode A memory capable of reducing the memory cell size is provided. This memory includes a first conductive type first impurity region formed on a memory cell array region of the main surface of a semiconductor substrate for functioning as a first electrode of a diode in... | 04/27/2010 |
| 7691702 | Method of manufacture of an apparatus for increasing stability of MOS memory cells In deep submicron memory arrays there is noted a relatively steady on current value and, therefore, threshold values of the transistors comprising the memory cell are reduced. This, in turn, results in an increase in the leakage current of the memory cell. With the ... | 04/06/2010 |
| 7678643 | Method for manufacturing a CMOS image sensor Provided is a CMOS image sensor and method of manufacturing same. The CMOS image sensor includes a photodiode, a transfer transistor, a reset transistor, a drive transistor, and a select transistor. A device isolation layer is formed on a first conductive type subst... | 03/16/2010 |
| 7670897 | Semiconductor device and method for fabricating the same A non-volatile memory semiconductor device and a method for fabricating the same are disclosed. The semiconductor device includes a PN junction diode formed over a semiconductor substrate. Insulating films may be formed over the PN junction diode and patterned to ha... | 03/02/2010 |
| 7651906 | Integrated circuit devices having a stress buffer spacer and methods of fabricating the same Integrated circuit devices include an integrated circuit substrate and an insulating layer on the integrated circuit substrate. A contact hole penetrates the insulating layer. A vertical diode is in the contact hole and a stress buffer spacer is provided between the... | 01/26/2010 |
| 7651905 | Apparatus and method for reducing gate leakage in deep sub-micron MOS transistors using semi-rectifying contacts An apparatus and method for the reduction of gate leakage in deep sub-micron metal oxide semiconductor (MOS) transistors, especially useful for those used in a cross coupled static random access memory (SRAM) cell, is disclosed. In accordance with the invention, the... | 01/26/2010 |
| 7645667 | Two-step self-aligned source etch with large process window System and method for self-aligned etching. According to an embodiment, the present invention provides a method for performing self-aligned source etching process. The method includes a step for providing a substrate material. The method also includes a step for for... | 01/12/2010 |
| 7638387 | Mask ROM and method of fabricating the same A mask read-only memory (ROM) includes a dielectric layer formed on a substrate and a plurality of first conductive lines formed on the dielectric layer. A plurality of diodes are formed in the first conductive lines, and a plurality of final vias are formed for a f... | 12/29/2009 |
| 7615439 | Damascene process for carbon memory element with MIIM diode Forming a metal-insulator diode and carbon memory element in a single damascene process is disclosed. A trench having a bottom and a sidewall is formed in an insulator. A first diode electrode is formed in the trench during a single damascene process. A first insula... | 11/10/2009 |
| 7579232 | Method of making a nonvolatile memory device including forming a pillar shaped semiconductor device and a shadow mask A method of making a semiconductor device includes forming a pillar shaped semiconductor device surrounded by an insulating layer such that a contact hole in the insulating layer exposes an upper surface of the semiconductor device. The method also includes forming ... | 08/25/2009 |
| 7563666 | Semiconductor structures including vertical diode structures and methods of making the same Semiconductor structures and methods of making a vertical diode structure are provided. The vertical diode structure may have associated therewith a diode opening extending through an insulation layer and contacting an active region on a silicon wafer. A titanium si... | 07/21/2009 |
| 7521315 | Method for fabricating image sensor capable of increasing photosensitivity An image sensor capable of overcoming a decrease in photo sensitivity resulted from using a single crystal silicon substrate, and a method for fabricating the same are provided. An image sensor includes a single crystal silicon substrate, an amorphous silicon layer ... | 04/21/2009 |
| 7507620 | Low-capacity vertical diode A vertical diode of low capacitance formed in a front surface of a semiconductor substrate, including a first area protruding from the substrate surface including at least one doped semiconductor layer of a conductivity type opposite to that of the substrate, the up... | 03/24/2009 |
| 7504297 | Semiconductor device and a method of manufacturing the same A technology is provided where a high performance Schottky-barrier diode and other semiconductor elements can be formed in the same chip controlling the increase in the number of steps. After a silicon oxide film is deposited over a substrate where an n-channel type... | 03/17/2009 |
