Class 438/226 - With epitaxial semiconductor layer formation

Subclass of Class 438 - Semiconductor device manufacturing: process
Definition: Process for making complementary insulated gate field effect
No. of patents: 108
Last issue date: 07/05/2011

«First «Previous1 2 3 Next»Last»

Number	Title	Issue Date
7972922	Method of forming a semiconductor layer A method of forming a semiconductor layer, which in one embodiment is part of a photodetector, includes forming a silicon shape, applying ozonated water, removing the first oxide layer at a temperature below 600 degrees Celsius, and epitaxially growing germanium. Th...	07/05/2011
7795089	Forming a semiconductor device having epitaxially grown source and drain regions A semiconductor device structure is made on a semiconductor substrate having a semiconductor layer having isolation regions. A first gate structure is formed over a first region of the semiconductor layer, and a second gate structure is over a second region of the s...	09/14/2010
7601582	Method for manufacturing a semiconductor device having a device isolation trench A method for manufacturing a semiconductor device includes forming a semiconductor substrate to have a SOI structure by an epitaxial process for forming a gate while forming an insulating film pattern in a bottom where a device isolation trench is formed. The method...	10/13/2009
7432167	Method of fabricating a strained silicon channel metal oxide semiconductor transistor The present invention provides a method of fabricating strained silicon channel MOS transistor, comprising providing a substrate, forming at least a gate structure on the substrate, forming a mask layer on the gate structure, performing an etching process to form tw...	10/07/2008
7402477	Method of making a multiple crystal orientation semiconductor device A method of having transistors formed in enhanced performance crystal orientations begins with a wafer having a semiconductor substrate (12,52) of a first surface orientation, a thin etch stop layer (14,54) on the semiconductor substrate, a buried oxid...	07/22/2008
7402485	Method of forming a semiconductor device A sidewall spacer structure is formed adjacent to a gate structure whereby a material forming an outer surface of the sidewall spacer structure contains nitrogen. Subsequent to its formation the sidewall spacer structure is annealed to harden the sidewall spacer str...	07/22/2008
7393762	Charge-free low-temperature method of forming thin film-based nanoscale materials and structures on a substrate A method of forming a nanostructure at low temperatures. A substrate that is reactive with one of atomic oxygen and nitrogen is provided. A flux of neutral atoms of at least one of nitrogen and oxygen is generated within a laser-sustained-discharge plasma source and...	07/01/2008
7320923	SRAM cell A method for forming a resistor of high value in a semiconductor substrate including forming a stack of a first insulating layer, a first conductive layer, a second insulating layer, and a third insulating layer, the third insulating layer being selectively etchable...	01/22/2008
7242063	Symmetric non-intrusive and covert technique to render a transistor permanently non-operable A technique for and structures for camouflaging an integrated circuit structure. The technique including forming active areas of a first conductivity type and LDD regions of a second conductivity type resulting in a transistor that is always non-operational when sta...	07/10/2007
7217977	Covert transformation of transistor properties as a circuit protection method A technique for and structures for camouflaging an integrated circuit structure. The technique includes the use of a light density dopant (LDD) region of opposite type from the active regions resulting in a transistor that is always off when standard voltages are ap...	05/15/2007
7205619	Method of producing semiconductor device and semiconductor device A semiconductor device able to secure electrical effective thicknesses required for insulating films of electronic circuit elements by using depletion of electrodes of the electronic circuit elements even if the physical thicknesses of the insulating films are not d...	04/17/2007
7166515	Implanted hidden interconnections in a semiconductor device for preventing reverse engineering A camouflaged interconnection for interconnecting two spaced-apart regions of a common conductivity type in an integrated circuit or device and a method of forming same. The camouflaged interconnection comprises a first region forming a conducting channel between th...	01/23/2007
7154136	Isolation structures for preventing photons and carriers from reaching active areas and methods of formation Regions of an integrated circuit are isolated by a structure that includes at least one isolating trench on the periphery of an active area. The trench is deep, extending at least about 0.5 μm into the substrate. The isolating structure prevents photons and electro...	12/26/2006
7148552	High voltage transistor having side-wall width different from side-wall width of a low voltage transistor The present invention has an object to provide a semiconductor device that is equipped with a high breakdown voltage transistor of a high junction breakdown voltage characteristic and a low voltage transistor of a high electric current drive characteristic to thereb...	12/12/2006
7145187	Substrate independent multiple input bi-directional ESD protection structure In a multiple input ESD protection structure, the inputs are isolated from the substrate by highly doped regions of opposite polarity to the input regions. Dual polarity is achieved by providing a symmetrical structure with n+ and p+ regions forming each dual polari...	12/05/2006
7087964	Predominantly <100> polycrystalline silicon thin film transistor A method is provided to produce thin film transistors (TFTs) on polycrystalline films having a single predominant crystal orientation. A layer of amorphous silicon is deposited over a substrate to a thickness suitable for producing a desired crystal orientation. Lat...	08/08/2006
7029979	Methods for manufacturing semiconductor devices Methods for manufacturing semiconductor devices are disclosed. In a disclosed method, a first nitride layer and a device isolation oxide layer are etched to thereby expose a portion of a silicon substrate where an active region is to be formed. An epitaxial growth i...	04/18/2006
7015551	Semiconductor device and method of fabricating same A semiconductor device (100) according to the present invention comprises a vertical PNP bipolar transistor (20), an NMOS transistor (50) and a PMOS transistor (60) that are of high dielectric strength, and a P-type semiconductor substrat...	03/21/2006
7009259	Semiconductor device and method of fabricating same A semiconductor device (100) according to the present invention comprises a vertical PNP bipolar transistor (20), an NMOS transistor (50) and a PMOS transistor (60) that are of high dielectric strength, and a P-type semiconductor substrat...	03/07/2006
6930007	Integration of pre-S/D anneal selective nitride/oxide composite cap for improving transistor performance The present invention facilitates semiconductor device operation and fabrication by providing a cap-annealing process that improves channel electron mobility without substantially degrading PMOS transistor devices. The process uses an oxide/nitride composite-cap to ...	08/16/2005
6903424	Semiconductor device and its manufacturing method A semiconductor device (100) according to the present invention comprises a vertical PNP bipolar transistor (20), an NMOS transistor (50) and a PMOS transistor (60) that are of high dielectric strength, and a P-type semiconductor substrat...	06/07/2005
6881641	Semiconductor device having a retrograde dopant profile in a channel region and method for fabricating the same An epitaxially grown channel layer is provided on a well structure after ion implantation steps and heat treatment steps are performed to establish a required dopant profile in the well structure. The channel layer may be undoped or slightly doped, as required, so t...	04/19/2005
6833589	Method for manufacturing field effect transistor A field oxide film for element isolation is formed on an SOI substrate having a silicon layer formed on an insulating layer, an active nitride film is wet-etched to reduce its film thickness to a value small enough to allow the edge of the silicon layer to become ex...	12/21/2004
6815278	Ultra-thin silicon-on-insulator and strained-silicon-direct-on-insulator with hybrid crystal orientations The invention provides integrated semiconductor devices that are formed upon an SOI substrate having different crystal orientations that provide optimal performance for a specific device. Specifically, an integrated semiconductor structure including at least an SOI ...	11/09/2004
6723618	Methods of forming field isolation structures Field isolation structures and methods of forming field isolation structures are described. In one implementation, the method includes etching a trench within a monocrystalline silicon substrate. The trench has sidewalls and a base, with the base comprising monocrys...	04/20/2004
6667200	Method for forming transistor of semiconductor device A method for forming a transistor of a semiconductor device, including the step of forming channel layers of a first and a second conductive types, performing high temperature thermal process to form stabilized channel layers and forming an epitaxial chan...	12/23/2003
6657262	Monolithically integrated electronic device and fabrication process therefor An electronic device, integrated monolithically in a semiconductor substrate and comprising a bipolar transistor connected in series to at least one MOS transistor, the bipolar transistor having a base region that includes a first buried region and a firs...	12/02/2003
6649481	Methods of fabricating a semiconductor device structure for manufacturing high-density and high-performance integrated-circuits The invention discloses methods of fabricating a semiconductor device structure having low source/drain junction capacitances and low junction leakage currents. The low source/drain junction capacitances are obtained by implementing in a self-aligned mann...	11/18/2003
6627515	Method of fabricating a non-floating body device with enhanced performance A method of forming a buried silicon oxide region in a semiconductor substrate with portions of the buried silicon oxide region formed underlying portions of a strained silicon shape, and where the strained silicon shape is used to accommodate a semicondu...	09/30/2003
6620671	Method of fabricating transistor having a single crystalline gate conductor A method of manufacturing an integrated circuit on a substrate provides a gate structure including single crystalline material. The method can provide a first amorphous or polycrystalline semiconductor layer above a top surface of the substrate and patter...	09/16/2003
6455377	Method to form very high mobility vertical channel transistor by selective deposition of SiGe or multi-quantum wells (MQWs) A method of fabricating a vertical channel transistor, comprising the following steps. A semiconductor substrate having an upper surface is provided. A high doped N-type lower epitaxial silicon layer is formed on the semiconductor substrate. A low doped P...	09/24/2002
6423599	Method for fabricating a field effect transistor having dual gates in SOI (semiconductor on insulator) technology For fabricating a field effect transistor having dual gates, on a buried insulating layer in SOI (semiconductor on insulator) technology, a first layer of first semiconductor material is deposited on the buried insulating material. The first layer of firs...	07/23/2002
6413829	Field effect transistor in SOI technology with schottky-contact extensions For forming a field effect transistor on a buried insulating material in SOI (semiconductor on insulator) technology, a gate dielectric and a gate electrode are formed on the semiconductor material, and spacers are formed on sidewalls of the gate electrod...	07/02/2002
6376293	Shallow drain extenders for CMOS transistors using replacement gate design A method of fabricating a CMOS transistor to construct shallow drain extenders (30) using a replacement gate design. The method involves forming epitaxial layers (30) and (220) the will later function as shallow drain extensions. The etching of the replac...	04/23/2002
6368925	Method of forming an EPI-channel in a semiconductor device An epi-channel of a uniform shape is formed by adjusting the temperature and pressure of H2 bake process to prevent the etching of a separation oxide at an interface of an active region and a field region thereby ensuring that an epi-channel is...	04/09/2002
6316303	Method of fabricating a MOS transistor having SEG silicon A method of fabricating a MOS transistor having SEG Si. After the formation of a gate and a spacer and before a source/drain region is formed, a selective epitaxial growth (SEG) Si is deposited over the substrate. The spacer is then removed to form an ult...	11/13/2001
6303441	Semiconductor device and method for fabricating the same A semiconductor device and a method for fabricating the same is disclosed, which minimizes device degradation, minimizes noises, and simplifies the fabrication process. The device includes a substrate having a first semiconductor layer, a buried insulatin...	10/16/2001
6287924	Integrated circuit and method Sidewall spacers extending above a silicon gate with the distance between the spacers exceeding the length of the gate are used to confine selective silicon growth of the gate and subsequent self-aligned silicidation....	09/11/2001
6248620	Method for fabricating a field effect-controlled semiconductor component A method for fabricating field effect-controlled semiconductor components, such as e.g. but not exclusively MIS power transistors. The field effect-controllable semiconductor component has a semiconductor substrate of a first conductivity type and a gate ...	06/19/2001
6225230	Method of manufacturing semiconductor device Disclosed is a method of forming an element isolation insulating film by STI (shallow trench isolation) method, which permits effectively preventing a concave portion from being formed in an edge of the element isolation insulating film, permits decreasin...	05/01/2001

«First «Previous1 2 3 Next»Last»

PatentStorm

Bizarre Patents

PatentStorm News

Class 438/226 - With epitaxial semiconductor layer formation