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| Number | Title | Issue Date |
| 8093118 | Semiconductor structure and method of forming the same A semiconductor structure and a method of forming the same are provided. The semiconductor structure includes a substrate, a resistor and a metal gate structure. The substrate has a first area and a second area. The resistor is disposed in the first area, wherein th... | 01/10/2012 |
| 7378682 | Memory element using active layer of blended materials The present memory device has first and second electrodes, a passive layer between the first and second electrodes and on and in contact with the first electrode, and an active layer between the first and second electrodes and on and in contact with the passive laye... | 05/27/2008 |
| 7314786 | Metal resistor, resistor material and method A metal resistor and resistor material and method of forming the metal resistor are disclosed. The metal resistor may include an infused metal selected from the group consisting of: copper (Cu) infused with at least one of silicon (Si), nitrogen (N2), car... | 01/01/2008 |
| 7291525 | System and method for manufacturing thin film resistors using a trench and chemical mechanical polishing A system and method is disclosed for manufacturing thin film resistors using a trench and chemical mechanical polishing. A trench is etched in a layer of dielectric material and a thin film resistor layer is deposited so that the thin film resistor layer lines the t... | 11/06/2007 |
| 7276420 | Method of manufacturing a passive integrated matching network for power amplifiers An impedance matching network is integrated on a first die and coupled to a second die, with the first and second dies mounted on a conductive back plate. The impedance matching network comprises a first inductor bridging between the first and second dies, a second ... | 10/02/2007 |
| 7226845 | Semiconductor constructions, and methods of forming capacitor devices The invention includes semiconductor constructions, and also includes methods of forming pluralities of capacitor devices. An exemplary method of the invention includes forming conductive storage node material within openings in an insulative material to form conduc... | 06/05/2007 |
| 7217613 | Low cost fabrication of high resistivity resistors In one disclosed embodiment a layer is formed over a transistor gate and a field oxide region. For example, a polycrystalline silicon layer can be deposited over a PFET gate oxide and a silicon dioxide isolation region on the same chip. The layer is then doped over ... | 05/15/2007 |
| 7199016 | Integrated circuit resistor An integrated circuit resistor is provided that comprises a mesa 14 between electrical contacts 16 and 18. The electrical resistance between electrical contacts 16 and 18 is selectively increased through the formation of recesses | 04/03/2007 |
| 7183612 | Semiconductor device having an electrostatic discharge protecting element In an ESD protecting element, a plurality of source regions and a plurality of ballast resistor regions are formed. A drain region is formed at a region which is in contact with a channel region in the ballast resistor region, and an n+ type diffusion reg... | 02/27/2007 |
| 7102156 | Memory elements using organic active layer A memory element includes a first electrode, a passive layer on and in contact with the first electrode, a polyfluorene active layer on and in contact with the active layer, and a second electrode on and in contact with the polyfluorene active layer. The chemical st... | 09/05/2006 |
| 7037772 | Method of manufacturing an integrated circuit including capacitor with high permittivity capacitor dielectric A decoupling capacitor is formed on a semiconductor substrate that includes a silicon surface layer. A substantially flat bottom electrode is formed in a portion of the semiconductor surface layer. A capacitor dielectric overlies the bottom electrode. The capacitor ... | 05/02/2006 |
| 7029962 | Methods for forming a high performance capacitor Embodiments of methods of forming capacitors are generally described herein. Other embodiments may be described and claimed. ... | 04/18/2006 |
| 6960797 | Semiconductor device The object of the present invention is to provide a semiconductor device, which is suitable for use to connect electric condenser microphones. A semiconductor device, comprises: a conductivity-type substrate; an epitaxial layer formed on top of the substrate; island... | 11/01/2005 |
| 6953713 | Electric device, matrix device, electro-optical display device and semiconductor memory having thin-film transistors A circuit adapted to dynamically activate an electro-optical display device is constructed from a thin-film gate-insulated semiconductor device. This device comprises PMOS TFTs producing only a small amount of leakage current. Besides the dynamic circuit, a CMOS cir... | 10/11/2005 |
| 6949399 | Method of reducing contamination-induced process variations during ion implantation When changing a dopant species in an implantation tool, typically a clean process is performed to reduce cross-contamination, which is considered a major issue in implant cycles applied in advanced CMOS processes. Especially, the employment of an implanter previousl... | 09/27/2005 |
| 6943414 | Method for fabricating a metal resistor in an IC chip and related structure According to one exemplary embodiment, an integrated circuit chip comprises a first interconnect metal layer. The integrated circuit chip further comprises a first intermediate dielectric layer situated over the first interconnect metal layer. The integrated circuit... | 09/13/2005 |
| 6939753 | Liquid crystal display device and fabricating method thereof A liquid crystal display device includes an upper plate, a lower plate, and a liquid crystal. A sealant is formed along edges of the upper and lower plates to join the upper plate with the lower plate, and a protrusion separates the sealant from a picture displaying... | 09/06/2005 |
| 6933186 | Method for BEOL resistor tolerance improvement using anodic oxidation A method of improving the tolerance of a back-end-of-the-line (BEOL) thin film resistor is provided. Specifically, the method of the present invention includes an anodization step which is capable of converting a portion of base resistor film into an anodized region... | 08/23/2005 |
| 6919240 | Flat aluminum electrolytic capacitor and method of manufacturing the same The present invention relates to a method of manufacturing a flat aluminum electrolytic capacitor comprising a separator impregnated with an electrolytic solution, an anode foil and a cathode foil, a flat capacitor element that has external lead-out terminals connec... | 07/19/2005 |
| 6919212 | Method for fabricating ferroelectric random access memory device with merged-top electrode-plateline capacitor The present invention relates to a method for fabricating a ferroelectric random access memory (FeRAM) device. The method includes the steps of: forming a first inter-layer insulation layer on a substrate; forming a storage node contact connected with a partial port... | 07/19/2005 |
| 6916719 | Method and apparatus for non-conductively interconnecting integrated circuits Methods and apparatus are described for capacitively signaling between different semiconductor chips and modules without the use of connectors, solder bumps, wire-bond interconnections or the like. Preferably, pairs of half-capacitor plates, one half located on each... | 07/12/2005 |
| 6858481 | Memory device with active and passive layers A memory including memory cells having active and passive layers may store multiple information bits. The active layer may include an organic polymer that has a variable resistance based on the movement of charged species (ions or ions and electrons) between the pas... | 02/22/2005 |
| 6828180 | Process for direct integration of a thin-film silicon p-n junction diode with a magnetic tunnel junction A process for direct integration of a thin-film silicon p-n junction diode with a magnetic tunnel junction for use in advanced magnetic random access memory (MRAM) cells for high performance, non-volatile memory arrays. The process is based on pulsed laser processin... | 12/07/2004 |
| 6825090 | Fluid dielectric variable capacitor This invention relates to an apparatus and method of using a high frequency, high power, fluid dielectric variable capacitor for an impedance matching network. The apparatus consists of a bow-tie rotary vane, a set of two fixed vanes, and a set of rotating vanes ada... | 11/30/2004 |
| 6815306 | Floating anode DC electrolytic capacitor The present invention is directed to an electrolytic capacitor having a novel floating anode between the cathode and the powered anode of the capacitor, resulting in a single capacitor having a working voltage double that of the formation voltage of the powered anod... | 11/09/2004 |
| 6784044 | High dopant concentration diffused resistor and method of manufacture therefor The present invention provides a high dopant concentration diffused resistor, a method of manufacture therefor, and an integrated circuit including the same. In one embodiment of the invention, the high dopant concentration diffused resistor includes a doped tub loc... | 08/31/2004 |
| 6734086 | Semiconductor integrated circuit device and method of manufacturing the same A WN film serving as an adhesive layer is deposited over the sidewalls and bottom surface of a hole in a silicon oxide film where an information storage capacitor is to be formed. A Ru film to serve as a lower electrode for the information storage capacitor is forme... | 05/11/2004 |
| 6690082 | High dopant concentration diffused resistor and method of manufacture therefor The present invention provides a high dopant concentration diffused resistor, a method of manufacture therefor, and an integrated circuit including the same. In one embodiment of the invention, the high dopant concentration diffused resistor includes a do... | 02/10/2004 |
| 6555857 | Semiconductor device The object of the present invention is to provide a semiconductor device, which is suitable for use to connect electric condenser microphones. A semiconductor device, comprises: a conductivity-type substrate; an epitaxial layer formed on top of the substr... | 04/29/2003 |
| 6531737 | Semiconductor device having an improved interlayer contact and manufacturing method thereof A silicon semiconductor substrate has a plurality of active regions having an impurity region and an isolating region which electrically isolates these active regions from each other. The isolating region is formed of a silicon nitride film. A contact hol... | 03/11/2003 |
| 6472257 | High quality factor, integrated inductor and production method thereof The integrated inductor comprises a coil of metal which is formed in the second metal level. The coil is supported by a bracket extending above spaced from a semiconductor material body by an air gap obtained by removing a sacrificial region formed in the... | 10/29/2002 |
| 6432764 | Methods of forming resistors Disclosed are methods of forming resistors and diodes from semiconductive material, and static random access memory (SRAM) cells incorporating resistors, and to integrated circuitry incorporating resistors and diodes. A node to which electrical connection... | 08/13/2002 |
| 6251717 | Viable memory cell formed using rapid thermal annealing A method for forming viable floating gate memory cells in a semiconductor substrate. At various points within the memory cell manufacturing process rapid thermal annealing is used to repair any damage that may be caused to the crystals in the substrate by... | 06/26/2001 |
| 6242336 | Semiconductor device having multilevel interconnection structure and method for fabricating the same A method for fabricating a semiconductor device having a multilevel interconnection structure according to the present invention includes the steps of: covering a surface of a substrate with an insulating film; depositing a conductive film on the insulati... | 06/05/2001 |
| 6174808 | Intermetal dielectric using HDP-CVD oxide and SACVD O3-TEOS Method for forming an inter-level dielectric layer upon a substrate employed within a microelectronics fabrication. There is first provided a substrate. There is then formed upon the substrate a patterned microelectronics layer. There is then formed upon ... | 01/16/2001 |
| 6130126 | Self-planarizing DRAM chip avoids edge flaking The dummy oxide used to form DRAM capacitor cells is left in place over the peripheral transistors, reducing the height difference between the DRAM array and the peripheral circuitry and protecting against edge effects.... | 10/10/2000 |
| 6091144 | Semiconductor package A semiconductor package in which a semiconductor chip 16 is formed above a die pad 12 interposing a capacitor 22 therebetween, or the semiconductor chip 16 and the capacitor 22 in a vortex-shaped form are respectively formed on both faces of the die pad 1... | 07/18/2000 |
| 6066529 | Method for enlarging surface area of a plurality of hemi-spherical grains on the surface of a semiconductor chip The present invention provides a method for enlarging the surface area of hemi-spherical grains on the surface of a semiconductor chip. The hemi-spherical grain structure is formed by combining a poly-silicon layer with an underlying amorphous silicon lay... | 05/23/2000 |
| 6034435 | Metal contact structure in semiconductor device A structure of metal contact portion of a semiconductor device, includes a semiconductor substrate having an impurity doped junction therein, an insulating layer pattern formed on the semiconductor substrate having a contact hole through the insulating la... | 03/07/2000 |
| 6001663 | Apparatus for detecting defect sizes in polysilicon and source-drain semiconductor devices and method for making the same An apparatus and method for detecting defect sizes in polysilicon and source-drain semiconductor devices and methods for making the same. Implemented is a double bridge test structure that includes a resistor path of first semiconductor material, such as ... | 12/14/1999 |
