Class 438/189 - And bipolar transistor

Subclass of Class 438 - Semiconductor device manufacturing: process
Definition: Process for making a junction gate field effect transistor
No. of patents: 58
Last issue date: 08/10/2010

«First «Previous1 2 Next»Last»

Number	Title	Issue Date
7772057	Method of fabricating an integrated circuit with gate self-protection, and an integrated circuit with gate self-protection An integrated circuit with gate self-protection comprises a MOS device and a bipolar device, wherein the integrated circuit further comprises a semiconductor layer with electrically active regions in which and on which the MOS device and the bipolar device are forme...	08/10/2010
7700423	Process for manufacturing epitaxial wafers for integrated devices on a common compound semiconductor III-V wafer A method of fabricating an epitaxial compound semiconductor III-V wafer suitable for the subsequent fabrication of at least two different types of integrated active devices (such as an HBT and a FET) on such wafer by providing a substrate; growing a first epitaxial ...	04/20/2010
7442595	Bipolar transistor with collector having an epitaxial Si:C region A structure and method where C is incorporated into the collector region of a heterojunction bipolar device by a method which does not include C ion implantation are provided. In the present invention, C is incorporated into the collector by epitaxy in a perimeter t...	10/28/2008
7427542	Semiconductor device and method of manufacturing the same A method of manufacturing a semiconductor device including a complementary metal oxide semiconductor (CMOS) and a bipolar junction transistor (BJT), the method comprising the steps of: forming a gate oxide layer on a substrate having a p-type and an n-type well; rem...	09/23/2008
7327012	Bipolar Transistor Devices A method of forming bipolar transistors by using the same mask to form the collector region in a substrate of an opposite conductivity type as to form the base in the collector region. More specifically, impurities of a first conductivity type are introduced into a ...	02/05/2008
7303968	Semiconductor device and method having multiple subcollectors formed on a common wafer A semiconductor device and a method of fabricating a semiconductor device having multiple subcollectors which are formed in a common wafer, in order to provide multiple structures having different characteristic and frequency response are provided. The subcollectors...	12/04/2007
7268394	JFET structure for integrated circuit and fabrication method Junction field effect transistors (JFETs) can be fabricated with an epitaxial layer that forms a sufficiently thick channel region to enable the JFET for use in high voltage applications (e.g., having a breakdown voltage greater than about 20V). Additionally or alte...	09/11/2007
7263476	High speed information processing and mass storage system and method, particularly for information and application servers A high speed, microcomputer based, Fibre Channel compatible and fault tolerant information processing and mass storage system especially suited for information servers and application servers. A unique and extremely versatile system architecture, including a dual lo...	08/28/2007
7166862	Semiconductor integrated circuit In a monolithic active matrix circuit that uses offset-gate TFTs in which the gate electrode is offset from the source and drain regions or TFTs whose gate insulating film is formed by vapor deposition, not only an active matrix circuit but also a drive circuit ther...	01/23/2007
7157320	Semiconductor device and process of production of same A semiconductor device comprising: a first insulating film formed on a semiconductor substrate; a semiconductor layer at least a part of which is formed on the first insulating film; a second insulating film comprising a non-doped silicon oxide film and formed on th...	01/02/2007
7138344	Method for minimizing slip line faults on a semiconductor wafer surface A method for minimizing slip line faults on a surface of a semiconductor wafer that has been obtained using a transfer technique. The method includes heating the semiconductor wafer from an ambient temperature to a first higher temperature and pausing the heating at...	11/21/2006
7049240	Formation method of SiGe HBT A method for forming a SiGe HBT, which combines a SEG and Non-SEG growth, is disclosed. The SiGe base layer is deposited by a Non-SEG method. Then, the first-emitter layer is developed directly upon the SiGe base layer that has a good interface quality between the b...	05/23/2006
7009647	CMOS imager having a JFET adapted to detect photons and produce an amplified electrical signal A photodetector is formed in a CMOS circuit using a junction field-effect transistor (JFET). The JFET/CMOS photodetector can be used to create an active pixel sensor for a CMOS digital imager, performing both photodetection and electrical signal amplification, allow...	03/07/2006
7001820	Heterojunction bipolar transistor and method for fabricating the same The following layers are successively formed on a heavily-doped n-type first subcollector layer: a heavily-doped n-type second subcollector layer made of a material having a small band gap; an i-type or a lightly-doped n-type collector layer; a heavily-doped p-type ...	02/21/2006
6995052	Method and structure for double dose gate in a JFET A method for fabricating a junction field effect transistor (JFET) with a double dose gate structure. A trench is etched in the surface of a semiconductor substrate, followed by a low dose implant to form a first gate region. An anneal may or may not be performed af...	02/07/2006
6960797	Semiconductor device The object of the present invention is to provide a semiconductor device, which is suitable for use to connect electric condenser microphones. A semiconductor device, comprises: a conductivity-type substrate; an epitaxial layer formed on top of the substrate; island...	11/01/2005
6911715	Bipolar transistors and methods of manufacturing the same A bipolar transistor in which the occurrence of Kirk effect is suppressed when a high current is injected into the bipolar transistor and a method of fabricating the bipolar transistor are described. The bipolar transistor includes a first collector region of a firs...	06/28/2005
6881976	Heterojunction BiCMOS semiconductor A BiCMOS semiconductor, and manufacturing method therefore, is provided. A semiconductor substrate having a collector region is provided. A pseudo-gate is formed over the collector region. An emitter window is formed in the pseudo-gate to form an extrinsic base stru...	04/19/2005
6861303	JFET structure for integrated circuit and fabrication method Junction field effect transistors (JFETs) can be fabricated with an epitaxial layer that forms a sufficiently thick channel region to enable the JFET for use in high voltage applications (e.g., having a breakdown voltage greater than about 20V). Additionally or alte...	03/01/2005
6773973	Semiconductor transistor having a polysilicon emitter and methods of making the same A polysilicon-emitter-type transistor has a substrate with a collector region, a base region on the collector region, and an oxide layer on the base region with an emitter window therein exposing part of the base region. The polysilicon emitter is formed by forming ...	08/10/2004
6555857	Semiconductor device The object of the present invention is to provide a semiconductor device, which is suitable for use to connect electric condenser microphones. A semiconductor device, comprises: a conductivity-type substrate; an epitaxial layer formed on top of the substr...	04/29/2003
6537887	Integrated circuit fabrication An integrated circuit and a process for making the same are provided. The circuit has a nitrogen implanted emitter window, wherein the nitrogen has been implanted into the emitter window after the emitter window etch, but prior to the emitter conductor de...	03/25/2003
6358786	Method for manufacturing lateral bipolar mode field effect transistor A lateral bipolar field effect transistor having a drift region of a first conductivity formed on a silicon-on insulation substrate with a buried insulation layer, a gate region of a second conductivity formed over and from the buried insulation layer sep...	03/19/2002
6344378	Field effect transistors, field emission apparatuses, thin film transistors, and methods of forming field effect transistors The present invention includes field effect transistors, field emission apparatuses, thin film transistors, and methods of forming field effect transistors. According to one embodiment, a field effect transistor includes a semiconductive layer configured ...	02/05/2002
6312967	Semiconductor device and manufacture method thereof, as well as light emitting semiconductor device A semiconductor device such as a light emitting semiconductor device comprising a mask layer having opening areas and a selective growing layer comprising a semiconductor grown selectively by way of the mask layer, with each of the mask layer and the sele...	11/06/2001
6242336	Semiconductor device having multilevel interconnection structure and method for fabricating the same A method for fabricating a semiconductor device having a multilevel interconnection structure according to the present invention includes the steps of: covering a surface of a substrate with an insulating film; depositing a conductive film on the insulati...	06/05/2001
6213869	MOSFET-type device with higher driver current and lower steady state power dissipation A coupling capacitor is coupled between the gate and the body region of a MOSFET (Metal Oxide Semiconductor Field Effect Transistor). The body region of the MOSFET is electrically isolated to form a floating body region. The capacitance of the coupling ca...	04/10/2001
6153453	JFET transistor manufacturing method The present invention relates to a method of manufacturing a JFET transistor in an integrated circuit containing complementary MOS transistors, this JFET transistor being formed in an N-type well of a P-type substrate, including the steps of forming a P-t...	11/28/2000
6063655	Junction high electron mobility transistor-heterojunction bipolar transistor (JHEMT-HBT) monolithic microwave integrated circuit (MMIC) and single growth method of fabrication A highly uniform, planar and high speed JHEMT-HBT MMIC is fabricated using a single growth process. A multi-layer structure including a composite emitter-channel layer, a base-gate layer and a collector layer is grown on a substrate. The composite emitter...	05/16/2000
6060347	Method for preventing damage to gate oxide from well in complementary metal-oxide semiconductor A method for preventing damage to a gate oxide layer from a floating well in a CMOS device includes a first via plug and a second via plug formed in a dielectric layer. The first via plug is coupled to a substrate and the second via plug is coupled to the...	05/09/2000
6050827	Method of manufacturing a thin-film transistor with reinforced drain and source electrodes A thin film transistor where source and drain electrodes are film laminates including at least two layers. A first layer film of the laminate, which is formed to a thickness of 10 to 700 Å is in ohmic contact with underlying semiconductor film. A second ...	04/18/2000
5652153	Method of making JFET structures for semiconductor devices with complementary bipolar transistors A semiconductor device may include complementary NPN and PNP transistors and a JFET that is formed in the same steps as used to form the transistors. The bottom gate of the JFET and the back collector layer of the PNP transistor are doped and up-diffused ...	07/29/1997
5618688	Method of forming a monolithic semiconductor integrated circuit having an N-channel JFET An N-channel JFET (60) and a method of forming the N-channel JFET (60) in a BiCMOS process. The N-channel JFET (60) is monolithically fabricated with an N-channel IGFET (70), a P-channel IGFET (75), and an NPN BJT (80) in an epitaxial layer (21). The N-ch...	04/08/1997
5391504	Method for producing integrated quasi-complementary bipolar transistors and field effect transistors Generally, and in one form of the invention, an integrated circuit comprising a bipolar transistor and a field effect transistor, wherein a channel of the field effect transistor and a base of the bipolar transistor are formed from a base epitaxial layer ...	02/21/1995
5296409	Method of making n-channel and p-channel junction field-effect transistors and CMOS transistors using a CMOS or bipolar/CMOS process A method of making N-channel and P-channel junction field-effect transistors using a modified CMOS process that simultaneously makes complementary metal-oxide-semiconductor transistors, or a modified BiCMOS process that simultaneously makes bipolar transi...	03/22/1994
5254864	Semiconductor device A semiconductor device wherein a bipolar transistor and a junction type field effect transistor which has a high voltage resisting property and a high mutual conductance are formed into a single chip to reduce the cost. A bipolar transistor formation regi...	10/19/1993
5246871	Method of manufacturing a semiconductor device comprising a control circuit and a power stage with a vertical current flow, integrated in monolithic form on a single chip The problems normally linked to the creation of a power stage using BJT transistors are overcome realizing the power stage with BMFET transistors....	09/21/1993
5223449	Method of making an integrated circuit composed of group III-V compound field effect and bipolar semiconductors Integrated circuits and fabrication methods incorporating both NPN (192, 194, 210) and PNP (196, 121, 124) heterojunction bipolar transistors together with N channel (198, 200, 216, 218) and P channel (202, 204, 220, 222) JFETs on a single substrate as il...	06/29/1993
4939099	Process for fabricating isolated vertical bipolar and JFET transistors A unified process flow for the fabrication of an isolated vertical PNP (VPNP) transistor, a junction field effect transistor (JFET) and a metal/nitride/polysilicon capacitor includes the simultaneous fabrication of deep junction isolation regions (36, 121...	07/03/1990
4808547	Method of fabrication of high voltage IC bopolar transistors operable to BV_CBO A high voltage bipolar and JFET have their gate and base connected and source and collector connected and the appropriate geometry for the bipolar to operate to its BVCBO limit. The collector and channel regions have the same depth and impurity...	02/28/1989

«First «Previous1 2 Next»Last»

PatentStorm

Celebrity Inventors

PatentStorm News

Class 438/189 - And bipolar transistor