Class 438/187 - Specified crystallographic orientation

Subclass of Class 438 - Semiconductor device manufacturing: process
Definition: Process wherein a given feature of the junction gate field
No. of patents: 26
Last issue date: 10/05/2010

Number	Title	Issue Date
7807523	Sequential selective epitaxial growth By forming MOSFETs on a substrate having pre-existing ridges of semiconductor material (i.e., a “corrugated substrate”), the resolution limitations associated with conventional semiconductor manufacturing processes can be overcome, and high-performance, low-powe...	10/05/2010
7763505	Method for reducing crystal defects in transistors with re-grown shallow junctions by appropriately selecting crystalline orientations By appropriately adapting the length direction and width directions of transistor devices with respect to the crystallographic orientation of the semiconductor material such that identical vertical and horizontal growth planes upon re-crystallizing amorphized portio...	07/27/2010
7442589	System and method for uniform multi-plane silicon oxide layer formation for optical applications Methods and systems for growing uniform oxide layers include an example method including growing a first layer of oxide on first and second facets of the substrate, with the first facet having a faster oxide growth rate. The oxide is removed from the first facet and...	10/28/2008
7291520	Piezoelectric element and liquid jet head using the piezoelectric element Provided are a piezoelectric element and a liquid-jet head using the same, in which favorable crystallinity can be obtained with improved uniformity, breakage of a piezoelectric film can be prevented, thereby providing stable displacement properties. The piezoeletri...	11/06/2007
7256109	Isotropic polycrystalline silicon A high-quality isotropic polycrystalline silicon (poly-Si) and a method for fabricating high quality isotropic poly-Si film are provided. The method includes forming a film of amorphous silicon (a-Si) and using a MISPC process to form poly-Si film in a first area of...	08/14/2007
7244970	Low capacitance two-terminal barrier controlled TVS diodes A two-terminal barrier controlled TVS diode has a depletion region barrier blocking majority carrier flow through the channel region at the vicinity of the cathode region at bias levels below the predetermined clamping voltage applied between the anode electrode and...	07/17/2007
7235827	Vertical power JFET with low on-resistance for high voltage applications A junction field effect transistor (JFET) has a gate region, drain region, and a source region. An epitaxial region having a first conductivity type is disposed over the drain region. The first conductivity type is N-type semiconductor material. The gate region is d...	06/26/2007
7235435	Method for fabricating thin film transistor with multiple gates using metal induced lateral crystallization A thin film transistor with multiple gates using an MILC process which is capable of materializing multiple gates without increasing dimensions and a method thereof. The thin film transistor has a semiconductor layer which is formed on a insulating substrate in a zi...	06/26/2007
7151019	Method of manufacturing a semiconductor device with different lattice properties To reduce a current loss through a channel and improve electron mobility, a first semiconductor layer and a second semiconductor layer (sequentially formed on a semiconductor substrate) have different lattice properties. The first semiconductor layer and the second ...	12/19/2006
7038295	DC/DC converter with depletion mode compound semiconductor field effect transistor switching device In one embodiment, a dc/dc converter network (71) is described. The converter network (71) includes at least one GaAs depletion mode or normally on FET device (711, 712). The converter network (71) is a two-port system having a positive i...	05/02/2006
6998639	Method for manufacturing a semiconductor device A process for fabricating a highly stable and reliable semiconductor, comprising: coating the surface of an amorphous silicon film with a solution containing a catalyst element capable of accelerating the crystallization of the amorphous silicon film, and heat treat...	02/14/2006
6855606	Semiconductor nano-rod devices In a method of manufacturing a semiconductor device, a semiconductor layer is patterned to form a source region, a channel region, and a drain region in the semiconductor layer. The channel region extends between the source region and the drain region. Corners of th...	02/15/2005
6808951	Semiconductor integrated circuit device and manufacturing method thereof An insulating film for protecting an upper portion of a control gate electrode is constituted by a silicon oxide film, and thereby stress affecting a gate oxide film and a substrate that is located below a bottom portion thereof is reduced. Further, an etching preve...	10/26/2004
6767804	2N mask design and method of sequential lateral solidification A pan/tilt camera system includes a sensor spaced from a rotational shaft of a pan/tilt camera, a detected piece rotated with the rotational shaft so as to correspond to the sensor, an origin setting unit rotating the rotational shaft in a first direction upon turn-...	07/27/2004
6740535	Enhanced T-gate structure for modulation doped field effect transistors A structure and a method are disclosed of an enhanced T-gate for modulation doped field effect transistors (MODFETs). The enhanced T-gate has insulator spacer layers sandwiching the neck portion of the T-gate. The spacer layers are thinner than the T-bar portion ove...	05/25/2004
6649462	Semiconductor device and method of manufacturing the same including T-shaped gate A gate insulating film is provided on a channel region. A gate electrode includes a lower part and an upper part. The lower part has a lower surface and sides, and the upper part has a lower surface. The lower surface of the lower part contacts the gate i...	11/18/2003
6255202	Damascene T-gate using a spacer flow A method for fabricating a T-gate structure is provided. A structure is provided that has a silicon layer having a gate oxide layer, a polysilicon layer over the gate oxide layer and an insulating layer over the gate oxide layer. An opening is formed exte...	07/03/2001
6110764	Method of manufacturing an assembly with different types of high-voltage metal-oxide-semiconductor devices A method of manufacturing high-voltage MOS devices that uses trenches instead of field oxide layer as the isolating structure, and employs a vertical layout rather than a horizontal layout to lengthen the drift region for a given device area in a wafer. T...	08/29/2000
6077777	Method for forming wires of semiconductor device A method of forming wires of a semiconductor device is disclosed for improving the performance of the semiconductor device. The method includes the steps of successively forming a barrier layer, a wire layer and an antireflective coating layer on a semico...	06/20/2000
5946548	Method for manufacturing a MISFET device where the conductive film has a thickness A method of manufacturing a semiconductor integrated circuit device includes the steps of forming a first conductive film on a gate oxide film in a MISFET forming region for a memory cell on a main surface of a semiconductor substrate, and forming a secon...	08/31/1999
5702987	Method of manufacture of self-aligned JFET A JFET device is formed on a semiconductor body comprising an active region for the junction field effect device. A drain region layer is formed below the lower portion of the active region. The top surface of the body is doped to provide a source region ...	12/30/1997
5610085	Method of making a vertical FET using epitaxial overgrowth A vertical field effect transistor (1700) and fabrication method with buried gates (1704) having spaced apart gate fingers and connecting structure and overgrown with source and channel epilayer followed by a doping connection of the gate fingers and conn...	03/11/1997
4476622	Recessed gate static induction transistor fabrication A gate-source structure and fabrication method for a static induction transistor having improved gain and frequency characteristics and having relatively simple fabrication requirements. The method and the device are embodied by gate regions diffused into...	10/16/1984
4449284	Method of manufacturing an integrated circuit device having vertical field effect transistors A method of manufacturing an integrated circuit device including vertical static induction transistors (SIT) having a first recess between the gate region and the drain (or source) region to reduce the capacitance between both regions and a second recess ...	05/22/1984
4346513	Method of fabricating semiconductor integrated circuit device utilizing selective etching and epitaxial refill A method of fabricating a semiconductor integrated circuit device wherein a substrate having a particular crystallographic orientation is selectively etched so as to form surface depressions of different depths. An epitaxial layer is grown from a Si--H--C...	08/31/1982
3986903	MOSFET transistor and method of fabrication An n channel MOSFET transistor which includes doping of previously formed source and drain elements with a heavy diffusion of phosphorous or arsenic creating n+.sup.+ regions in the source and drain. The extra diffusion step is preferably accom...	10/19/1976

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Class 438/187 - Specified crystallographic orientation