Famous Patents
3M employee and church chorister Art Fry needed something to temporarily mark pages in his hymnal. He was in luck because his colleague, Spencer Silver, accidentally developed a glue that was too weak for other purposes. After initially discouraging consumer response, Post-it Notes became a hit in 1979.
PatentStorm News
Make the Most of Our Site
See this month's Top Inventors and Most Cited Patents.
Stay on top of the latest innovations by subscribing to an RSS feed.
Registered users: Manage your profile.
| Number | Title | Issue Date |
| 7700422 | Methods of forming memory arrays for increased bit density A memory array having a plurality of resistance variable memory units and method for forming the same are provided. Each memory unit includes a first electrode, a resistance variable material over the first electrode, and a first second-electrode over the resistance... | 04/20/2010 |
| 7427541 | Carbon nanotube energy well (CNEW) field effect transistor A structure to form an energy well within a Carbon nanotube is described. The structure includes a doped semiconductor region and an undoped semiconductor region. The Carbon nanotube is between the doped semiconductor region and the undoped semiconductor region. The... | 09/23/2008 |
| 7351625 | Recessed transistors and methods of forming the same According to some embodiments of the invention, there is provided recessed transistors without semiconductor substrate fences formed on the sidewalls of a device isolation layer and methods of forming the same. The recessed transistors and methods provide a way of r... | 04/01/2008 |
| 7208787 | Semiconductor device and a process for manufacturing a complex oxide film A semiconductor device is prepared using an insulating film consisting of a tantalum-tungsten oxide crystal film, a tantalum-molybdenum oxide crystal film, or a laminated film where a silicon oxide, silicon oxynitride or silicon nitride film is laminated on the crys... | 04/24/2007 |
| 7195999 | Metal-substituted transistor gates One aspect of this disclosure relates to a method for forming a transistor. According to various method embodiments, a gate dielectric is formed on a substrate, a substitutable structure is formed on the gate dielectric, and source/drain regions for the transistor a... | 03/27/2007 |
| 7173257 | Integrated assembly for delivery of air stream for optical analysis An integrated particle detection apparatus for optical detection of particles in an air stream. The particle detection apparatus includes a scalper for removing large panicles from the air stream, a concentrator for separating out small particles and increasing the ... | 02/06/2007 |
| 7135369 | Atomic layer deposited ZrAlO dielectric layers including ZrAlO An atomic layer deposited ZrAlxOy dielectric layer and a method of fabricating such a dielectric layer produce a reliable dielectric layer having an equivalent oxide thickness thinner than attainable using SiO2. Pulsing a zirconium-c... | 11/14/2006 |
| 7030428 | Strain balanced nitride heterojunction transistors A nitride based heterojunction transistor includes a substrate and a first Group III nitride layer, such as an AlGaN based layer, on the substrate. The first Group III-nitride based layer has an associated first strain. A second Group III-nitride based layer, such a... | 04/18/2006 |
| 6744104 | Semiconductor integrated circuit including insulated gate field effect transistor and method of manufacturing the same A gate electrode of an n-channel IGFET includes a first region composed of at least a first IV group element and a second IV group element which are different from each other, and a second region composed of the first IV group element. Similarly, a gate electrode of... | 06/01/2004 |
| 6548333 | Aluminum gallium nitride/gallium nitride high electron mobility transistors having a gate contact on a gallium nitride based cap segment High electron mobility transistors (HEMTs) and methods of fabricating HEMTs are provided Devices according to embodiments of the present invention include a gallium nitride (GaN) channel layer and an aluminum gallium nitride (AlGaN) barrier layer on the c... | 04/15/2003 |
| 6392271 | Structure and process flow for fabrication of dual gate floating body integrated MOS transistors A dual gate transistor device and method for fabricating the same. First, a doped substrate is prepared with a patterned oxide layer on the doped substrate defining a channel. Next, a silicon layer is deposited to form the channel, with a gate oxide layer... | 05/21/2002 |
| 6255149 | Process for restricting interdiffusion in a semiconductor device with composite Si/SiGe gate A method which includes, prior to depositing the encapsulating silicon layer: A) depositing on the Si1-x Gex layer a thin film of amorphous or polycrystalline silicon, then in treating said silicon film with gas nitric oxide at a tem... | 07/03/2001 |
| 5002897 | Method of making a complementary metal electrode semiconductor device A semiconductor device referred to as complementary metal electrode semiconductor (CMES) has p-type and n-type silicon MESFETs interconnected on a substrate with an n-type barrier enhancement implanted into the p-channel of the p-type MESFET. The structur... | 03/26/1991 |
| 4843024 | Method of producing a Schottky gate field effect transistor A method of producing a Schottky gate field effect transistor includes depositing a dummy gate film on a semiconductor substrate, depositing a second thin film on the semiconductor substrate and on the first thin film pattern to the same thickness as the ... | 06/27/1989 |
| 4745082 | Method of making a self-aligned MESFET using a substitutional gate with side walls A process for producing a semiconductor device includes depositing a layer of insulator material onto a supporting substrate of the type having a surface which includes a channel region below the surface thereof containing a carrier concentration of a des... | 05/17/1988 |
| 4553316 | Self-aligned gate method for making MESFET semiconductor A MESFET is fabricated using a self-aligned gate process. This process uses a vertical (anisotropic) etch to self-align the gate and source/drain. The vertical etch, in conjunction with a two-level insulator, creates a barrier between the gate and source/... | 11/19/1985 |
| 4546540 | Self-aligned manufacture of FET This specification discloses a self-aligned manufacturing method of a Schottky gate FET. This method comprises the steps: forming a gate metallic layer on a semiconductor substrate and a mask overhanged on the metallic layer; ion-implanting impurity ions ... | 10/15/1985 |
| 4481704 | Method of making an improved MESFET semiconductor device An improved MESFET integrated circuit device with a metal-semiconductor diode as the control element and a source and drain as other device elements is fabricated using a self-aligned gate process which consists of an implanted channel stopper underneath ... | 11/13/1984 |
| 4466174 | Method for fabricating MESFET device using a double LOCOS process MESFET devices are fabricated on a semiconductor substrate using a LOCOS (localized oxidation of silicon) process twice during the fabrication. The first LOCOS process provides device separation with a self-aligned thick-field oxide (SATO). The second LOC... | 08/21/1984 |
| 4455738 | Self-aligned gate method for making MESFET semiconductor A MESFET is fabricated using a self-aligned gate process. This process uses a vertical (anisotropic) etch to self-align the gate and source/drain. The vertical etch, in conjunction with a two-level insulator, creates a barrier between the gate and source/... | 06/26/1984 |
| 4358891 | Method of forming a metal semiconductor field effect transistor A metal silicon field effect transistor and the method of producing such a transistor whereby all of the elements of the transistor are defined by a single masking step. These elements include the channel of the first effect transistor as well as the sour... | 11/16/1982 |
| 4304042 | Self-aligned MESFETs having reduced series resistance Disclosed herein is a structure and process for a self-aligned metal semiconductor field effect transistor having the characteristics of a high speed, high density, low power LSI circuit and specifically an improved high device gain MESFET device using co... | 12/08/1981 |
| 4277882 | Method of producing a metal-semiconductor field-effect transistor A metal-semiconductor field-effect transistor is formed by providing a blanket layer of the same conductivity type as the semiconductor body, with field oxide subsequently being grown, and with a region of opposite conductivity type being formed to extend... | 07/14/1981 |
| 4253229 | Self-aligned narrow gate MESFET process A method of making a narrow gate MESFET including the steps of placing a layered mask of nitride and polysilicon over a channel region for self-aligning in a substrate, oxidizing and then removing the polysilicon to reduce the remaining polysilicon width,... | 03/03/1981 |
