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Pizza Pie With Concentric Rings of Crust
A pizza mold for forming a plurality of concentric raised ridges of dough (i.e., crust) on the surface of a pizza pie.
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| Number | Title | Issue Date |
| 8420468 | Strain-compensated field effect transistor and associated method of forming the transistor Disclosed are embodiments of a field effect transistor (FET) having decreased drive current temperature sensitivity. Specifically, any temperature-dependent carrier mobility change in the FET channel region is simultaneously counteracted by an opposite strain-depend... | 04/16/2013 |
| 8383471 | Self aligned sidewall gate GaN HEMT A method of fabricating a GaN HEMT includes growing a first epitaxial layer on a substrate, growing a second epitaxial layer on the first epitaxial layer, growing a third epitaxial layer on the second epitaxial layer, depositing a first dielectric film on the third ... | 02/26/2013 |
| 8377767 | Insulated gate field effect transistor having passivated schottky barriers to the channel A transistor includes a semiconductor channel disposed nearby a gate and in an electrical path between a source and a drain, wherein the channel and at least one of the source or the drain are separated by an interface layer so as to form a channel-interface layer-s... | 02/19/2013 |
| 8183103 | Integrated circuit structure including schottky diode and method for manufacturing the same A method for manufacturing an integrated circuit structure is disclosed. First, a dielectric layer is formed on a substrate, the substrate has a transistor region and a diode region. Next, a contact hole and an opening are formed in the dielectric layer, a size of t... | 05/22/2012 |
| 8168485 | Semiconductor device making method A method of making a semiconductor device includes forming a p-type semiconductor region to an n-type semiconductor substrate in such a manner that the p-type semiconductor region is partially exposed to a top surface of the semiconductor substrate, forming a Schott... | 05/01/2012 |
| 8168486 | Methods for manufacturing enhancement-mode HEMTs with self-aligned field plate Various embodiments of the disclosure include the formation of enhancement-mode (e-mode) gate injection high electron mobility transistors (HEMT). Embodiments can include GaN, AlGaN, and InAlN based HEMTs. Embodiments also can include self-aligned P-type gate and fi... | 05/01/2012 |
| 8138033 | Semiconductor component and method of manufacture A semiconductor component that includes a Schottky device, an edge termination structure, a non-Schottky semiconductor device, combinations thereof and a method of manufacturing the semiconductor component. A semiconductor material includes a first epitaxial layer d... | 03/20/2012 |
| 8133775 | Semiconductor device with mushroom electrode and manufacture method thereof A semiconductor device has: a semiconductor substrate having a pair of current input/output regions via which current flows; an insulating film formed on the semiconductor substrate and having a gate electrode opening; and a mushroom gate electrode structure formed ... | 03/13/2012 |
| 8039328 | Trench Schottky device with single barrier A process for forming a trench Schottky barrier device includes the forming of an oxide layer within the trenches in the surface of a silicon wafer, and then depositing a full continuous metal barrier layer over the full upper surface of the wafer including the tren... | 10/18/2011 |
| 8008142 | Self-aligned Schottky diode A Schottky barrier diode comprises a doped guard ring having a doping of a second conductivity type in a semiconductor-on-insulator (SOI) substrate. The Schottky barrier diode further comprises a first-conductivity-type-doped semiconductor region having a doping of ... | 08/30/2011 |
| 7989277 | Integrated structure with transistors and Schottky diodes and process for fabricating the same A process for fabricating an integrated group III nitride structure comprising high electron mobility transistors (HEMTs) and Schottky diodes, and the resulting structure, are disclosed. Integration of vertical junction Schottky diodes is enabled, and the parasitic ... | 08/02/2011 |
| 7985637 | Manufacturing method for compound semiconductor device and etching solution After an n-type AlGaN barrier layer (3) is formed over a substrate (1), an n-type GaN contact layer (4) is formed over the n-type AlGaN barrier layer (3). Next, the n-type GaN contact layer (4) is wet-etched with using an etching s... | 07/26/2011 |
| 7972913 | Method for forming a Schottky diode Improved Schottky diodes with reduced leakage current and improved breakdown voltage are provided by building a JFET with its current path of a first conductivity type serially located between a first terminal comprising a Schottky contact and a second terminal. The... | 07/05/2011 |
| 7968390 | Electronic devices with improved ohmic contact In one embodiment, the disclosure relates to an electronic device successively comprising from its base to its surface: (a) a support layer, (b) a channel layer adapted to contain an electron gas, (c) a barrier layer and (d) at least one ohmic contact electrode form... | 06/28/2011 |
| 7902011 | Method of fabricating Schottky barrier transistor Provided is a method of fabricating a Schottky barrier transistor. The method includes (a) forming a pair of cavities for forming a source forming portion and a drain forming portion having a predetermined depth and parallel to each other and a channel forming porti... | 03/08/2011 |
| 7863121 | Method for fabricating Schottky barrier tunnel transistor A Schottky barrier tunnel transistor includes a gate electrode, and source and drain regions. The gate electrode is formed over a channel region of a substrate to form a Schottky junction with the substrate. The source and drain regions are formed in the substrate e... | 01/04/2011 |
| 7863120 | Liquid crystal display device with double metal layer source and drain electrodes and fabricating method thereof A method of fabricating a liquid crystal display device includes, according to an embodiment of the present invention, forming a gate electrode on a substrate, forming a gate insulating layer over the gate electrode and on the substrate, forming a first metal layer ... | 01/04/2011 |
| 7858456 | Merged P-i-N Schottky structure Merged P-i-N Schottky device in which the oppositely doped diffusions extend to a depth and have been spaced apart such that the device is capable of absorbing a reverse avalanche energy comparable to a Fast Recovery Epitaxial Diode having a comparatively deeper opp... | 12/28/2010 |
| 7754550 | Process for forming thick oxides on Si or SiC for semiconductor devices The gate oxide in the trenches of a trench type Schottky device are formed by oxidizing a layer of polysilicon deposited in trenches of a silicon or silicon carbide substrate. A small amount of the substrate is also oxidized to create a good interface between the su... | 07/13/2010 |
| 7745272 | Method for surfaced-passivated zinc-oxide A semiconductor device has a heterostructure including a first layer of semiconductor oxide material. A second layer of semiconductor oxide material is formed on the first layer of semiconductor oxide material such that a two dimensional electron gas builds up at an... | 06/29/2010 |
| 7674665 | Method of fabricating Schottky barrier transistor Provided is a method of fabricating a Schottky barrier transistor. The method includes (a) forming a pair of cavities for forming a source forming portion and a drain forming portion having a predetermined depth and parallel to each other and a channel forming porti... | 03/09/2010 |
| 7655514 | Method of fabricating a MESFET with a sloped MESA structure A silicon carbide metal semiconductor field-effect transistor includes a bi-layer silicon carbide buffer for improving electron confinement in the channel region and/or a layer disposed over at least the channel region of the transistor for suppressing surface effec... | 02/02/2010 |
| 7632726 | Method for fabricating a nitride FET including passivation layers A method for fabricating a nitride-based FET device that provides reduced electron trapping and gate current leakage. The fabrication method provides a device that includes a relatively thick passivation layer to reduce traps caused by device processing and a thin p... | 12/15/2009 |
| 7560322 | Method of making a semiconductor structure for high power semiconductor devices A substrate arrangement for high power semiconductor devices includes a SiC wafer having a Si layer deposited on a surface of the SiC wafer. An SOI structure having a first layer of Si, an intermediate layer of SiO2 and a third layer of Si, has its third ... | 07/14/2009 |
| 7537984 | III-V power field effect transistors A field effect transistor configured for use in high power applications and a method for its fabrication is disclosed. The field effect transistor is formed of III-V materials and is configured to have a breakdown voltage that is advantageous for high power applicat... | 05/26/2009 |
| 7510921 | Self-aligned silicon carbide semiconductor devices and methods of making the same A self-aligned silicon carbide power MESFET with improved current stability and a method of making the device are described. The device, which includes raised source and drain regions separated by a gate recess, has improved current stability as a result of reduced ... | 03/31/2009 |
| 7485512 | Method of manufacturing an adaptive AIGaN buffer layer A method of compensating resistivity of a near-surface region of a substrate includes epitaxially growing a buffer layer on the substrate, wherein the buffer is grown as having a dopant concentration as dependent on resistivity and conductivity of the substrate, so ... | 02/03/2009 |
| 7485513 | One-device non-volatile random access memory cell One aspect of the present subject matter relates to a one-device non-volatile memory cell. The memory cell includes a body region, a first diffusion region and a second diffusion region formed in the body region. A channel region is formed in the body region between... | 02/03/2009 |
| 7432142 | Methods of fabricating nitride-based transistors having regrown ohmic contact regions Transistor fabrication includes forming a nitride-based channel layer on a substrate, forming a barrier layer on the nitride-based channel layer, forming a contact recess in the barrier layer to expose a contact region of the nitride-based channel layer, forming a c... | 10/07/2008 |
| 7425482 | Non-volatile memory device and method for fabricating the same A non-volatile memory device and a method for fabricating the same are provided. The method includes: forming a plurality of gate structures on a substrate, each gate structure including a first electrode layer for a floating gate; forming a first insulation layer c... | 09/16/2008 |
| 7407859 | Compound semiconductor device and its manufacture A compound semiconductor device has: a substrate; a GaN channel layer; an n-type AlqGal-qN (0 | 08/05/2008 |
| 7384827 | Method of manufacturing semiconductor device using liquid phase deposition of an interlayer dielectric Exemplary embodiments of the invention provide techniques that enable avoidance of the concentration of an electric field at the edge of a semiconductor film in a semiconductor device such as a thin film transistor, thereby enhancing the reliability. Exemplary embod... | 06/10/2008 |
| 7364988 | Method of manufacturing gallium nitride based high-electron mobility devices A method of manufacturing a heterojunction device includes forming a first layer of p-type aluminum gallium nitride; forming a second layer of undoped gallium nitride on the first layer; and forming a third layer of aluminum gallium nitride on the second layer, to p... | 04/29/2008 |
| 7361536 | Method of fabrication of a field effect transistor with materialistically different two etch stop layers in an enhanced mode transistor and an depletion mode transistor A semiconductor structure a structure with an enhancement mode transistor device disposed in a first region and depletion mode transistor device disposed in a laterally displaced second region. The structure has a channel layer for the depletion mode and enhancement... | 04/22/2008 |
| 7358907 | Small-sized antenna A small-sized antenna is adapted to be mounted on a circuit substrate. The antenna has an antenna body and a resin-molded body that has a first resin-molded body and a second resin-molded body. The antenna body is sandwiched by the first and second resin-molded bodi... | 04/15/2008 |
| 7352017 | Nitride semiconductor device and manufacturing method thereof A nitride semiconductor device enabiling to supress current collapse and manufacturing method thereof including a III-V group nitride semiconductor layer formed of III group elements includes at least one element from the group consisting of gallium, aluminum, boron... | 04/01/2008 |
| 7344898 | Method for manufacturing semiconductor device After a bottom electrode film is formed, a ferroelectric film is formed on the bottom electrode film. Then, a heat treatment is performed for the ferroelectric film in an oxidizing atmosphere so as to crystallize the ferroelectric film. Then, a top electrode film is... | 03/18/2008 |
| 7338826 | Silicon nitride passivation with ammonia plasma pretreatment for improving reliability of AlGaN/GaN HEMTs This invention pertains to an electronic device and to a method for making it. The device is a heterojunction transistor, particularly a high electron mobility transistor, characterized by presence of a 2 DEG channel. Transistors of this invention contain an AlGaN b... | 03/04/2008 |
| 7339209 | Integrated semiconductor structure including a heterojunction bipolar transistor and a Schottky diode An integrated semiconductor structure includes a heterojunction bipolar transistor and a Schottky diode. The structure has a substrate, the heterojunction bipolar transistor overlying and contacting the substrate, wherein the heterojunction bipolar transistor includ... | 03/04/2008 |
| 7335542 | Semiconductor device with mushroom electrode and manufacture method thereof A semiconductor device has: a semiconductor substrate having a pair of current input/output regions via which current flows; an insulating film formed on the semiconductor substrate and having a gate electrode opening; and a mushroom gate electrode structure formed ... | 02/26/2008 |
