"It is my heart-warmed and world-embracing Christmas hope and aspiration that all of us, the high, the low, the rich, the poor, the admired, the despised, the loved, the hated, the civilized, the savage (every man and brother of us all throughout the whole earth), may eventually be gathered together in a heaven of everlasting rest and peace and bliss, except the inventor of the telephone. "
Mark Twain ; Christmas greetings, 1890
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| Number | Title | Issue Date |
| 8183101 | Multiple gate transistor having fins with a length defined by the gate electrode The drain and source regions of a multiple gate transistor may be formed without an epitaxial growth process by using a placeholder structure for forming the drain and source dopant profiles and subsequently masking the drain and source areas and removing the placeh... | 05/22/2012 |
| 8148217 | Semiconductor manufacturing method and semiconductor device A method of manufacturing a semiconductor device includes forming a mask layer on a first-conductivity-type semiconductor substrate, etching the semiconductor substrate using the mask layer as a mask, thereby forming a projecting semiconductor layer, forming a first... | 04/03/2012 |
| 8124465 | Method for manufacturing a semiconductor device having a source extension region and a drain extension region There is provided a semiconductor device including: convex semiconductor layers formed on a semiconductor substrate via an insulating film; gate electrodes formed on a pair of facing sides of the semiconductor layers via a gate insulating film; a channel region form... | 02/28/2012 |
| 8114724 | Method for fabricating semiconductor device A method for fabricating a semiconductor device includes: forming a plurality of photoresist patterns over a substrate structure; forming an insulation layer for a spacer over a structure including the photoresist patterns; forming a plurality of spacers on sidewall... | 02/14/2012 |
| 8062938 | Semiconductor device and method of fabricating the same A semiconductor device according to an embodiment of the present invention includes: a square pole-shaped channel portion made from a first semiconductor layer formed on a substrate, and surrounded with four side faces; a gate electrode formed on a first side face o... | 11/22/2011 |
| 8043904 | Semiconductor manufacturing method and semiconductor device A method of manufacturing a semiconductor device includes forming a mask layer on a first-conductivity-type semiconductor substrate, etching the semiconductor substrate using the mask layer as a mask, thereby forming a projecting semiconductor layer, forming a first... | 10/25/2011 |
| 8039326 | Methods for fabricating bulk FinFET devices having deep trench isolation Methods are provided for fabricating Bulk FinFET devices having deep trench isolation. One or more deep isolation trenches are formed in a bulk silicon wafer. Mandrel-forming material is deposited overlying the bulk silicon wafer and dielectric pad layer thereon and... | 10/18/2011 |
| 8034674 | Semiconductor device, method for manufacturing semiconductor device, and electronic appliance To provide a semiconductor device in which a channel formation region can be thinned without adversely affecting a source region and a drain region through a simple process and a method for manufacturing the semiconductor device. In the method for manufacturing a se... | 10/11/2011 |
| 8030144 | Semiconductor device with stressed fin sections, and related fabrication methods A method of fabricating a semiconductor device is provided. The method forms a fin arrangement on a semiconductor substrate, the fin arrangement comprising one or more semiconductor fin structures. The method continues by forming a gate arrangement overlying the fin... | 10/04/2011 |
| 8030145 | Back-gated fully depleted SOI transistor A fully depleted semiconductor-on-insulator (FDSOI) transistor structure includes a back gate electrode having a limited thickness and aligned to a front gate electrode. The back gate electrode is formed in a first substrate by ion implantation of dopants through a ... | 10/04/2011 |
| 8008138 | Extremely thin semiconductor on insulator semiconductor device with suppressed dopant segregation A method of fabricating a semiconductor device is provided in which the channel of the device is present in an extremely thin semiconductor-on-insulator (ETSOI) layer, i.e., a semiconductor layer having a thickness of less than 20 nm. In one embodiment, the method b... | 08/30/2011 |
| 7985634 | Semiconductor device and method for manufacturing the same A semiconductor device includes a Si substrate, an insulating film formed on one part of the Si substrate, a bulk Si region grown on other part of the Si substrate other than the insulating film, Si1-xGex(0 | 07/26/2011 |
| 7981736 | Systems and devices including multi-gate transistors and methods of using, making, and operating the same Disclosed are methods of forming transistors. In one embodiment, the transistors are formed by forming a plurality of elliptical bases in a substrate and forming fins form the elliptical bases. The transistors are formed within the fin such that they may be used as ... | 07/19/2011 |
| 7979836 | Split-gate DRAM with MuGFET, design structure, and method of manufacture A semiconductor structure for a dynamic random access memory cell, the structure including: a fin of a fin-type field effect transistor (FinFET) device formed over and spaced apart from a conductive region of a substrate; a storage capacitor connected to a first end... | 07/12/2011 |
| 7977174 | FinFET structures with stress-inducing source/drain-forming spacers and methods for fabricating the same Methods for fabricating FinFET structures with stress-inducing source/drain-forming spacers and FinFET structures having such spacers are provided herein. In one embodiment, a method for fabricating a FinFET structure comprises fabricating a plurality of parallel fi... | 07/12/2011 |
| 7968387 | Thin film transistor and method of fabricating thin film transistor substrate Provided are a thin film transistor (TFT) capable of increasing ON current and decreasing OFF current values, a TFT substrate having the polysilicon TFT, a method of fabricating the polysilicon TFT, and a method of fabricating a TFT substrate having the polysilicon ... | 06/28/2011 |
| 7955913 | Method for manufacturing semiconductor device A method for manufacturing a semiconductor device includes determining an active region in a semiconductor substrate, forming a recess in a gate region crossing over the active region, annealing an oxide layer formed in the recess to oxidize the active region in the... | 06/07/2011 |
| 7955914 | Method of producing an asymmetric architecture semi-conductor device A method is for producing an asymmetric architecture semiconductor device. The device includes a substrate, and in stacked relation, a first photosensitive layer, a non-photosensitive layer, and a second photosensitive layer. The method includes a first step of expo... | 06/07/2011 |
| 7943445 | Asymmetric junction field effect transistor A junction field effect transistor (JFET) in a semiconductor substrate includes a source region, a drain region, a channel region, an upper gate region, and a lower gate region. The lower gate region is electrically connected to the upper gate region. The upper and ... | 05/17/2011 |
| 7923315 | Manufacturing method for planar independent-gate or gate-all-around transistors The present invention relates to a method for fabricating a planar independent-double-gate FET or a planar gate-all-around FET on a bulk semiconductor substrate. The method comprises refilling a surface recess in an active semiconductor region with a buried sacrific... | 04/12/2011 |
| 7923314 | Field effect transistor and method for manufacturing the same A method for manufacturing a field effect transistor, includes: forming a mask of an insulating film on a semiconductor layer containing Si formed on a semiconductor substrate; forming the semiconductor layer into a mesa structure by performing etching with the use ... | 04/12/2011 |
| 7910413 | Structure and method of fabricating FinFET with buried channel A method of manufacturing a fin structure comprises forming a first structure of a first material type on a wafer and forming a buried channel of a second material adjacent sidewalls of the first structure. The second material type is different than the first materi... | 03/22/2011 |
| 7888192 | Process for forming integrated circuits with both split gate and common gate FinFET transistors A method is disclosed for forming an integrated circuit including a common gate FinFET device and a split gate FinFET device. Taller fins and shorter fins of different heights are formed in a semiconductor surface. Layers of gate dielectric material and gate electro... | 02/15/2011 |
| 7879661 | Semiconductor device and method for fabricating the same A semiconductor device of a dual-gate structure including a P-channel type field-effect transistor formed at a first region of a substrate and an N-channel type field-effect transistor formed at a second region of the substrate, includes a gate electrode including a... | 02/01/2011 |
| 7879660 | Semiconductor structures integrating damascene-body FinFET's and planar devices on a common substrate and methods for forming such semiconductor structures Methods of forming a semiconductor structure having FinFET's and planar devices, such as MOSFET's, on a common substrate by a damascene approach, and semiconductor structures formed by the methods. A semiconductor fin of the FinFET is formed on a substrate with dama... | 02/01/2011 |
| 7842562 | Strained-channel fin field effect transistor (FET) with a uniform channel thickness and separate gates A semiconductor device (and method for making the same) includes a strained-silicon channel formed adjacent a source and a drain, a first gate formed over a first side of the channel, a second gate formed over a second side of the channel, a first gate dielectric fo... | 11/30/2010 |
| 7790531 | Methods for isolating portions of a loop of pitch-multiplied material and related structures Different portions of a continuous loop of semiconductor material are electrically isolated from one another. In some embodiments, the end of the loop is electrically isolated from mid-portions of the loop. In some embodiments, loops of semiconductor material, havin... | 09/07/2010 |
| 7785944 | Method of making double-gated self-aligned finFET having gates of different lengths A method is provided of making a gated semiconductor device. Such method can include patterning a single-crystal semiconductor region of a substrate to extend in a lateral direction parallel to a major surface of a substrate and to extend in a direction at least sub... | 08/31/2010 |
| 7781274 | Multi-gate field effect transistor and method for manufacturing the same A multi-gate field effect transistor includes: a plurality of semiconductor layers arranged in parallel on a substrate; source and drain regions formed in each of the semiconductor layers; channel regions each provided between the source region and the drain region ... | 08/24/2010 |
| 7781273 | Semiconductor structure with multiple fins having different channel region heights and method of forming the semiconductor structure Disclosed are embodiments of a semiconductor structure with fins that are positioned on the same planar surface of a wafer and that have channel regions with different heights. In one embodiment the different channel region heights are accomplished by varying the ov... | 08/24/2010 |
| 7754546 | Semiconductor device manufacturing method and semiconductor device using the same Including a process for forming a fin 12a having a first height and a fin 12b having a second height lower than the first height, a process for forming a silicon oxide film on the upper and side faces of each of the fins 12a | 07/13/2010 |
| 7749823 | Thin film transistor substrate of horizontal electric field type liquid crystal display device and fabricating method thereof A thin film transistor substrate of horizontal electric field type includes: a gate line and a first common line formed on a substrate to be in parallel to each other; a data line crossing the gate line and the first common line with a gate insulating film therebetw... | 07/06/2010 |
| 7745270 | Tri-gate patterning using dual layer gate stack In general, in one aspect, a method includes forming an n-diffusion fin and a p-diffusion fin in a semiconductor substrate. A high dielectric constant layer is formed over the substrate. A first work function metal layer is created over the n-diffusion fin and a sec... | 06/29/2010 |
| 7727825 | Polyconductor line end formation and related mask Methods of forming adjacent polyconductor line ends and a mask therefor are disclosed. In one embodiment, the method includes forming a polyconductor layer over an isolation region; forming a mask over the polyconductor layer, the mask including shapes to create the... | 06/01/2010 |
| 7704811 | Sub-lithographics opening for back contact or back gate A low resistance buried back contact for SOI devices. A trench is etched in an insulating layer at minimum lithographic dimension, and sidewalls are deposited in the trench to decrease its width to sublithographic dimension. Conducting material is deposited in the t... | 04/27/2010 |
| 7696027 | Method of fabricating display substrate and method of fabricating display panel using the same Disclosed is a method of fabricating a display substrate. A black matrix and a color filter layer are formed on a base substrate, and then a transparent electrode and a photoresist layer pattern are sequentially formed. The transparent electrode is patterned using t... | 04/13/2010 |
| 7691689 | Methods of fabricating semiconductor devices having multiple channel transistors and semiconductor devices fabricated thereby In methods of fabricating a semiconductor device having multiple channel transistors and semiconductor devices fabricated thereby, the semiconductor device includes an isolation region disposed within a semiconductor substrate and defining a first region. A pluralit... | 04/06/2010 |
| 7691690 | Methods for forming dual fully silicided gates over fins of FinFet devices Methods for forming fully silicided gates over fins of FinFet devices are disclosed. The disclosure provides methods for patterning a gate stack over each fin from a polysilicon layer and a polysilicon germanium layer, and then removing the polysilicon germanium lay... | 04/06/2010 |
| 7662679 | Semiconductor manufacturing method and semiconductor device A method of manufacturing a semiconductor device includes forming a mask layer on a first-conductivity-type semiconductor substrate, etching the semiconductor substrate using the mask layer as a mask, thereby forming a projecting semiconductor layer, forming a first... | 02/16/2010 |
| 7659153 | Sectional field effect devices and method of fabrication A field effect device is disclosed which has a body formed of a crystalline semiconductor material and has at least one vertically oriented section and at least one horizontally oriented section. The device is produced in SOI technology by fabricating first a format... | 02/09/2010 |