Quotables
"Flight by machines heavier than air is unpractical and insignificant, if not utterly impossible."
Simon Newcomb, astronomer ; Said in 1902, less than two years before the first flight at Kitty Hawk
PatentStorm News
Make the Most of Our Site
See this month's Top Inventors and Most Cited Patents.
Stay on top of the latest innovations by subscribing to an RSS feed.
Registered users: Manage your profile.
| Number | Title | Issue Date |
| 7727821 | Image sensing cell, device, method of operation, and method of manufacture An image sensing device can include one or more image sensing cells. Each image sensing cell can have a charge store element formed from a semiconductor material doped to a first conductivity type. The charge store element can be in contact with a channel region for... | 06/01/2010 |
| 7439106 | Gate CD trimming beyond photolithography A semiconductor device is fabricated with a selected critical dimension. A gate dielectric layer is formed over a semiconductor body. A gate layer comprised of a conductive material, such as polysilicon, is formed over the gate dielectric layer. The gate layer is pa... | 10/21/2008 |
| 7364697 | System for infrared spectroscopic imaging of libraries Methods and apparatus for screening diverse arrays of materials using infrared imaging techniques are provided. Typically, each of the individual materials on the array will be screened or interrogated for the same material characteristic. Once screened, the individ... | 04/29/2008 |
| 7361574 | Single-crystal silicon-on-glass from film transfer A method is provided for transferring a single-crystal silicon (Si) film to a glass substrate. The method deposits a germanium (Ge)-containing material overlying a Si wafer, forming a sacrificial Ge-containing film. A single-crystal Si film is formed overlying the s... | 04/22/2008 |
| 7329583 | Method of fabricating isolated semiconductor devices in epi-less substrate An structure for electrically isolating a semiconductor device is formed by implanting dopant into a semiconductor substrate that does not include an epitaxial layer. Following the implant the structure is exposed to a very limited thermal budget so that dopant does... | 02/12/2008 |
| 7279378 | Method of fabricating isolated semiconductor devices in epi-less substrate An structure for electrically isolating a semiconductor device is formed by implanting dopant into a semiconductor substrate that does not include an epitaxial layer. Following the implant the structure is exposed to a very limited thermal budget so that dopant does... | 10/09/2007 |
| 7276431 | Method of fabricating isolated semiconductor devices in epi-less substrate An structure for electrically isolating a semiconductor device is formed by implanting dopant into a semiconductor substrate that does not include an epitaxial layer. Following the implant the structure is exposed to a very limited thermal budget so that dopant does... | 10/02/2007 |
| 7276753 | Dynamic random access memory cell and fabricating method thereof A method of fabricating a dynamic random access memory cell is provided. A substrate having a patterned mask layer thereon and a deep trench therein is provided. The patterned mask layer exposes the deep trench. A deep trench capacitor is formed inside the deep tren... | 10/02/2007 |
| 7268491 | Expandable display having rollable material A display is disclosed. The display comprises a plurality of expandable tubes and a rollable material coupled to the expandable tubes, wherein the plurality of tubes can be expanded and contracted to increase or decrease the size of the display. The user of the expa... | 09/11/2007 |
| 7259106 | Method of making a microelectronic and/or optoelectronic circuitry sheet A circuitry sheet (322) comprising an electronic device layer stack (304) containing electronic devices, e.g., thin-film transistors, or portions thereof, formed by removing material from both sides of the device layer stack. The circuitry sheet may be... | 08/21/2007 |
| 7235435 | Method for fabricating thin film transistor with multiple gates using metal induced lateral crystallization A thin film transistor with multiple gates using an MILC process which is capable of materializing multiple gates without increasing dimensions and a method thereof. The thin film transistor has a semiconductor layer which is formed on a insulating substrate in a zi... | 06/26/2007 |
| 7235434 | Thin film transistor with multiple gates using metal induced lateral crystallization and method of fabricating the same A thin film transistor with multiple gates using an MILC process which is capable of materializing multiple gates without increasing dimensions and a method thereof. The thin film transistor has a semiconductor layer which is formed on a insulating substrate in a zi... | 06/26/2007 |
| 7205606 | DRAM access transistor Self-aligned recessed gate structures and method of formation are disclosed. Field oxide areas for isolation are first formed in a semiconductor substrate. A plurality of columns are defined in an insulating layer formed over the semiconductor substrate subsequent t... | 04/17/2007 |
| 7205183 | Methods of manufacturing thin film transistors using masks to protect the channel regions from impurities while doping a semiconductor layer to form source/drain regions A method of manufacturing a thin film transistor includes forming a semiconductor layer on a substrate; forming a gate insulating layer over the entire surface of the substrate to cover the semiconductor layer; depositing a conductive layer on the gate insulating la... | 04/17/2007 |
| 7183600 | Semiconductor device with trench gate type transistor and method of manufacturing the same A semiconductor device includes a plurality of gate trenches, each of which has first inner walls, which face each other in a first direction which is perpendicular to a second direction in which active regions extend, and second inner walls, which face each other i... | 02/27/2007 |
| 7098102 | Shallow trench isolation structure and dynamic random access memory, and fabricating methods thereof A method for fabricating a shallow trench isolation (STI) structure is described. A patterned mask layer is formed on a substrate. An ion implantation is performed to form a doped region in a predetermined depth in the substrate exposed by the mask layer. An etching... | 08/29/2006 |
| 7087508 | Method of improving short channel effect and gate oxide reliability by nitrogen plasma treatment before spacer deposition A new method is provided for manufacturing a gate electrode. A layer of gate material, such as polysilicon, is deposited, patterned and etched, defining the poly gate electrode structure. LDD and pocket impurity implants are performed, the LDD profile is created by ... | 08/08/2006 |
| 7075002 | Thin-film photoelectric conversion device and a method of manufacturing the same A method of manufacturing a thin-film solar cell, comprising the steps of: forming an amorphous silicon film on a substrate; placing a metal element that accelerates the crystallization of silicon in contact with the surface of the amorphous silicon film; subjecting... | 07/11/2006 |
| 7005341 | Dynamic random access memory cell and fabricating method thereof A method of fabricating a dynamic random access memory cell is provided. A substrate having a patterned mask layer thereon and a deep trench therein is provided. The patterned mask layer exposes the deep trench. A deep trench capacitor is formed inside the deep tren... | 02/28/2006 |
| 6929983 | Method of forming a current controlling device A current-controlling device comprising a first conductor, a second conductor, and a tunneling barrier comprising a first insulating layer between the first conductor and the second conductor. The tunneling barrier electrically isolates the first conductor from the ... | 08/16/2005 |
| 6888182 | Thin film transistor, method for manufacturing same, and liquid crystal display device using same A thin film transistor of the present invention is provided with (i) a plurality of divided channel regions formed under a gate electrode, and (ii) divided source regions and divided drain regions between which each of the divided channel regions is sandwiched, the ... | 05/03/2005 |
| 6649442 | Fast line dump structure for solid state image sensor The present invention is a structure for a fast-dump gate (FDG) and a fast-dump drain (FDD) for a charge coupled device. It is envisioned that the charge coupled device be a horizontal readout register of a solid-state image sensor. This structure uses a ... | 11/18/2003 |
| 6620672 | SOI DRAM with buried capacitor under the digit lines utilizing a self aligning penetrating storage node contact formation A method of fabricating a memory cell is described in which an access transistor is first formed on an SOI substrate. The access transistor contains source and drain regions in a semiconductor material layer of the substrate and at least one gate stack wh... | 09/16/2003 |
| 6599782 | Semiconductor device and method of fabricating thereof To enhance the withstand voltage of an LD MOS transistor, a method of fabricating a semiconductor device according to the invention is characterized in that a process for forming a drift region is composed of a step for implanting phosphorus ions and arse... | 07/29/2003 |
| 6559477 | Flat panel display device and method for manufacturing the same A flat panel display device comprising a thin film semiconductor switching element formed on a surface of a substrate, a display electrode connected with the switching element, a semiconductor layer for auxiliary capacity which is electrically connected w... | 05/06/2003 |
| 6475835 | Method for forming thin film transistor A method for forming a thin film transistor (TFT) is disclosed. The invention uses metal electroless plating or chemical displacement processes to form metal clusters adjacent the sidewall of amorphous silicon active region pattern so as to crystallize th... | 11/05/2002 |
| 6471772 | Laser processing apparatus and laser processing method A laser irradiating apparatus includes a cylindrical lens group that divides a laser beam and a cylindrical lens that re-couples a laser beam as divided. The cylindrical lens is shaped in a parallelogram whose angles are not a right angle, thereby being c... | 10/29/2002 |
| 6451630 | Method for manufacturing a thin-film transistor A method for manufacturing a thin film transistor is disclosed. Afterforming a channel region on a surface of a substrate, an insulating layer is deposited on the surface of the substrate to cover the channel region. The insulating layer is pataterned suc... | 09/17/2002 |
| 6429069 | SOI DRAM with buried capacitor under the digit lines utilizing a self aligning penetrating storage node contact formation A method of fabricating a memory cell is described in which an access transistor is first formed on an SOI substrate. The access transistor contains source and drain regions in a semiconductor material layer of the substrate and at least one gate stack wh... | 08/06/2002 |
| 6387735 | Method for manufacturing field effect transistor capable of successfully controlling transistor characteristics relating to the short-channel effect A gate electrode having a gate length of 0.4 μm or less is formed on a semiconductor substrate. Gate length of this gate electrode is measured, and dose of ion implantation for forming the source region and the drain region is variably set according to t... | 05/14/2002 |
| 6358768 | Method for fabricating a solid-state image sensor having an HCCD and VCCDs A solid-state image sensor and a fabricating method thereof in which poly gates in a horizontal charge coupled device (hereinafter referred to as HCCD) are made to have different lengths to omit a barrier ion implanting process step, thus simplifying the ... | 03/19/2002 |
| 6300160 | Process for charge coupled image sensor with U-shaped gates A method and apparatus of forming adjacent, non-overlapping CCD electrodes within an image sensing device such the electrodes are U-shaped. The device provided by the disclosed method employs a substrate with a gate dielectric layer formed on a surface of... | 10/09/2001 |
| 6218701 | Power MOS device with increased channel width and process for forming same A power MOS device that has increased channel width comprises a semiconductor substrate and a doped upper layer of a first conduction type disposed on the substrate. The upper layer comprises a plurality of doped well regions of a second, opposite conduct... | 04/17/2001 |
| 6107124 | Charge coupled device and method of fabricating the same A charge coupled device is disclosed including: a well formed in a substrate, the well having a conductivity opposite to that of the substrate; a first conductivity type of BCCD region formed on the well; a first lightly doped impurity region formed in a ... | 08/22/2000 |
| 6040238 | Thermal annealing for preventing polycide void A method for fabricating polycide gate electrodes wherein voids at the silicide/polysilicon interface are eliminated by thermal annealing is described. A layer of gate silicon oxide is grown over the surface of a semiconductor substrate. A polysilicon lay... | 03/21/2000 |
| 6037194 | Method for making a DRAM cell with grooved transfer device A memory cell having a grooved gate formed in a sub-lithographic groove, and methods of making thereof are disclosed. The groove extends the channel length to include the groove sidewalls and width of the groove. Sidewall sections of the channel located a... | 03/14/2000 |
| 5837568 | Manufacturing method of semiconductor devices To provide a manufacturing method of thin film transistors (TFT) using poly-silicone and having an LDD structure. In particular, the LDD sections of the TFTs are formed in an improved method so as to achieve a high throughput and stable performance of the... | 11/17/1998 |
| 5788763 | Manufacturing method of a silicon wafer having a controlled BMD concentration In a heat history initializing step, a heat treatment in performed in an atmosphere including at least one of hydrogen, helium, and argon while the temperature is increased in a range of 700° C. to 1,000° C. at a rate of 15°-1,000° C./min. In a contro... | 08/04/1998 |
| 5583071 | Image sensor with improved output region for superior charge transfer characteristics The new CCD output region provides a method of reducing the width of a wide CCD at its output to maintain a high sensitivity output node without sacrificing charge-transfer efficiency. A barrier region is shaped so the "channel width" of the CCD increases... | 12/10/1996 |
| 5500383 | Method for fabricating a CCD image sensor with active transistor pixel An image sensor element having at least one charge storage well 70 and 80, charge transfer structures for transferring charge from one charge storage well 70 to another charge storage well 80, and a charge sensor for sensing charge levels in a charge stor... | 03/19/1996 |
