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| Number | Title | Issue Date |
| 7807514 | CCD with improved charge transfer A method of forming a charge-coupled device including the steps of forming well or substrate of a first conductivity type; a buried channel of a second conductivity type; a plurality of first gate electrodes; partially coating the first gate electrodes with a mask s... | 10/05/2010 |
| 7355760 | Solid-state image sensing device, driving method thereof, and image scanner A CCD linear sensor includes a monochrome sensor and a color sensor, which have different transfer speeds and which are mounted on the same chip. In the CCD linear sensor, while one read-out operation is performed by the color sensor, two read-out operations are per... | 04/08/2008 |
| 7314801 | Semiconductor device having a surface conducting channel and method of forming A semiconductor device including a metal oxide layer, a channel area of the metal oxide layer, a preservation layer formed on the channel area of the metal oxide layer, and at least two channel contacts coupled to the channel area of the metal oxide layer, and a met... | 01/01/2008 |
| 7259428 | Semiconductor device using SOI structure having a triple-well region A semiconductor device includes a support substrate, a buried insulation film, provided on the support substrate, having a thickness of 5 to 10 nm, a silicon layer provided on the buried insulation film, a MOSFET provided in the silicon layer, and a triple-well regi... | 08/21/2007 |
| 7217601 | High-yield single-level gate charge-coupled device design and fabrication In accordance with the invention, an electrically conducting charge transfer channel is formed in a semiconductor substrate and an electrically insulating layer is formed on a surface of the substrate; a layer of gate electrode material is formed on the insulating l... | 05/15/2007 |
| 7179676 | Manufacturing CCDs in a conventional CMOS process A technique for forming Charge-Coupled Devices (CCDs) in a conventional Complementary Metal Oxide Semiconductor (CMOS) process. A number of single-layer polysilicon gates are formed on an as-grown, native doped silicon substrate, with gaps between them. Masking is u... | 02/20/2007 |
| 7132343 | Method and apparatus for manufacturing display panel The whole surface of an insulating substrate having an amorphous silicon film formed thereon is scanned/irradiated with a solid-state pulsed laser beam shaped linearly or rectangularly, to form a uniform fine poly-crystalline silicon film for forming a pixel region.... | 11/07/2006 |
| 7110163 | Electro-optic display and lamination adhesive for use therein An electro-optic display comprises a layer (130) of a solid electro-optic material, at least one electrode disposed adjacent the layer (130) of electro-optic material, and a layer (180) of a lamination adhesive interposed between the layer (1... | 09/19/2006 |
| 7052939 | Structure to reduce signal cross-talk through semiconductor substrate for system on chip applications A structure that reduces signal cross-talk through the semiconductor substrate for System-On-Chip (SOC) (2) applications, thereby facilitating the integration of digital circuit blocks (6) and analog circuit blocks (8) onto a single IC. Cross-ci... | 05/30/2006 |
| 7012735 | Electro-optic assemblies, and materials for use therein An electro-optic display comprises first and second substrates, and an adhesive layer and a layer of electro-optic material disposed between these substrates, the adhesive layer comprising a mixture of a polymeric adhesive material and an additive selected from a sa... | 03/14/2006 |
| 6977204 | Method for forming contact plug having double doping distribution in semiconductor device The present invention provides a method for forming a contact plug in a semiconductor device capable of preventing an increase of contact resistance caused by a decrease in dopant concentration and suppressing diffusions of dopants implanted into the contact. The do... | 12/20/2005 |
| 6967121 | Buried channel CMOS imager and method of forming same A buried channel CMOS imager having an improved signal to noise ratio is disclosed. The buried channel CMOS imager provides reduced noise by keeping collected charge away from the surface of the substrate, thereby improving charge loss to the substrate. The buried c... | 11/22/2005 |
| 6927091 | Method for fabricating solid-state imaging device Disclosed is a method for fabricating a solid-state imaging device including a semiconductor substrate of a first conductivity type, a plurality of light-receiving sections provided at a distance in the surface region of the semiconductor substrate, and channel stop... | 08/09/2005 |
| 6780686 | Doping methods for fully-depleted SOI structures, and device comprising the resulting doped regions The present invention is generally directed to doping methods for fully-depleted SOI structures, and a device comprising such resulting doped regions. In one illustrative embodiment, the device comprises a transistor formed above a silicon-on-insulator substrate com... | 08/24/2004 |
| 6713323 | Semiconductor device and method of manufacturing the same A semiconductor device is manufactured by a method in which the number of heat treatments at a high temperature (600° C. or higher) is reduced to thereby achieve a process at a low temperature (600° C. or lower), and a simplified process and improvement in through... | 03/30/2004 |
| 6649454 | Method for fabricating a charge coupled device A process for forming a portion of a charge coupled device (CCD) is described. More particularly, wells (105) are formed self-aligned under gate stacks (132, 134). By forming wells (105) self-aligned to respective first and second gates (107, 207) of gate... | 11/18/2003 |
| 6573138 | Nonvolatile memory cell with low doping region A technique of fabricating a nonvolatile device includes forming a low doping region to aid in the reduction of substrate hot electrons. The nonvolatile device may be a floating gate device, such as a Flash, EEPROM, or EPROM memory cell. The low doping re... | 06/03/2003 |
| 6555421 | Method and apparatus for manufacturing semiconductor device A method and apparatus for manufacturing a semiconductor device can achieve the formation of thin films in a uniform thickness on a substrate. The method and apparatus includes a film-forming process in which film-forming gases 14, 15 are caused to flow o... | 04/29/2003 |
| 6432763 | Field effect transistor having doped gate with prevention of contamination from the gate during implantation For fabricating a field effect transistor on a semiconductor substrate, a gate dielectric of the field effect transistor is formed on a semiconductor substrate. A doped gate electrode, which may be comprised of silicon germanium (SiGe) for example, is for... | 08/13/2002 |
| 6380005 | Charge transfer device and method for manufacturing the same In a charge transfer device of the two-layer electrode, two-phase drive type, an N-- semiconductor region 108 and a first insulator film 103 are formed on a P-type semiconductor substrate 101 in the named order. Then, first transfer electrodes ... | 04/30/2002 |
| 6210990 | Method for fabricating solid state image sensor Method for fabricating a solid state image sensor, which can improve a charge transfer efficiency of an end terminal, including the steps of (1) providing a first conduction type substrate having a second conduction type well and a BCCD formed therein for... | 04/03/2001 |
| 6194748 | MOSFET with suppressed gate-edge fringing field effect A method of fabricating an integrated circuit with less susceptibility to gate-edge fringing field effect is disclosed. The transistor includes a low-k dielectric spacer and a high-k gate dielectric. The high-k gate dielectric can be tantalum pentaoxide o... | 02/27/2001 |
| 6133063 | Process for producing a pin layer sequence on a perovskite and a perovskite having a pin layer sequence In a process for producing a pin layer sequence on a perovskite of the type ABO3 which has AO layers, AO layers are converted such that a p-conductive B-oxide rich layer and, disposed therebetween an ABO3 layer with intrinsic conduct... | 10/17/2000 |
| 6107124 | Charge coupled device and method of fabricating the same A charge coupled device is disclosed including: a well formed in a substrate, the well having a conductivity opposite to that of the substrate; a first conductivity type of BCCD region formed on the well; a first lightly doped impurity region formed in a ... | 08/22/2000 |
| 6054341 | Method of manufacturing charge-coupled device having different light-receiving region and charge-isolating layer structures A charge-coupled device includes a first P-type well formed in an N-type semiconductor substrate, a second P-type well formed repeatedly the first P-type well region, a charge-transfer region (BCCD) formed within the second P-type well region, an N-type p... | 04/25/2000 |
| 5981309 | Method for fabricating charge coupled device image sensor A method for fabricating a CCD image sensor includes the steps of forming a P type well in a surface of a semiconductor substrate, forming a buried CCD (BCCD) in a surface of the P type well, forming an offset gate and a reset gate on the BCCD at a predet... | 11/09/1999 |
| 5972733 | Self-aligned barrier process with antiblooming drain for advanced virtual phase charged coupled devices A method for making a virtual phase charge coupled device includes: forming a semiconductor region 24; forming a gate insulator layer 26 over the semiconductor region 24; forming a semiconductor layer over the gate insulator layer 26; forming first, secon... | 10/26/1999 |
| 5858812 | Method for fabricating interline-transfer CCD image sensor A solid-state image sensor has a photodiode region, a vertical CCD register for transferring a charge received at the photodiode region, a read-out gate region for reading the charge out to the vertical CCD register, and an element isolation region for is... | 01/12/1999 |
| 5788763 | Manufacturing method of a silicon wafer having a controlled BMD concentration In a heat history initializing step, a heat treatment in performed in an atmosphere including at least one of hydrogen, helium, and argon while the temperature is increased in a range of 700° C. to 1,000° C. at a rate of 15°-1,000° C./min. In a contro... | 08/04/1998 |
| 5773324 | Bidirectional horizontal charge transfer device and method A bidirectional horizontal charge transfer device and method includes a charge transfer area formed within a substrate, a plurality of first, second, third and fourth poly gates formed over the charge transfer area, an insulating layer formed between the ... | 06/30/1998 |
| 5607872 | Method of fabricating charge coupled device Charge couples devices and methods for the fabrication of the same are disclosed. The charge coupled device is structured to comprise: a first electrode consisting of a first region and second region having lower resistance than the first region; and a se... | 03/04/1997 |
| 5583071 | Image sensor with improved output region for superior charge transfer characteristics The new CCD output region provides a method of reducing the width of a wide CCD at its output to maintain a high sensitivity output node without sacrificing charge-transfer efficiency. A barrier region is shaped so the "channel width" of the CCD increases... | 12/10/1996 |
| 5567641 | Method of making a bipolar gate charge coupled device with clocked virtual phase The charge coupled device cell has a semiconductor layer 20 of a first conductivity type, a buried channel 22 of a second conductivity type on the semiconductor layer 20, a first virtual gate 24 in the buried channel 22, the first virtual gate is switched... | 10/22/1996 |
| 5556803 | Method for fabricating a charge coupled device A charged coupled device structure (CCD) and a method for fabricating the CCD structure, which induces a maximum potential distribution difference by utilizing gate insulation films having different physical properties. The charged coupled device includes... | 09/17/1996 |
| 5500383 | Method for fabricating a CCD image sensor with active transistor pixel An image sensor element having at least one charge storage well 70 and 80, charge transfer structures for transferring charge from one charge storage well 70 to another charge storage well 80, and a charge sensor for sensing charge levels in a charge stor... | 03/19/1996 |
| 5488010 | Method of fabricating sidewall charge-coupled device with trench isolation A charge-coupled imaging device comprising a plurality of trenches in the surface of the silicon substrate which separate adjacent columns in the CCD device. A plurality of surface electrodes are provided on the surface of the charge-coupled device extend... | 01/30/1996 |
| 5302543 | Method of making a charge coupled device A charge coupled device includes a second conductivity type first horizontal channel in a first conductivity type semiconductor substrate, a second conductivity type second horizontal channel in the substrate at a predetermined distance from the first hor... | 04/12/1994 |
| 5298448 | Method of making two-phase buried channel planar gate CCD The present invention is directed to a method of making a true two-phase CCD using a single layer (level) of the conductive material for the gate electrodes to provide a planar structure. The method includes using L-shaped masking layers having a submicro... | 03/29/1994 |
| 5185271 | Method of manufacturing a buried-channel charge-coupled image sensor In a method of manufacturing a raster transfer image sensor, the charge transport channels and the channel-bounding regions and the vertical anti-blooming channels are formed in a self-registering manner in that the channel-bounding regions are provided v... | 02/09/1993 |
| 5151380 | Method of making top buss virtual phase frame interline transfer CCD image sensor In one embodiment of the invention, a method for fabricating a virtual phase image sensor is disclosed comprising the steps of forming a semiconductor substrate of a first conductivity type, forming a buried channel region of a second conductivity type in... | 09/29/1992 |
