Did You Know...
...that several people are credited with the invention of the flush toilet? Most people have heard of Thomas Crapper (1837-1910), the sanitary engineer who invented the valve-and-siphon arrangement that made the modern toilet possible. Another claimant to "the throne" was British inventor Alexander Cumming who patented a toilet in 1775. Then there's a nameless Minoan (a native of ancient Crete) who lived 4,000 years ago who supposedly was ahead of his time and created the first flush toilet!
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| Number | Title | Issue Date |
| 8183096 | Static RAM cell design and multi-contact regime for connecting double channel transistors A static RAM cell may be formed on the basis of two double channel transistors and a select transistor, wherein a body contact may be positioned laterally between the two double channel transistors in the form of a dummy gate electrode structure, while a further rec... | 05/22/2012 |
| 8153482 | Well-structure anti-punch-through microwire device A well-structure anti-punch-through microwire device and associated fabrication method are provided. The method initially forms a microwire with alternating highly and lightly doped cylindrical regions. A channel ring is formed external to the microwire outer shell ... | 04/10/2012 |
| 8148213 | Method of producing a biosensor A method for manufacturing a biosensor includes forming a laminate of a first silicon oxide film and a polysilicon film on one surface of a silicon substrate; forming a second silicon oxide film on the other surface of the silicon substrate; forming a source electro... | 04/03/2012 |
| 8148212 | Methods of manufacturing semiconductor devices A plurality of nanowires is grown on a first substrate in a first direction perpendicular to the first substrate. An insulation layer covering the nanowires is formed on the first substrate to define a nanowire block including the nanowires and the insulation layer.... | 04/03/2012 |
| 8114717 | Methods to shape the electric field in electron devices, passivate dislocations and point defects, and enhance the luminescence efficiency of optical devices A fluorine treatment that can shape the electric field profile in electronic devices in 1, 2, or 3 dimensions is disclosed. A method to increase the breakdown voltage of AlGaN/GaN high electron mobility transistors, by the introduction of a controlled amount of disp... | 02/14/2012 |
| 8110450 | Printed TFT and TFT array with self-aligned gate A method is used to form a self-aligning thin film transistor. The thin film transistor includes a gate contact formed with a state-switchable material, and a dielectric layer to isolate the gate contact. A source-drain layer, which includes a source contact, and a ... | 02/07/2012 |
| 8058112 | Semiconductor device having carbon nanotubes and method for manufacturing the same A semiconductor device having good switching characteristics even metallic CNTs are included and a manufacturing method thereof are provided. The semiconductor device includes a source electrode; a drain electrode; and a channel layer formed between the source elect... | 11/15/2011 |
| 8053286 | Method of forming semiconductor device including trench gate structure A method of forming a semiconductor device is provided, which may include, but is not limited to, the following processes. Grooves may be formed in an insulating region and in a semiconductor region, while forming burrs near the boundary between the insulating regio... | 11/08/2011 |
| 8034670 | Reliable memory cell A method of forming a semiconductor device is presented. A substrate prepared with a second gate is provided. The second gate is processed to form a second gate with a rounded corner and a first gate is formed on the substrate. The first gate is adjacent to and over... | 10/11/2011 |
| 8021934 | Method for making a transistor with metallic source and drain A method including: making a structure on a substrate, said structure comprising at least a portion of a semiconductor material forming a channel of a field effect transistor, a gate located on the channel; forming at least one dielectric portion completely covering... | 09/20/2011 |
| 7993986 | Sidewall graphene devices for 3-D electronics A device is provided that includes a structure having a sidewall surface, a layer of material provided on the sidewall surface, and a device structure provided in contact with the layer of material. Fabrication techniques includes a process that includes forming a s... | 08/09/2011 |
| 7993985 | Method for forming a semiconductor device with a single-sided buried strap A method for forming a semiconductor device with a single-sided buried strap is provided. The method includes the steps of providing a substrate with a trench, forming a semiconductor component in a lower portion of the trench to expose a higher portion of the trenc... | 08/09/2011 |
| 7977166 | Semiconductor device and fabrication method for the semiconductor device A semiconductor device and a fabrication method for the semiconductor device which can remove the sacrifice layer deposited on the semiconductor device surface in a short time and whose manufacturing yield can be improved are provided. The semiconductor device and t... | 07/12/2011 |
| 7947537 | Metal oxide semiconductor, semiconductor element, thin film transistor and method of manufacturing thereof A method of manufacturing a metal oxide semiconductor comprising the step of: conducting a transformation treatment on a semiconductor precursor layer containing a metal salt to form the metal oxide semiconductor, wherein the metal salt comprises one or more metal s... | 05/24/2011 |
| 7935577 | Method for forming shielded gate field effect transistor using spacers A trench is formed in a semiconductor region. A dielectric layer lining sidewalls and bottom surface of the trench is formed. The dielectric layer is thicker along lower sidewalls and the bottom surface than along upper sidewalls of the trench. After forming the die... | 05/03/2011 |
| 7927928 | Spacer double patterning for lithography operations Systems and methods of semiconductor device fabrication and layout generation are disclosed. An exemplary method includes processes of depositing a layer of a first material and patterning the layer to form an initial pattern, wherein the initial pattern defines cri... | 04/19/2011 |
| 7897441 | Method of fabricating a CMOS image sensor A method of fabricating a CMOS image sensor comprising forming an epitaxial layer on a semiconductor substrate, the epitaxial layer comprising a pixel and logic area, forming an STI layer in the epitaxial layer, forming a plurality of wells and a gate pattern having... | 03/01/2011 |
| 7863111 | Thin film transistor for display device including a dispersed carbon nanotube dispersed conductive polymer and manufacturing method of the same Provided are a thin film transistor for display devices and a manufacturing method of the thin film transistor. The thin film transistor for display devices includes: a flexible substrate; a gate electrode layer formed on the flexible substrate; a first insulating l... | 01/04/2011 |
| 7863112 | Method and structure to protect FETs from plasma damage during FEOL processing Protecting a FET from plasma damage during FEOL processing by forming a FET-like structure in conjunction with and adjacent to an FET, in a same well as the FET, but having a body doped opposite to the well polarity. The FET-like structure is formed with thinner oxi... | 01/04/2011 |
| 7855105 | Planar and non-planar CMOS devices with multiple tuned threshold voltages A semiconductor structure is provided that includes a first device region including a first threshold voltage adjusting layer located atop a semiconductor substrate, a gate dielectric located atop the first threshold voltage adjusting layer, and a gate conductor loc... | 12/21/2010 |
| 7846783 | Use of poly resistor implant to dope poly gates A process of fabricating an IC is disclosed in which a polysilicon resistor and a gate region of an MOS transistor are implanted concurrently. The concurrent implantation may be used to reduce steps in the fabrication sequence of the IC. The concurrent implantation ... | 12/07/2010 |
| 7803668 | Transistor and fabrication process Process for fabricating a transistor, in which an electron-sensitive resist layer lying between at least two semiconductor fingers is formed and said resist lying between at least two wires is converted into a dielectric. For example, in one embodiment of the presen... | 09/28/2010 |
| 7772048 | Forming semiconductor fins using a sacrificial fin A semiconductor device is made by steps of removing portions of a first capping layer, removing portions of a sacrificial layer, recessing sidewalls, and forming fin structures. The step of removing portions of the first capping layer forms a first capping structure... | 08/10/2010 |
| 7767501 | Devices using abrupt metal-insulator transition layer and method of fabricating the device The abrupt metal-insulator transition device includes: an abrupt metal insulator transition material layer including an energy gap of less than or equal to 2 eV and holes within a hole level; and two electrodes contacting the abrupt metal-insulator transition materi... | 08/03/2010 |
| 7759174 | Method of manufacturing a semiconductor device A semiconductor device includes a substrate including a semiconductor and a trench, and an electrically rewritable semiconductor memory cell on the substrate, the semiconductor memory cell comprising a charge storage layer including an upper surface and a lower surf... | 07/20/2010 |
| 7718475 | Method for manufacturing an integrated circuit including a transistor The present invention relates to a transistor comprising a gate channel area and a gate stack having mechanical stress arranged on the gate channel area. ... | 05/18/2010 |
| 7718474 | Semiconductor device and method of manufacturing the same A semiconductor device includes a pair of select gate structures which are opposed to each other and which are formed in a select transistor formation area, each of the select gate structures including a gate insulating film formed on a semiconductor substrate and a... | 05/18/2010 |
| 7713795 | Flash memory device with single-poly structure and method for manufacturing the same A flash memory device has a single-poly structure. A method for manufacturing the flash device includes forming an oxide layer over a semiconductor substrate having a P-well region or N-well region. A shallow trench isolation (STI) may be formed in the semiconductor... | 05/11/2010 |
| 7700416 | Tensile strained semiconductor on insulator using elastic edge relaxation and a sacrificial stressor layer The process uses a sacrificial stressor layer to provide tensile strained surface regions for bulk silicon or silicon on insulator (SOI) substrates. The process deposits a sacrificial layer of silicon germanium on the surface of the substrate and then patterns the w... | 04/20/2010 |
| 7687324 | Semiconductor device and method of fabricating the same The present invention relates to a semiconductor device, comprising a plurality of word lines arranged on a semiconductor substrate, wherein plurality of word lines are grouped into groups of two word lines, a spacer dielectric layer formed between each group of two... | 03/30/2010 |
| 7670882 | Electronic device fabrication A system performs a method including contact printing one of a wetting agent and a non-wetting agent on a semiconductor and inkjet printing an electrically conductive material proximate said one of the wetting agent and the non-wetting agent. ... | 03/02/2010 |
| 7648860 | Self-aligned thin-film transistor and method of forming same A method of manufacturing a thin-film transistor or like structure provides conductive “tails” below an overhang region formed by a top gate structure. The tails increase in thickness as they extend outward from a point under the overhang to the source and drain... | 01/19/2010 |
| 7618851 | Method for the production of a semiconductor component having a metallic gate electrode disposed in a double-recess structure The production of a microelectronic component, particularly a pHEMT, having a T-shaped gate electrode in a double-recess structure uses a production method for self-adjusting alignment of the two recesses of the double-recess structure and of the gate foot of the ga... | 11/17/2009 |
| 7615418 | High performance stress-enhance MOSFET and method of manufacture A semiconductor structure and method of manufacturing and more particularly a CMOS device with a stress inducing material embedded in both gates and also in the source/drain region of the PFET. The PFET region and the NFET region having a different sized gate to var... | 11/10/2009 |
| 7608489 | High performance stress-enhance MOSFET and method of manufacture The invention relates to a semiconductor structure and method of manufacturing and more particularly to a CMOS device with a stress inducing material embedded in both gates and also in the source/drain region of the PFET and varying thickness of the PFET and NFET ch... | 10/27/2009 |
| 7585706 | Method of fabricating a semiconductor device The semiconductor device of this invention includes an active region formed from a group III nitride semiconductor grown on a substrate and an insulating oxide film formed in a peripheral portion of the active region by oxidizing the group III nitride semiconductor.... | 09/08/2009 |
| 7572684 | Nonvolatile memory devices and methods of forming the same Nonvolatile memory devices, and methods of forming the same are disclosed. A memory device includes a substrate having a cell region, a low voltage region and a high voltage region. A ground selection transistor, a string selection transistor and a cell transistor a... | 08/11/2009 |
| 7563654 | Method of manufacturing semiconductor device for formation of pin transistor A method for manufacturing a semiconductor device is disclosed. The method includes the steps of defining a trench into a field region of a semiconductor substrate having an active region and the field region; partially filing the trench with a flowable insulation l... | 07/21/2009 |
| 7544546 | Formation of carbon and semiconductor nanomaterials using molecular assemblies The invention is directed to a method of forming carbon nanomaterials or semiconductor nanomaterials. The method comprises providing a substrate and attaching a molecular precursor to the substrate. The molecular precursor includes a surface binding group for attach... | 06/09/2009 |
| 7544547 | Method for producing a support for the growth of localised elongated nanostructures The invention relates to a method for producing a support comprising nanoparticles (22) for the growth of nanostructures (23), said nanoparticles being organised periodically, the method being characterised in that it comprises the following steps: | 06/09/2009 |
