Did You Know...
...that two musicians were responsible for the invention of color print film? Fascinated by photography, Leopold Godowsky and Leopold Mannes worked together to produce an easy-to-use, practical color film. They worked full time as music teachers and gave concerts while experimenting during their off hours in Mannes' kitchen. Their success earned them full-time, well-paying jobs at Kodak and their efforts resulted in Kodachrome film, which was introduced in 1935.
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| Number | Title | Issue Date |
| 7405090 | Method of measuring an effective channel length and an overlap length in a metal-oxide semiconductor field effect transistor In a method of measuring an effective channel length and an overlap length, first to third metal-oxide semiconductor field effect transistors (MOSFETs) including first to third gate patterns, respectively, are formed on a substrate. A parasitic capacitance between t... | 07/29/2008 |
| 7403832 | Method and system for advanced process control including tool dependent machine constants A controller and a method of controlling a process tool is provided, in which machine constants used for calibrating manipulated variables of the control algorithm are explicitly introduced into the process model, thereby providing an enhanced controller behavior im... | 07/22/2008 |
| 7402443 | Methods of providing families of integrated circuits with similar dies partially disabled using product selection codes A method of providing a family of integrated circuits (ICs) includes applying a first product selection code (PSC) to a first IC die, applying a second PSC to a second IC die, and providing a third packaged IC die. The first IC die includes first and second portions... | 07/22/2008 |
| 7403259 | Lithographic processing cell, lithographic apparatus, track and device manufacturing method A rework station and a metrology device(s) are incorporated into a lithographic processing cell so that a faulty substrate can be reworked directly and reprocessed without, for example, an overhead involved in changing masks, etc. ... | 07/22/2008 |
| 7402444 | Method and apparatus for manufacturing a semiconductor device A method of manufacturing a semiconductor device using a wafer emissivity calculated from a wafer reflectivity to calculate a wafer temperature and to calculate target values for heat source optical intensities provided to a plurality of heat sources which heat the ... | 07/22/2008 |
| 7399635 | Impurity measuring method for Ge substrates The present invention provides an impurity measuring method comprising the steps of dropping a drop of a first solution on the surface of a substrate to be measured, moving the drop dropped on the surface of the substrate so that the drop is kept in contact with the... | 07/15/2008 |
| 7399648 | Methods and apparatus for determining location-based on-chip variation factor Techniques for determining a location-based on-chip variation factor for an integrated circuit device are provided. A first on-chip variation factor is computed for at least one of two or more signal paths of the integrated circuit device. The first on-chip variatio... | 07/15/2008 |
| 7397556 | Method, apparatus, and computer program product for optimizing inspection recipes using programmed defects A method, apparatus, and computer program product for implementing inspection recipe services are provided. The apparatus includes a test structure including a semiconductor substrate and a number of arrays disposed on the semiconductor substrate. The arrays are lin... | 07/08/2008 |
| 7396694 | Structure for monitoring semiconductor polysilicon gate profile Detection of a profile drift of a polysilicon line is enhanced by a test structure that (1) measures a bottom width and an average width of a cross sectional area of the same polysilicon line (2) correlates the two measurements, and (3) compares... | 07/08/2008 |
| 7396693 | Multiple point gate oxide integrity test method and system for the manufacture of semiconductor integrated circuits A method for testing a semiconductor wafer using an in-line process control, e.g., within one or more manufacturing processes in a wafer fabrication facility and/or test/sort operation. The method includes transferring a semiconductor wafer to a test station. The me... | 07/08/2008 |
| 7393702 | Characterizing the integrity of interconnects The present invention provides for a system and method of characterizing the integrity of a barrier structure. The barrier structure is an interconnect comprising a porous dielectric layer sandwiched between at least one barrier layer and at least one conducting lay... | 07/01/2008 |
| 7393703 | Method for reducing within chip device parameter variations A method of reducing parametric variation in an integrated circuit (IC) chip and an IC chip with reduced parametric variation. The method includes: on a first wafer having a first arrangement of chips, each IC chip divided into a second arrangement of regions, measu... | 07/01/2008 |
| 7393459 | Method for automatic determination of substrates states in plasma processing chambers A method for automatic determination of a state of a substrate in a plasma processing chamber is provided. Substrate reflectance data is collected in a processing chamber prior to processing to be analyzed with reference reflectance data to determine if the substrat... | 07/01/2008 |
| 7395170 | Methods and apparatus for data analysis A method and apparatus for data analysis according to various aspects of the present invention is configured to automatically select one or more outlier identification algorithms for identifying statistical outliers in test data for components. ... | 07/01/2008 |
| 7394273 | On-chip electromigration monitoring system A packaged semiconductor chip is provided which includes a semiconductor chip and a package element. The semiconductor chip includes a plurality of semiconductor devices and a plurality of conductive features disposed at an exterior face of the semiconductor chip. T... | 07/01/2008 |
| 7390680 | Method to selectively identify reliability risk die based on characteristics of local regions on the wafer A method and system for selectively identifying reliability risk die based on characteristics of local regions on a wafer by computing particle sensitive yield and using the particle sensitive yield to identify reliability risk die. Specifically, a bin characteristi... | 06/24/2008 |
| 7390751 | Dry etching method and apparatus for performing dry etching A dry etching method includes loading a wafer on a lower electrode having at least two cooling paths. Cooling fluids having different temperatures are supplied to each of the cooling paths of the lower electrode so that the multiple cooling paths are at different te... | 06/24/2008 |
| 7391036 | Sample surface inspection apparatus and method The present invention provides a surface inspection method and apparatus for inspecting a surface of a sample, in which a resistive film is coated on the surface, and a beam is irradiated to the surface having the resistive film coated thereon, to thereby conduct in... | 06/24/2008 |
| 7390682 | Method for testing metal-insulator-metal capacitor structures under high temperature at wafer level A test methodology is provided for testing metal-insulator-metal (MIM) capacitor structures under high temperatures at the wafer level. A resistor is formed on a region of dielectric isolation material formed in a semiconductor substrate. The MIM capacitor is formed... | 06/24/2008 |
| 7384803 | Method of manufacturing nitride semiconductor device including SiC substrate and apparatus for manufacturing nitride semiconductor device Excitation light is irradiated onto a GaN layer on a silicon carbide substrate constituting a layered product that is set on a stage. Then light is emitted from a defective part caused by a structural defect of the silicon carbide substrate out of the GaN layer. By ... | 06/10/2008 |
| 7384804 | Method and apparatus for electronically aligning capacitively coupled mini-bars One embodiment of the present invention provides a system that electronically aligns mini-bars on different semiconductor chips which are situated face-to-face to facilitate communication between the semiconductor chips through capacitive coupling. During operation,... | 06/10/2008 |
| 7386420 | Data analysis method for integrated circuit process and semiconductor process A data analysis method for an integrated circuit process is described, for analyzing the results of at least an in-line quality test, a product test and a yield test done to the products of the IC process. The products are divided into a normal group and an abnormal... | 06/10/2008 |
| 7381575 | Device and method for detecting alignment of active areas and memory cell structures in DRAM devices A test device and method for detecting alignment of active areas and memory cell structures in DRAM devices with vertical transistors. In the test device, parallel first and second memory cell structures disposed in the scribe line region, each has a deep trench cap... | 06/03/2008 |
| 7381576 | Method and apparatus for monitoring precision of water placement alignment A method for monitoring precision of placement of semiconductor wafers in a semiconductor processing apparatus includes measuring thickness of an insulating film on a surface of a semiconductor substrate before etching a portion of the insulating film from the surfa... | 06/03/2008 |
| 7381577 | Early detection test for identifying defective semiconductor wafers in a front-end manufacturing line A method and apparatus for identifying defective partially manufactured semiconductor wafers in a manufacturing line is described, wherein defects caused by silicon erosion created by over-etching the wafer can be detected. The method described herein is based on an... | 06/03/2008 |
| 7379580 | Method for detecting defects A method for inspecting a substrate for defects, including: (a) obtaining an inspected pixel and a reference pixel; (b) calculating an inspected value and a reference value, the inspected value representative of the inspected pixel and the reference value representa... | 05/27/2008 |
| 7378288 | Systems and methods for producing light emitting diode array Systems and methods are disclosed for producing vertical LED array on a metal substrate; evaluating said array of LEDs for defects; destroying one or more defective LEDs; forming good LEDs only LED array suitable for wafer level package. ... | 05/27/2008 |
| 7378289 | Method for forming photomask having test patterns in blading areas A photomask and a method for forming a photomask are disclosed in which die regions that define features for a process step of a semiconductor fabrication process are formed on a photomask and a test pattern for a different process step is formed in a blading area o... | 05/27/2008 |
| 7378290 | Isolation circuit An isolation circuit includes a first pad adapted to receive a control signal and a second pad adapted to receive another signal. A third pad is coupled to a microelectronic die and a device is provided to transfer the other signal from the second pad to the third p... | 05/27/2008 |
| 7374957 | Method of calibrating or qualifying a lithographic apparatus or part thereof, and device manufacturing method A system and method are provided for qualifying or calibrating lithographic apparatus or parts therefor, using a predetermined objective criterion such as Chauvenet's criterion is used to reject measurement points, individually, by field or by substrate. ... | 05/20/2008 |
| 7374956 | Method for improved metrology by protecting photoresist profiles A method for preserving semiconductor feature opening profiles for metrology examination including providing semiconductor wafer having a process surface comprising semiconductor feature openings; blanket depositing over the semiconductor feature openings to substan... | 05/20/2008 |
| 7372016 | Calibration standard for a dual beam (FIB/SEM) machine Calibration of measurements of features made with a system having a micromachining tool and an analytical tool is disclosed. The measurements can be calibrated with a standard having a calibrated feature with one or more known dimensions. The standard may have one o... | 05/13/2008 |
| 7371590 | Integrated inspection system and defect correction method A system for the inspection of and a process for the correction of defects in a microreplicated optical display film manufacturing process. The process steps of manufacturing a master, a plurality of shims from the master, and a multiplicity of display films from ea... | 05/13/2008 |
| 7372282 | Method and apparatus for testing tunnel magnetoresistive effect element, manufacturing method of tunnel magnetoresistive effect element and tunnel magnetoresistive effect element A method for testing a TMR element includes a step of measuring a plurality of resistances of the TMR element by applying a plurality of voltages with different voltage values each other to the TMR element, respectively, a step of calculating a ratio of change in re... | 05/13/2008 |
| 7372565 | Spectrometer measurement of diffracting structures A normal incidence reflectometer includes a rotatable analyzer/polarizer for measurement of a diffracting structure. Relative rotation of the analyzer/polarizer with respect to the diffracting structure permits analysis of the diffracted radiation at multiple polari... | 05/13/2008 |
| 7373213 | Management system and apparatus, method therefor, and device manufacturing method A management apparatus which manages a parameter for an industrial device acquires AGA measurement results obtained by operating the industrial device with an operation job parameter value and non-operation job parameter value. An inspection apparatus acquires an â€... | 05/13/2008 |
| 7369947 | Quantification of adsorbed molecular contaminant using thin film measurement A test method for measuring adsorbed molecular contamination uses a test structure that includes a substrate comprising a plurality of separated test sites having a plurality separate thicknesses having a base design thickness and a designed thickness interrelations... | 05/06/2008 |
| 7370257 | Test vehicle data analysis A system and method for collecting and analyzing integrated circuit test vehicle test data by identifying various blocks of circuitry through at least two different intersecting test paths. In one embodiment, the process test circuits may be arranged in a matrix for... | 05/06/2008 |
| 7369697 | Process variable of interest monitoring and control Methods for monitoring and controlling process variables of interest during the substrate manufacturing process is provided. Numerical estimates for selected attributes of a feature of interest may be analyzed and applied in a numerical estimator to estimate the pro... | 05/06/2008 |
| 7368302 | Dynamic metal fill for correcting non-planar region Methods and a system are disclosed for correcting a non-planar region during fabrication of a semiconductor product on a wafer. The invention separates an exposure of at least a portion of a fill pattern on a resist from a product exposure so that the fill pattern c... | 05/06/2008 |
