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| Number | Title | Issue Date |
| 7960217 | Gate controlled atomic switch The invention relates to a method for producing a switch element. The invention is characterised in that the switch element comprises three electrodes that are located in an electrolyte, two of which (source electrode and drain electrode) are interconnected by a bri... | 06/14/2011 |
| 7910410 | Integrated low leakage Schottky diode An integrated low leakage Schottky diode has a Schottky barrier junction proximate one side of an MOS gate with one end of a drift region on an opposite side of the gate. Below the Schottky metal and the gate oxide is a RESURF structure of an N− layer over a P− ... | 03/22/2011 |
| 7910409 | Bi-directional transistor with by-pass path and method therefor In one embodiment, a transistor is formed to have a first current flow path to selectively conduct current in both directions through the transistor and to have a second current flow path to selectively conduct current in one direction. ... | 03/22/2011 |
| 7754540 | Method of forming a SiGe DIAC ESD protection structure A diode for alternating current (DIAC) electrostatic discharge (ESD) protection circuit is formed in a silicon germanium (SiGe) hetrojunction bipolar transistor (HBT) process that utilizes a very thin collector region. ESD protection for a pair of to-be-protected pa... | 07/13/2010 |
| 7635614 | Double gate NLDMOS SCR device with controllable switching characteristics An NLDMOS SCR device based on an LDMOS fabrication process includes a dual gate to provide controllable switching characteristics to allow it to be used for ESD protection of fast switching voltage regulators. ... | 12/22/2009 |
| 7537970 | Bi-directional transistor with by-pass path and method therefor In one embodiment, a transistor is formed to have a first current flow path to selectively conduct current in both directions through the transistor and to have a second current flow path to selectively conduct current in one direction. ... | 05/26/2009 |
| 7537971 | Method for fabricating CMOS image sensor A method for fabricating a complementary metal-oxide semiconductor (CMOS) image sensor includes performing an ion implantation process onto a photodiode region in a first conductivity type semiconductor layer to form a second conductivity type first impurity region,... | 05/26/2009 |
| 7435628 | Method of forming a vertical MOS transistor A vertical MOS transistor has a source region, a channel region, and a drain region that are vertically stacked, and a trench that extends from the top surface of the drain region through the drain region, the channel region, and partially into the source region. Th... | 10/14/2008 |
| 7423298 | Bidirectional photothyristor chip, optical lighting coupler, and solid state relay Two operation channels CH1 and CH2 of a bidirectional photothyristor chip 31 are disposed away from each other so as not to intersect with each other. In between a P-gate diffusion region 23 on the left-hand side and a P-gate diffusion re... | 09/09/2008 |
| 7326596 | High voltage power device with low diffusion pipe resistance A method for forming a high voltage semiconductor power device comprises providing a first dopant source of first conductivity on an upper surface of a substrate of second conductivity. A second dopant source of first conductivity is provided on a lower surface of t... | 02/05/2008 |
| 7262442 | Triac operating in quadrants Q1 and Q4 A triac including on its front surface side an autonomous starting well of the first conductivity type containing a region of the second conductivity type arranged to divide it, in top view, into a first and a second well portion, the first portion being connected t... | 08/28/2007 |
| 7262443 | Silicide uniformity for lateral bipolar transistors Method and apparatus for forming a semiconductor device. The method includes defining a plurality of rows in a semiconductor layer. Thereafter, on one or more of the plurality of rows, one or more bipolar junction devices are formed. Each of the bipolar junction dev... | 08/28/2007 |
| 7195958 | Methods of fabricating ESD protection structures The present invention provides a novel ESD structure for protecting an integrated circuit (IC) from ESD damage and a method of fabricating the ESD structure on a semiconductor substrate. The ESD structure of the present invention has lower trigger voltage and lower ... | 03/27/2007 |
| 7179475 | Anhydrous topical skin preparations The present invention provides anhydrous compositions for topical delivery of a medicament comprising (A) a penetration enhancer/solvent selected from the group consisting of alcohol, propylene glycol, or a combination thereof; (B) a humectant/solvent selected from ... | 02/20/2007 |
| 7122408 | Photodiode with ultra-shallow junction for high quantum efficiency CMOS image sensor and method of formation A pinned photodiode with an ultra-shallow highly-doped surface layer of a first conductivity type and a method of formation are disclosed. The ultra-shallow highly-doped surface layer has a thickness of about 100 Angstroms to about 500 Angstroms and a dopant concent... | 10/17/2006 |
| 7122484 | Process for removing organic materials during formation of a metal interconnect A method for removing organic material from an opening in a low k dielectric layer and above a metal layer on a substrate is disclosed. An ozone water solution comprised of one or more additives such as hydroxylamine or an ammonium salt is applied as a spray or by i... | 10/17/2006 |
| 7115973 | Dual-sided semiconductor device with a resistive element that requires little silicon surface area A dual-sided semiconductor device is formed on a wafer with a resistive element that is formed through the wafer. By forming the resistive element through the wafer, a resistive element, such as a large resistive element, can be formed on the wafer that requires ver... | 10/03/2006 |
| 7092609 | Method to realize fast silicon-on-insulator (SOI) optical device A fast silicon-on-insulator (SOI) waveguide-based optical device enhanced with minority charge carrier lifetime modifiers enables faster modulation speeds in optical attenuators, optical intensity/phase-modulators, and optical switches whose operation principles are... | 08/15/2006 |
| 7037814 | Single mask control of doping levels In an integrated circuit, dopant concentration levels are adjusted by making use of a perforated mask. Doping levels for different regions across an integrated circuit can be differently defined by making use of varying size and spacings to the perforations in the m... | 05/02/2006 |
| 6964883 | Bi-directional silicon controlled rectifier for electrostatic discharge protection A bi-directional silicon controlled rectifier formed in a silicon layer and disposed over shallow trench isolations and therefore electrically isolated from the substrate to be insensitive to substrate noise for electrostatic discharge protection an electrostatic di... | 11/15/2005 |
| 6930010 | Method of forming a conductive structure in a semiconductor material A conductive structure provides a conductive path from a first region in a semiconductor material to a second spaced apart region in the semiconductor material by forming one or more trenches between the first and second regions, and implanting a dopant into the bot... | 08/16/2005 |
| 6806510 | Semiconductor device with surge protective component and method of manufacturing the semiconductor device In order to provide a reliable surge protective component with a straightforward manufacturing process, first and second buried layers are diffused over the entire inside surfaces of a semiconductor substrate, and first and second base layers are then diffused over ... | 10/19/2004 |
| 6576934 | Embedded SCR protection device for output and input pad An embedded SCR in conjunction with a Gated-NMOS is created for protecting a chip input or output pad from ESD, by inserting a p+ diffusion and the n-well in the drain side and a part of the drain to forms a low-trigger, high efficiency SCR. The device la... | 06/10/2003 |
| 6558984 | Trench schottky barrier rectifier and method of making the same A trench Schottky barrier and a method of making the same in which the rectifier has a semiconductor region having first and second opposing faces; the semiconductor region having a drift region of a first conductivity type adjacent the first face and a c... | 05/06/2003 |
| 6534365 | Method of fabricating TDMOS device using self-align technique A method of fabricating a vertical TDMOS power device using sidewall spacers and a self-align technique and a TDMOS power device of the same. The TDMOS is fabricated using only 3 masks and a source is formed using the self-align technique to embody a high... | 03/18/2003 |
| 6486501 | Component with rectifying function, fulfilled by means of charge transport by ions The invention relates to a component having a rectifying function, fulfilled by means of charge transfer by ions. To this end, the component is composed of multiple layers which have, successively, an asymmetric energy level course, and an electric field ... | 11/26/2002 |
| 6448160 | Method of fabricating power rectifier device to vary operating parameters and resulting device A semiconductor rectifying device which emulates the characteristics of a low forward voltage drop Schottky diode and which is capable of a variety of electrical characteristics from less than 1 A to greater than 1000 A current with adjustable breakdown v... | 09/10/2002 |
| 6259123 | High voltage power MOS device A switching device is described having a semiconductor substrate with a front side and a back side. The switching device includes a first transistor which includes a first region adjacent the front side, a second region within the first region, the semico... | 07/10/2001 |
| 6258634 | Method for manufacturing a dual-direction over-voltage and over-current IC protection device and its cell structure A two terminal ESD protection structure formed by an alternating arrangement of adjacent p-n-p-n-p semiconductor regions provides protection against both positive and negative ESD pulses. When an ESD pulse appears across the two terminals of the ESD prote... | 07/10/2001 |
| 6085396 | Manufacturing method for rectifying diodes A manufacturing method for rectifying diodes, wherein, a plurality of upper and lower pins are combined with a plurality of electronic chips to form a coarse blank. And then they are processed to form shaped insulating layers by molding. Each insulating l... | 07/11/2000 |
| 5970324 | Methods of making dual gated power electronic switching devices Methods for making semiconductor switching devices are disclosed. The switching device is designed and constructed to include, for example, a highly interdigitated cathode/gate structure on both sides of the chip. The semiconductor switching device can be... | 10/19/1999 |
| 5918114 | Method of forming vertical trench-gate semiconductor devices having self-aligned source and body regions Methods of forming vertical trench-gate semiconductor devices include the steps of patterning an oxidation resistant layer having an opening therein, on a face of a semiconductor substrate, and then forming a trench in the semiconductor substrate, opposit... | 06/29/1999 |
| 5851857 | High voltage power MOS device A switching device is described having a semiconductor substrate with a front side and a back side. The switching device includes a first transistor which includes a first region adjacent the front side, a second region within the first region, the semico... | 12/22/1998 |
| 5811330 | Method of fabricating an overvoltage protection device in integrated circuits An overvoltage protection device, for inclusion within an integrated circuit, which comprises at least two conductive elements separated by a gas filled gap.... | 09/22/1998 |
| 5569609 | Bidirectional Shockley diode A bidirectional Shockley diode includes an N-type layer sandwiched between two P-type layers. A first N-type region in the P-type region extends over substantially one half of the upper surface. A second N-type region extends in the P-type layer substanti... | 10/29/1996 |
| 5565367 | Protective device for an integrated circit and manufacturing method thereof A protective device for an integrated circuit and the manufacturing method thereof is disclosed in which a floating well is formed in a substrate by implanting first conductivity-type impurity into the substrate. The substrate is a second conductivity-typ... | 10/15/1996 |
| 5516705 | Method of forming four layer overvoltage protection device An overvoltage protection device having multiple shorting dots in the emitter region and multiple buried regions substantially aligned with these shorting dots. The placement, number, and area of these buried regions reduce and more accurately set the ove... | 05/14/1996 |
| 5429953 | Method of forming solid state suppressors with concave and diffused substitution regions This invention relates to an improved solid state suppressor and a method for making the same. Due to the fact that at least part of the substrate is substituted during fabrication of the suppressor, it is possible to produce a suppressor having a substra... | 07/04/1995 |
| 5312777 | Fabrication methods for bidirectional field emission devices and storage structures Bidirectional field emission devices (FEDs) and associated fabrication methods are described. A basic device includes a first unitary field emission structure and an adjacently positioned, second unitary field emission structure. The first unitary structu... | 05/17/1994 |
| 4914045 | Method of fabricating packaged TRIAC and trigger switch A two-terminal, bidirectional semiconductor trigger switch is provided. The trigger switch is a relatively sensitive multilayer semiconductor breakover device that switches on fully when its breakover voltage is reached. The design of the trigger switch a... | 04/03/1990 |
