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| Number | Title | Issue Date |
| 8034669 | Drive current adjustment for transistors formed in the same active region by locally providing embedded strain-inducing semiconductor material in the active region The drive current capability of a pull-down transistor and a pass transistor formed in a common active region may be adjusted on the basis of different strain levels obtained by providing at least one embedded semiconductor alloy in the active region, thereby provid... | 10/11/2011 |
| 7897439 | Electronic device with unique encoding An electronic device comprising a thin film transistor (TFT) array and manufacturing methods thereof according to various embodiments. Jet-printed material is deposited on selected partially formed transistors to form completed transistors. Thus, a selected number o... | 03/01/2011 |
| 7842557 | Nonvolatile storage device and method of manufacturing the same, and storage device and method of manufacturing the same A nonvolatile storage device includes a plurality of bit lines 21 arranged in a column direction on a substrate; a plurality of word lines 35 arranged in a row direction on the substrate; a memory cell array 20 having a plurality of memory cells... | 11/30/2010 |
| 7691683 | Electrode structures and method to form electrode structures that minimize electrode work function variation Electrode structures, variable resistance memory devices, and methods of making the same, which minimize electrode work function variation. Methods of forming an electrode having a minimized work function variation include methods of eliminating concentric circles o... | 04/06/2010 |
| 7638368 | Reverse blocking semiconductor device and a method for manufacturing the same A reverse blocking semiconductor device that shows no adverse effect of an isolation region on reverse recovery peak current, that has a breakdown withstanding structure exhibiting satisfactory soft recovery, that suppresses aggravation of reverse leakage current, w... | 12/29/2009 |
| 7488624 | Techniques for providing decoupling capacitance Techniques for electronic device fabrication are provided. In one aspect, an electronic device is provided. The electronic device comprises at least one interposer structure having one or more vias and a plurality of decoupling capacitors integrated therein, the at ... | 02/10/2009 |
| 7442605 | Resistively switching memory The present invention relates to a reproducible conditioning during the manufacturing of a resistively switching CBRAM memory cell comprising a first electrode and a second electrode with an active material positioned therebetween. The active material is adapted to ... | 10/28/2008 |
| 7442583 | Using electrically programmable fuses to hide architecture, prevent reverse engineering, and make a device inoperable Techniques and systems whereby operation of and/or access to particular features of an electronic device may be controlled after the device has left the control of the manufacturer are provided. The operation and/or access may be provided based on values stored in n... | 10/28/2008 |
| 7435627 | Techniques for providing decoupling capacitance Techniques for electronic device fabrication are provided. In one aspect, an electronic device is provided. The electronic device comprises at least one interposer structure having one or more vias and a plurality of decoupling capacitors integrated therein, the at ... | 10/14/2008 |
| 7429503 | Method of manufacturing well pick-up structure of non-volatile memory A method of manufacturing a well pick-up structure of a non-volatile memory is provided. A substrate including a first conductive type well, device isolation structures and dummy memory columns is provided. Each of the dummy memory columns includes a second conducti... | 09/30/2008 |
| 7425471 | Semiconductor structure processing using multiple laser beam spots spaced on-axis with cross-axis offset Methods and systems selectively irradiate structures on or within a semiconductor substrate using a plurality of laser beams. The structures are arranged in a row extending in a generally lengthwise direction. The method generates a first laser beam that propagates ... | 09/16/2008 |
| 7364951 | Nonvolatile semiconductor memory device and method for manufacturing the same A method for manufacturing a nonvolatile semiconductor memory device having a step of forming a first gate electrode on a peripheral circuit portion and a second gate electrode on a memory cell portion, a step of introducing impurity into the peripheral circuit port... | 04/29/2008 |
| 7348263 | Manufacturing method for electronic component, electronic component, and electronic equipment A manufacturing method for electronic device, includes: preparing a first substrate having a plurality of first regions; preparing a second substrate having a plurality of second regions; facing the first region and the second region each other, and connecting the f... | 03/25/2008 |
| 7337425 | Structured ASIC device with configurable die size and selectable embedded functions One embodiment of the present invention provides for a master or universal base and base tooling which addresses the general purpose Structured ASIC requirements. Another embodiment of the present invention provides for a common set of base tooling from which the ma... | 02/26/2008 |
| 7332379 | Method of an array of structures sensitive to ESD and structure made therefrom A method of fabricating an array of structures sensitive to ESD is disclosed. First, an array of structures is provided on a substrate, with the structures conductively coupled by interconnections. Thereafter, the interconnections are removed before fabricating anot... | 02/19/2008 |
| 7323395 | Manufacture of solid state electronic components The present invention concerns methodologies for the mass production of solid state components, in particular capacitors, although other component types including, but not limited to, diodes and resistors may be produced. According to one aspect of the method of man... | 01/29/2008 |
| 7316934 | Personalized hardware A system for personalizing one or more electrical circuits having plurality of layers with electrical characteristics. The layers being produced by an electrical characteristic determination process (ECDP). The system for personalizing includes a wafer stage for rec... | 01/08/2008 |
| 7303939 | Electro- and electroless plating of metal in the manufacture of PCRAM devices Non-volatile, resistance variable memory devices, integrated circuit elements, and methods of forming such devices are provided. According to one embodiment of a method of the invention, a memory device can be fabricated by depositing a chalcogenide material onto a ... | 12/04/2007 |
| 7300825 | Customizing back end of the line interconnects Custom connections between pairs of copper wires in a last damascene wiring level are effected by creating openings in an overlying insulating layer which span a distance between portions of the two wires, then filling the openings with aluminum. The openings can be... | 11/27/2007 |
| 7292066 | One-time programmable circuit exploiting BJT hdegradation A one-time programmable circuit uses forced BJT hFE degradation to permanently store digital information as a logic zero or logic one state. The forced degradation is accomplished by applying a voltage or current to the BJT for a specific time to the reve... | 11/06/2007 |
| 7287177 | Digital reliability monitor having autonomic repair and notification capability An integrated circuit, including: a pulse generator adapted to generate a pulsed signal; a cycle counter adapted to count cycles of the pulsed signal; one or more repairable circuit elements; and a repair processor adapted to repair a repairable circuit element when... | 10/23/2007 |
| 7282387 | Electro- and electroless plating of metal in the manufacture of PCRAM devices Non-volatile, resistance variable memory devices, integrated circuit elements, and methods of forming such devices are provided. According to one embodiment of a method of the invention, a memory device can be fabricated by depositing a chalcogenide material onto a ... | 10/16/2007 |
| 7269067 | Programming a memory device A method of programming a memory cell in a non-volatile memory device includes applying a first voltage to a control gate associated with the memory cell and applying a second voltage to a drain region associated with the memory cell. The method also includes applyi... | 09/11/2007 |
| 7264988 | Electro-and electroless plating of metal in the manufacture of PCRAM devices Non-volatile, resistance variable memory devices, integrated circuit elements, and methods of forming such devices are provided. According to one embodiment of a method of the invention, a memory device can be fabricated by depositing a chalcogenide material onto a ... | 09/04/2007 |
| 7259043 | Circular test pads on scribe street area A semiconductor wafer design and process having test pads (36) reducing cracks generated during the wafer saw process from extending into and damaging adjacent die. The present invention provides a plurality of circular test pads (36) in a wafer scribe... | 08/21/2007 |
| 7242080 | Semiconductor wafer with information protection function When the scribe region 2 is cut off, the dicing detector 53 sends the detection signal A to the changeover circuit 51 and electrically shuts off the pad 50 and the inspection objective circuit 52, and the fixed potential of the inp... | 07/10/2007 |
| 7235859 | Arrangement and process for protecting fuses/anti-fuses An arrangement for protecting fuses/anti-fuses on chips which serve to activate redundant circuits or chip functions includes a passivation layer (e.g., hard passivation) arranged on a fully processed chip with the exception of metal contacts of a metallization leve... | 06/26/2007 |
| 7232729 | Method for manufacturing a double bitline implant The present invention provides a method of fabricating a doped semiconductor region comprising selectively implanting a first impurity to form a shallow heavily doped region. The method further comprises selectively implanting the first impurity to also form a deep ... | 06/19/2007 |
| 7227169 | Programmable surface control devices and method of making same Programmable surface control devices whose physical features, such as surface characteristics and mass distribution, are controlled by the presence or absence of an electrodeposition of metal and/or metal ions from a solid solution upon application of a suitable ele... | 06/05/2007 |
| 7211819 | Damascene phase change memory A phase change material may include a pore formed of a relatively smaller phase change material and a relatively larger resistance heater. As a result, the relatively smaller portion of phase change material may have improved properties. ... | 05/01/2007 |
| 7208350 | Method and device for producing layout patterns of a semiconductor device having an even wafer surface Primitive cells, which are circuit patterns of the constituent elements of a semiconductor device, are arranged in the element formation area of a semiconductor device, and at least one fill cell with a diffusion layer and no wiring, is arranged in the vacant areas ... | 04/24/2007 |
| 7200831 | Semiconductor integrated circuit wiring design method and semiconductor integrated circuit The facility of operation in a manufacturing process and the reliability of the finished product can be improved by making a design based on two basic wiring pattern layers in which wiring traces are formed with regularity, and a basic via array layer inserted betwe... | 04/03/2007 |
| 7199444 | Memory device, programmable resistance memory cell and memory array A method of metal doping a chalcogenide material includes forming a metal over a substrate. A chalcogenide material is formed on the metal. Irradiating is conducted through the chalcogenide material to the metal effective to break a chalcogenide bond of the chalcoge... | 04/03/2007 |
| 7186571 | Method of fabricating a compositionally modulated electrode in a magnetic tunnel junction device A magnetic tunnel junction device with a compositionally modulated electrode and a method of fabricating a magnetic tunnel junction device with a compositionally modulated electrode are disclosed. An electrode in electrical communication with a data layer of the mag... | 03/06/2007 |
| 7183623 | Trimmed integrated circuits with fuse circuits A wafer containing integrated circuits having fuses which are selectively blown to trim circuit perimeters. The fuses are located adjacent scribe lanes, and fuse pads are located in the scribe lanes. The integrated circuits are trimmed by selectively energizing the ... | 02/27/2007 |
| 7176535 | Thin film transistor array gate electrode for liquid crystal display device The present invention discloses a TFT array substrate that is fabricated using a four-mask process and a method of manufacturing that TFT array substrate. The gate line and gate electrode of the array substrate is surrounded by the metallic oxide after finishing a f... | 02/13/2007 |
| 7161845 | Static random access memory device having a memory cell with multiple bit-elements A memory cell for a static random access memory (SRAM) is disclosed that can be programmed to have a one-bit cell or a multi-bit cell (i.e, including two or more latches) according to a desired amount of cell current. For lower current needs, the memory cell can inc... | 01/09/2007 |
| 7141995 | Semiconductor manufacturing device and semiconductor manufacturing method A semiconductor manufacturing device includes a prober whose needles are at once engaged for contacting pads of two chip forming regions within a wafer. In one chip forming region, trimming is performed, while in the other chip forming region, inspecting posterior t... | 11/28/2006 |
| 7119017 | Method for improving interlevel dielectric gap filling over semiconductor structures having high aspect ratios A novel sequence of process steps is provided for forming void-free interlevel dielectric layers between closely spaced gate electrodes. Closely spaced gate electrodes having sidewall spacers are formed on a substrate. After using the sidewall spacers to form self-a... | 10/10/2006 |
| 7112484 | Thin film diode integrated with chalcogenide memory cell An integrated programmable conductor memory cell and diode device in an integrated circuit comprises a diode and a glass electrolyte element, the glass electrolyte element having metal ions mixed or dissolved therein and being able to selectively form a conductive p... | 09/26/2006 |
