Did You Know...
...that the x-ray was discovered purely by accident? When German physicist Wilhelm Konrad von Roentgen was experimenting with cathode rays in 1895, he put an activated Crookes tube in a book and went out to lunch. When he returned, he discovered that a key that had also been placed in the book showed up as an image on the developed film!
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| Number | Title | Issue Date |
| 8012772 | Substrate treating apparatus, substrate treating method, and method for manufacturing high-voltage device A substrate treating apparatus, in which a voltage is applied to between a treatment electrode and a target substrate in such a state that the treatment electrode is opposed to the target substrate to thereby perform substrate treatment for removing undesired substa... | 09/06/2011 |
| 7425471 | Semiconductor structure processing using multiple laser beam spots spaced on-axis with cross-axis offset Methods and systems selectively irradiate structures on or within a semiconductor substrate using a plurality of laser beams. The structures are arranged in a row extending in a generally lengthwise direction. The method generates a first laser beam that propagates ... | 09/16/2008 |
| 7413988 | Method and apparatus for detecting planarization of metal films prior to clearing A method for planarizing a semiconductor substrate is provided. The method initiates with tracking a signal corresponding to a thickness of a conductive film disposed on the semiconductor substrate. Then, a second derivative is calculated from data representing the ... | 08/19/2008 |
| 7407861 | Method and system for high-speed, precise micromachining an array of devices A method and system for high-speed, precise micromachining an array of devices are disclosed wherein improved process throughput and accuracy, such as resistor trimming accuracy, are provided. The number of resistance measurements are limited by using non-measuremen... | 08/05/2008 |
| 7393701 | Method of adjusting buried resistor resistance Methods of adjusting a resistance of a buried resistor in a semiconductor are disclosed. In one aspect, the method includes using a silicidation blocking mask to define the buried resistor in the semiconductor; adjusting a size of the silicidation blocking mask to a... | 07/01/2008 |
| 7326610 | Process options of forming silicided metal gates for advanced CMOS devices Silicide is introduced into the gate region of a CMOS device through different process options for both conventional and replacement gate types processes. Placement of silicide in the gate itself, introduction of the silicide directly in contact with the gate dielec... | 02/05/2008 |
| 7262466 | Strained semiconductor-on-insulator structures and methods for making strained semiconductor-on-insulator structures The present invention relates to semiconductor-on-insulator structures having strained semiconductor layers. According to one embodiment of the invention, a semiconductor-on-insulator structure has a first layer including a semiconductor material, attached to a seco... | 08/28/2007 |
| 7258838 | Solid state molecular probe device A solid state nanopore device including two or more materials and a method for fabricating the same. The device includes a solid state insulating membrane having an exposed surface, a conductive material disposed on at least a portion of the exposed surface of the s... | 08/21/2007 |
| 7223615 | High emissivity capacitor structure The present invention is directed to controlling wafer temperature during rapid thermal processing. Regions and devices in an integrated circuit may be surrounded, inlayed, and overlaid with high absorptive structures to increase the average absorptivity of a region... | 05/29/2007 |
| 7220164 | Advanced finishing control An apparatus and method of using an in situ finishing information for finishing workpieces and semiconductor wafers are described. The method uses operative sensors such as friction sensors for detecting and improving control during finishing. The method can aid con... | 05/22/2007 |
| 7192846 | Methods and systems for processing a device, methods and systems for modeling same and the device A method and system for locally processing a predetermined microstructure formed on a substrate without causing undesirable changes in electrical or physical characteristics of the substrate or other structures formed on the substrate are provided. The method includ... | 03/20/2007 |
| 7156717 | situ finishing aid control A method of using finishing aids for advanced finishing control is described. A finishing surface is used generally to induce frictional wear. The finishing aids with preferred in situ control can improve control of the coefficient of friction, the tangential force ... | 01/02/2007 |
| 7131890 | In situ finishing control An apparatus and method of using a in situ finishing information for finishing semiconductor wafers is described. The method uses operative sensors such as friction sensors for detecting and improving control during finishing. The method can aid control of finishing... | 11/07/2006 |
| 7125729 | Method for opening the plastic housing of an electronic module In a method of opening of a housing of a plastic-housed electronic module by a laser, the electronic module is protected from the effects of the laser beam and the laser beam is stopped at a suitable time by providing an end point signal detection due to the laser b... | 10/24/2006 |
| 7105877 | Conductive line structure A conductive line Structure. In one embodiment of the invention, a conductive line includes at least two outer conductive portions, an inner conductive portion between the outer conductive portions, separated from the outer conductive portions by at least two trench... | 09/12/2006 |
| 7070476 | In-situ metalization monitoring using eddy current measurements during the process for removing the film A method for measuring conductance of a sample using an eddy current probe with a sensing coil. The method includes N repetitions of measuring first and second voltage pairs including in-phase and quadrature components of an induced AC voltage in the sensing coil, c... | 07/04/2006 |
| 7043830 | Method of forming conductive bumps A sealing layer is provided on the surface of a substrate such as a semiconductor wafer. The sealing layer includes apertures which expose external contact locations for semiconductor dice formed on the wafer. Solder paste is deposited in the apertures and reflowed ... | 05/16/2006 |
| 7029927 | Method of repairing an integrated electronic circuit using a formed electrical isolation A method of repairing a defect in an integrated electronic circuit caused by an incorrect lithographic mask includes the formation of an electrical isolation between two conducting parts of the circuit. The electrical isolation is obtained by at least partly filling... | 04/18/2006 |
| 7008300 | Advanced wafer refining A refining apparatus having magnetically responsive refining elements that can be smaller than the workpiece being refined are disclosed. The refining apparatus can supply a parallel refining motion to the refining element(s) through magnetic coupling forces. The re... | 03/07/2006 |
| 6991944 | Surface treatment for multi-layer wafers formed from layers of materials chosen from among semiconducting materials This invention relates to a process for treatment of a multi-layer wafer with materials having differential thermal characteristics, the process comprising a high temperature heat treatment step that can generate secondary defects, characterised in that this process... | 01/31/2006 |
| 6987053 | Method of evaluating reticle pattern overlay registration A method for evaluating reticle registration between two reticle patterns. A wafer is defined and etched to form a first exposure pattern, by photolithography with a first reticle having a first reticle pattern thereon. A photoresist layer is formed over the wafer a... | 01/17/2006 |
| 6954711 | Test substrate reclamation method and apparatus Test substrates used to test semiconductor fabrication tools are reclaimed by reading from a database the process steps performed on each test substrate and selecting a reclamation process from a plurality of reclamation processes, for reclaiming each test substrate... | 10/11/2005 |
| 6951995 | Method and system for high-speed, precise micromachining an array of devices A method and system for high-speed, precise micromachining an array of devices are disclosed wherein improved process throughput and accuracy, such as resistor trimming accuracy, are provided. The number of resistance measurements are limited by using non-measuremen... | 10/04/2005 |
| 6933245 | Method of forming a thin film with a low hydrogen content on a semiconductor device A method of forming a thin film with a low hydrogen contents is provided by positioning a substrate inside a processing chamber, and supplying reacting materials into the chamber, chemisorbing a portion of the reacting materials onto the substrate. Then, a nitrogen ... | 08/23/2005 |
| 6900459 | Apparatus for automatically positioning electronic dice within component packages A method and apparatus of assembling and disassembling semiconductor dice to be tested from the components of a temporary test package. A computer-controlled vision system is employed to align the dice with the temporary test package bases, and an automated robot ar... | 05/31/2005 |
| 6881592 | Method and device for minimizing multi-layer microscopic and macroscopic alignment errors A method of aligning a second layer to a first layer of a semiconductor structure by forming a first layer of a wafer having a distinguished feature via a first etching process that employs a first ionized gas generating machine. Forming a second layer having a circ... | 04/19/2005 |
| 6709980 | Using stabilizers in electroless solutions to inhibit plating of fuses The present invention relates to a method of forming a metal feature on an intermediate structure of a semiconductor device that comprises a first exposed metal structure and a second exposed metal structure. The metal feature is selectively formed on the first expo... | 03/23/2004 |
| 6703251 | Semiconductor wafer A plurality of IC chips each having an internal circuit are mounted on a wafer substrate. A plurality of scribe lines are formed on the wafer substrate for separating the IC chips from one another. A plurality of inspection pads are formed on the scribe l... | 03/09/2004 |
| 6660538 | Non-contacting deposition control of chalcopyrite thin films Chalcopyrite semiconductors, such as thin films of copper-indium-diselenide (CuInSe2), copper-gallium-diselenide (CuGaSe2), and Cu(Inx,Ga1-x)Se2, all of which are sometimes generically referred to as ... | 12/09/2003 |
| 6621264 | In-situ metalization monitoring using eddy current measurements during the process for removing the film A method for measuring conductance of a sample using an eddy current probe with a sensing coil. The method includes N repetitions of measuring first and second voltage pairs including in-phase and quadrature components of an induced AC voltage in the sens... | 09/16/2003 |
| 6553332 | Method for evaluating process chambers used for semiconductor manufacturing A process chamber (12) is used for plasma etching of a wafer (21) disposed therein. A gas mixture supplied to the chamber eventually passes through openings (28) in a baffle plate (27). After the chamber has been cleaned, several test wafers are etched un... | 04/22/2003 |
| 6492187 | Method for automatically positioning electronic die within component packages A method and apparatus of assembling and disassembling semiconductor dice to be tested from the components of a temporary test package. A computer-controlled vision system is employed to align the dice with the temporary test package bases, and an automat... | 12/10/2002 |
| 6433541 | In-situ metalization monitoring using eddy current measurements during the process for removing the film Disclosed is a method of obtaining information in-situ regarding a film of a sample using an eddy probe during a process for removing the film. The eddy probe has at least one sensing coil. An AC voltage is applied to the sensing coil(s) of the eddy probe... | 08/13/2002 |
| 6365421 | Method and apparatus for storage of test results within an integrated circuit An integrated circuit memory device has a plurality of nonvolatile programmable elements which are used to store a pass/fail status bit at selected milestones in a test sequence. At selected points in the test process an element may be programmed to indic... | 04/02/2002 |
| 6319420 | Method and apparatus for electrically endpointing a chemical-mechanical planarization process A method and apparatus for endpointing a planarization process of a microelectronic substrate. The apparatus can include a source of electrical power having first and second electrical contacts coupled to the microelectronic substrate to form a conductive... | 11/20/2001 |
| 6303396 | Substrate removal as a function of resistance at the back side of a semiconductor device A resistance monitoring approach is used for removing substrate from a back side of a semiconductor device. According to an example embodiment of the present invention, substrate is removed from a semiconductor device having a circuit side opposite the ba... | 10/16/2001 |
| 6294395 | Back side reactive ion etch Current reactive ion etching (RIE) techniques are not applicable to back side etching of semiconductor devices. According to an example embodiment, the present invention is directed to a method for analyzing a semiconductor device having a back side and a... | 09/25/2001 |
| 6265728 | Compound semiconductor device and method for controlling characteristics of the same A compound semiconductor device is formed having a plurality of FETs exhibiting the same electrode ratio of a difference between a surface area of the active region and the combined overlapping surface area of the source and drain ohmic electrodes to the ... | 07/24/2001 |
| 6228662 | Method for removing short-circuited sections of a solar cell A method for removing short circuits in thin film solar cell elements during manufacturing by applying a pseudo-alternating voltage between the substrate side and the back electrodes of the solar cell elements. The waveform of the pseudo-alternating volta... | 05/08/2001 |
| 6127237 | Etching end point detecting method based on junction current measurement and etching apparatus A pn junction is formed at a to-be-etched depth in an etching region of a semiconductor body and a reverse bias voltage is applied to the pn junction to form a depletion layer. Then, the semiconductor body is etched while monitoring the reverse bias curre... | 10/03/2000 |
