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| Number | Title | Issue Date |
| 6759266 | Quick sealing glass-lidded package fabrication method A method of forming an image sensor package includes wire bonding bond pads of an image sensor to interior traces on a substrate with bond wires. A first optically curable material is applied to enclose the bond wires. A second optically curable material is applied ... | 07/06/2004 |
| 6750082 | Method of assembling a package with an exposed die backside with and without a heatsink for flip-chip A method of assembling a package having an exposed die comprising the following steps. A die attached to a substrate by connectors is provided. The die having a backside. Encapsulate is formed around the die and over the backside of the die to form an encapsulated p... | 06/15/2004 |
| 6746899 | Tape stiffener, semiconductor device component assemblies including same, and stereolithographic methods for fabricating same Stiffeners for tapes, films, or other connective structures, which are configured to be secured to a semiconductor device component, such as a semiconductor die or substrate, by tape-automated bonding processes, are fabricated by stereolithographic processes and may... | 06/08/2004 |
| 6743664 | Flip-chip on flex for high performance packaging applications A method is provided including attaching an encapsulant to an integrated circuit (IC), forming a substrate from at least one layer of dielectric, attaching at least one electrical contact to the substrate, attaching a first surface of the substrate to the encapsulan... | 06/01/2004 |
| 6743069 | Facilitating the spread of encapsulant between surfaces of electronic devices An electronic device having an extensive narrow passageway may be effectively encapsulated by forming openings in one or more of the surfaces defining the encapsulation region. Encapsulation material may then be injected through these openings to fill a narrow, diff... | 06/01/2004 |
| 6740546 | Packaged microelectronic devices and methods for assembling microelectronic devices Packaged microelectronic devices and methods for assembling microelectronic devices are disclosed herein. In one embodiment, a method of assembling a microelectronic device having a die and an interposer substrate includes depositing a solder ball onto a ball-pad on... | 05/25/2004 |
| 6740411 | Embedding resin, wiring substrate using same and process for producing wiring substrate using same An embedding resin for embedding an electronic part in a wiring substrate, includes at least one of a soluble resin and a soluble organic filler as a soluble component to be dissolved with an oxidizing agent. ... | 05/25/2004 |
| 6740543 | Method and apparatus for encapsulating articles by stencil printing The present invention is a method and apparatus for encapsulating semiconductor dies and other devices using stencil printing techniques. The apparatus includes a pressurized vessel for containing encapsulation material, the apparatus having a head including a slot ... | 05/25/2004 |
| 6734045 | Lossy RF shield for integrated circuits A low-cost EMI shield that fits around an integrated circuit package to absorb electromagnetic energy and dissipate it as heat. The shield is not ohmically conductive so it may contact electrically active conductors without affecting the operation of the circuit. EM... | 05/11/2004 |
| 6730533 | Plastic packaging of LED arrays There is provided a flexible circuit module, including at least one rigid carrier, at least one solid state device mounted over a first side of the at least one rigid carrier, a flexible base supporting a second side of the at least one rigid carrier, a conductive i... | 05/04/2004 |
| 6720209 | Method for fabricating a circuit device A conductive plated layer 4 is formed after through holes 21 are formed in the insulation resin 2 by using an insulation resin sheet 1 overcoated on a single side of the conductive layer 3 with insulation resin 2. A multi-la... | 04/13/2004 |
| 6720205 | Electronic device and method of manufacturing the same, and electronic instrument After electrically connecting first interconnecting lines respectively to a first group of electrodes of an integrated circuit chip, second interconnecting lines are electrically connected to a second group of electrodes of the integrated circuit chip, respectively.... | 04/13/2004 |
| 6719871 | Method for bonding heat sinks to overmolds and device formed thereby A method for bonding heat sinks to packaged electronic components comprises the steps of: (a) exposing to a plasma a surface of a molded polymer formed on a substrate; (b) allowing the plasma to at least partially convert silicon-containing residue on the surface to... | 04/13/2004 |
| 6716670 | Method of forming a three-dimensional stacked semiconductor package device A three-dimensional stacked semiconductor package device includes first and second semiconductor package devices and a conductive bond. The first device includes a first insulative housing, a first semiconductor chip and a first conductive trace. The first insulativ... | 04/06/2004 |
| 6709899 | Methods of making microelectronic assemblies having conductive elastomeric posts A method of manufacturing a microelectronic assembly includes providing a first microelectronic element having a first surface and a plurality of terminals exposed at the first surface, providing a second microelectronic element having a top surface and a plurality ... | 03/23/2004 |
| 6709897 | Method of forming IC package having upward-facing chip cavity A method of forming an integrated circuit package with an upward-facing chip cavity such that the fabrication of the substrate and the packaging of silicon chip are combined. By forming a patterned dielectric layer to expose bonding pads on a silicon chip and subseq... | 03/23/2004 |
| 6709895 | Packaged microelectronic elements with enhanced thermal conduction A semiconductor chip is mounted in face-up disposition on a dielectric element, with thermally conductive but flexible elements disposed between the chip bottom surface and the top surface of the dielectric element so as to provide a compliant but thermally conducti... | 03/23/2004 |
| 6709894 | Semiconductor package and method for fabricating the same A semiconductor package and a fabrication method thereof are provided. A plurality of first chips are mounted on and electrically connected to a substrate plate. A shielding structure including a shielding portion and a supporting portion is mounted on the substrate... | 03/23/2004 |
| 6706565 | Methods of forming an integrated circuit device The present invention includes integrated circuit devices, synchronous-link dynamic random access memory devices, methods of forming an integrated circuit device and methods of forming a synchronous-link dynamic random access memory edge-mounted device. According to... | 03/16/2004 |
| 6706564 | Method for fabricating semiconductor package and semiconductor package A method of fabricating a semiconductor package is disclosed in which a first Ni—Au plating is formed on a bonding pad for connection with a semiconductor chip, without a mechanical process or a masking operation. The method applies a copper plating on a through b... | 03/16/2004 |
| 6706563 | Heat spreader interconnect methodology for thermally enhanced PBGA packages A new method is provided for the interface between a heat spreader and the substrate of a thermally improved PBGA package. The heat spreader interfaces with the substrate with the standoff of the heat spreader. The stand-off of the heat spreader is provided with an ... | 03/16/2004 |
| 6699731 | Substrate of semiconductor package A fabricating method for a semiconductor package is proposed, in which a chip carrier accommodates at least one semiconductor chip, which is attached with an interface layer formed on a covering module plate consisting of at least one covering plate, whil... | 03/02/2004 |
| 6696305 | Metal post manufacturing method A method of forming metal posts. A fixture having an array of wire guide heads is provided. A conductive wire is threaded through a hole in each wire guide heads. The wire guide heads have a transient electric arcing mechanism for heating the conductive w... | 02/24/2004 |
| 6692993 | Windowed non-ceramic package having embedded frame An integrated circuit (IC) package includes a mold compound, a die, and a window. The mold compound has a frame embedded within it. The frame has a coefficient of thermal expansion that is less than the mold compound. The IC package is capable of being at... | 02/17/2004 |
| 6692991 | Resin-encapsulated semiconductor device and method for manufacturing the same The resin-encapsulated semiconductor device of the present invention includes: a die pad provided by thinning a lower portion of a lead frame; a semiconductor chip mounted on the die pad; a plurality of leads provided by thinning an upper portion of the l... | 02/17/2004 |
| 6692988 | Method of fabricating a substrate-based semiconductor package without mold flash A method is proposed for fabricating a substrate-based semiconductor package without mold flash. The proposed method is characterized by the provision of one or more dummy traces between each overly-spaced pair of signal traces that might cause mold flash... | 02/17/2004 |
| 6692987 | BOC BGA package for die with I-shaped bond pad layout Semiconductor die units for forming BOC BGA packages, methods of encapsulating a semiconductor die unit, a mold for use in the method, and resulting encapsulated packages are provided. In particular, the invention provides a semiconductor die unit compris... | 02/17/2004 |
| 6689636 | Semiconductor device and fabrication method of the same A semiconductor device and a fabrication method of the same are proposed, in which at least one electronic component is firstly mounted on a first substrate, and then the first substrate is attached onto a semiconductor chip or a second substrate. Further... | 02/10/2004 |
| 6682957 | Semiconductor substrate and land grid array semiconductor package using same and fabrication methods thereof A land grid array (LGA) type semiconductor chip package includes an insulation body having a plurality of first conductive interconnections embedded therein. A cavity is formed in an upper portion of the insulation body. A plurality of first conductive in... | 01/27/2004 |
| 6680531 | Multi-chip semiconductor package A multi-chip semiconductor package is proposed, in which a lead frame is formed with a chip carrier that consists of at least one supporting frame and a plurality of downwardly extending portions integrally formed with the supporting frame. As the chip ca... | 01/20/2004 |
| 6677681 | Carrier substrate and carrier assembly using residual organic compounds to facilitate gate break An encapsulant molding technique used in chip-on-board encapsulation wherein a residual organic compound layer on the surface of a substrate is used to facilitate removal of unwanted encapsulant material. An organic compound layer which inherently forms o... | 01/13/2004 |
| 6677179 | Method of applying no-flow underfill A new method has been developed to provide underfill to chips mounted on substrates. First, an underfill is dispensed on the substrate. Second, the bumps of the chip are dipped in a flux that does not contain filler. Third, the chip that has been dipped i... | 01/13/2004 |
| 6667191 | Chip scale integrated circuit package An integrated circuit package including a silicon wafer, a plate of intermetallic compound fixed to the back surface of the silicon wafer and a plurality of solder ball contacts. The solder ball contacts are in electrical connection with die circuitry on ... | 12/23/2003 |
| 6664646 | Chip-on-board assemblies, carrier assemblies and carrier substrates using residual organic compounds to facilitate gate break An encapsulant molding technique used in chip-on-board encapsulation wherein a residual organic compound layer on the surface of a substrate is used to facilitate removal of unwanted encapsulant material. An organic compound layer which inherently forms o... | 12/16/2003 |
| 6664138 | Method for fabricating a circuit device A method for fabricating a circuit device is provided. An insulation resin sheet having the first conductive layer 3 and the second conductive layer 4 adhered to each other by insulation resin 2 is used, the first conductive path layer 5 is formed by the ... | 12/16/2003 |
| 6664137 | Methods and structures for reducing lateral diffusion through cooperative barrier layers A covered substrate is described, which comprises: (a) a flexible substrate layer; and (b) a plurality of cooperative barrier layers disposed on the substrate layer. The plurality of cooperative barrier layers further comprise one or more planarizing laye... | 12/16/2003 |
| 6660943 | Underfilling material for semiconductor package An underfilling material for a semiconductor package holding semiconductor elements on a carrier substrate mounted on a circuit board, containing a one-pack type thermosetting urethane composition which preferably comprises a urethane prepolymer having a ... | 12/09/2003 |
| 6660559 | Method of making a chip carrier package using laser ablation A chip carrier package is made by using a laser-ablatable solder mask to cover areas of conductive traces on the surface of a substrate that were left uncovered during conventional processes using photoresist. These areas of the conductive traces are unco... | 12/09/2003 |
| 6656769 | Method and apparatus for distributing mold material in a mold for packaging microelectronic devices A method and apparatus for distributing a mold material in a mold for packaging microelectronic devices. In one embodiment, the microelectronic devices are placed on a substrate and the substrate is at least partially enclosed by the device region of a mo... | 12/02/2003 |
| 6656765 | Fabricating very thin chip size semiconductor packages A method for fabricating LGA-, LCCY- and BGA-types of very thin, chip size semi-conductor packages ("VCSP's") includes substantially reducing the thickness of a semiconductor wafer containing the semiconductor chips to be packaged by grinding and/or etchi... | 12/02/2003 |
