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| Number | Title | Issue Date |
| 8168477 | Packaging configurations for vertical electronic devices using conductive traces disposed on laminated board layers This invention discloses an electronic package for containing a vertical semiconductor chip that includes a laminated board having a via connector and conductive traces distributed on multiple layers of the laminated board connected to the via connector. The semicon... | 05/01/2012 |
| 8168476 | Interconnects for packaged semiconductor devices and methods for manufacturing such devices Packaged semiconductor devices and assemblies including interconnects and methods for forming such interconnects are disclosed herein. One embodiment of a packaged semiconductor assembly includes a die attached to a support layer. A plurality of interconnects are em... | 05/01/2012 |
| 8158462 | Light emitting device and manufacture method thereof A manufacture method of a light emitting device is provided. Firstly, at least one circuit board is provided. A plurality of light emitting packages, a first undetermined power input end and a second undetermined power input end are disposed at the circuit board. Th... | 04/17/2012 |
| 8158461 | Continuously referencing signals over multiple layers in laminate packages A mechanism for continuously referencing signals over multiple layers in laminate packages provides a continuous path for signals from one layer to another while using the ideal voltage reference for all areas of the package and still avoiding discontinuities in the... | 04/17/2012 |
| 8143109 | Method for fabricating damascene interconnect structure having air gaps between metal lines An exemplary method for fabricating a damascene interconnect structure includes the following. First, providing a substrate. Second, depositing a multilayer dielectric film on the substrate. Third, forming a patterned photoresist on the multilayer dielectric film. F... | 03/27/2012 |
| 8143108 | Semiconductor device and method of dissipating heat from thin package-on-package mounted to substrate A semiconductor device has a first substrate with a central region. A plurality of bumps is formed around a periphery of the central region of the first substrate. A first semiconductor die is mounted to the central region of the first substrate. A second semiconduc... | 03/27/2012 |
| 8088651 | System and method for providing access to an encapsulated device A method for providing access to a feature on a device wafer, and located outside an encapsulation region is described. The method includes forming a cavity in the lid wafer, aligning the lid wafer with the device wafer so that the cavity is located substantially ab... | 01/03/2012 |
| 8039320 | Optimized circuit design layout for high performance ball grid array packages A method of laying out traces for connection of bond pads of a semiconductor chip to a printed wiring board or the like and the layout. There is provided a substrate having top and bottom surfaces with a plurality of rows and columns of vias extending therethrough f... | 10/18/2011 |
| 8034666 | Multi-layer thick-film RF package A method for producing a multi-layer thick-film RF package includes forming conductive layer(s) including one or more source portions, one or more gate portions, and/or one or more drain portions on a ceramic substrate. The conductive layer(s) and the ceramic substr... | 10/11/2011 |
| 8030137 | Flexible interposer for stacking semiconductor chips and connecting same to substrate A semiconductor device with a first (101) and a second (111) semiconductor chip assembled on an insulating flexible interposer (120). The interposer, preferably about 25 to 50 μm thick, has conductive traces (121), a central planar recta... | 10/04/2011 |
| 8021931 | Direct via wire bonding and method of assembling the same A method for electrically connecting an integrated circuit to a via in a substrate is disclosed. The method can include deforming a ball over the via to form a bump and attaching a bond wire to the bump. The method also can include attaching the bond wire to the int... | 09/20/2011 |
| 8021932 | Semiconductor device, and manufacturing method therefor To provide a semiconductor device with improved reliability. The semiconductor device includes a wiring board, a microcomputer chip flip-chip bonded over the wiring board via gold bumps, a first memory chip laminated over the microcomputer chip, wires for coupling t... | 09/20/2011 |
| 7998797 | Semiconductor device A method of assembling a semiconductor device includes providing a chip attached to an elastic carrier, and supporting the elastic carrier with a stiffener. The method additionally includes removing the stiffener from the elastic carrier after attaching the elastic ... | 08/16/2011 |
| 7977163 | Embedded electronic component package fabrication method A method of forming an embedded electronic component package includes coupling a substrate to a first dielectric layer, strip, or panel, and forming first electrically conductive vias and traces in the first dielectric layer. A cavity is then formed in the first die... | 07/12/2011 |
| 7977162 | Semiconductor device, method for the same, and heat radiator A semiconductor device includes a semiconductor chip, and a multicomponent alloy layer formed on a face of the semiconductor chip, the multicomponent alloy layer being in a solid-liquid coexisting state in a specific temperature range, and including a surface having... | 07/12/2011 |
| 7972906 | Semiconductor die package including exposed connections A clip structure and semiconductor die package. The clip structure includes a first portion and a second portion, with a connecting structure located between the first and second portion. The clip structure is substantially planar. The semiconductor die package incl... | 07/05/2011 |
| 7955904 | Lens support and wirebond protector A wirebond protector has an elongated shape that corresponds to the elongated array of wirebonds along the edge of a microelectronic device that connect a semiconductor die to electrical conductors on a substrate. In making the microelectronic device with wirebond p... | 06/07/2011 |
| 7955903 | Method of suppressing overflowing of an encapsulation resin in a semiconductor module A semiconductor module includes a semiconductor chip sealed with an encapsulation resin prevented from overflowing from an inside of the outer edge by a wiring pattern extended portion extending from the wiring pattern along an outer edge of a solder resist pattern ... | 06/07/2011 |
| 7915088 | Wiring board manufacturing method, semiconductor device manufacturing method and wiring board A semiconductor device 100 has such a structure that a semiconductor chip 110 is flip-chip mounted on a wiring board 120. The wiring board 120 has a multilayer structure in which a plurality of wiring layers and a plurality of insulating ... | 03/29/2011 |
| 7901998 | Packaging substrate having pattern-matched metal layers A pattern matched pair of a front metal interconnect layer and a back metal interconnect layer having matched thermal expansion coefficients are provided for a reduced warp packaging substrate. Metal interconnect layers containing a high density of wiring and comple... | 03/08/2011 |
| 7901997 | Method of manufacturing semiconductor device A solder 14 is formed, by a plating method, on a connecting surface 21A and a side surface 21B in a connecting pad 21 of a wiring board 11 which is opposed to a metal bump 13 formed on an electrode pad 31 of a semicon... | 03/08/2011 |
| 7897438 | Method of making semiconductor package with plated connection A semiconductor package and method for making a semiconductor package are disclosed. The semiconductor package has a top surface and a mounting surface and includes a die, a conducting connecting material, a plating material and an insulating material. The die has a... | 03/01/2011 |
| 7888188 | Method of fabicating a microelectronic die having a curved surface Microelectronic devices and methods for manufacturing microelectronic devices are disclosed herein. In one embodiment, a device includes a support member and a flexed microelectronic die mounted to the support member. The flexed microelectronic die has a plurality o... | 02/15/2011 |
| 7888187 | Element mounting substrate and method for manufacturing same An element-mounting substrate includes a ceramic substrate, an electrode layer formed on the substrate and a ceramic coating layer which is formed on a part of the electrode layer and has a thickness of 5 to 50 μm. A process for producing the element-mounting subst... | 02/15/2011 |
| 7879656 | Multilayer substrate and method of manufacturing the same A multilayer substrate includes an insulating base member having a plurality of resin films, an electric element embedded in the insulating base member, and a spacer. The resin films are made of a thermoplastic resin and stacked and attached to each other. At least ... | 02/01/2011 |
| 7851269 | Method of stiffening coreless package substrate Embodiments of the present invention relate to a method of stiffening a semiconductor coreless package substrate to improve rigidity and resistance against warpage. An embodiment of the method comprises disposing a sacrificial mask on a plurality of contact pads on ... | 12/14/2010 |
| 7820490 | Method for LTCC circuitry An LTCC (low temperature cofired ceramic) structure which has conductors to which leads are to be bonded for connection to external circuitry. The conductors include additives to promote adhesion to the ceramic layer. The presence of these additives degrade bonding ... | 10/26/2010 |
| 7799614 | Method of fabricating a power electronic device An electronic device and method is disclosed. In one embodiment, a method includes providing an electrically insulating substrate. A first electrically conductive layer is applied over the electrically insulating substrate. A first semiconductor chip is placed over ... | 09/21/2010 |
| 7772045 | Wire bond method for angularly disposed conductive pads and a device made from the method A method and device relating the electrical interconnection of angularly disposed conductive is disclosed. Conventional wire bonding equipment is used to apply a wire ball on a first conductive surface in an electronic assembly. A conductive wire is drawn up vertica... | 08/10/2010 |
| 7754538 | Packaging substrate structure with electronic components embedded therein and method for manufacturing the same A packaging substrate structure with electronic components embedded therein and a method for manufacturing the same are disclosed. The packaging substrate structure comprises: a core board; a built-up structure disposed on at least one surface of the core board, whe... | 07/13/2010 |
| 7749814 | Semiconductor device with integrated passive circuit and method of making the same using sacrificial substrate A semiconductor device is made by providing a sacrificial substrate, forming a first insulating layer over the sacrificial substrate, forming a first passivation layer over the first insulating layer, forming a second insulating layer over the first passivation laye... | 07/06/2010 |
| 7749813 | Circuit board for direct flip chip attachment A packaging method comprises: forming a circuit board by forming a substantially continuous conductive layer on an insulating board and removing selected portions of the continuous conductive layer to define an electrically conductive trace; laser cutting the electr... | 07/06/2010 |
| 7741162 | Method for manufacturing high-frequency module device This invention is a method for manufacturing a high-frequency module device. A high-frequency circuit unit (2) in which first to third unit wiring layers (5) to (7), each having a capacitor (12) or the like at a part, are stacked and form... | 06/22/2010 |
| 7732260 | Semiconductor device power interconnect striping A method and an apparatus for improving the delivery and filtering of power to a semiconductor device is disclosed by organizing out interconnects (pins, balls, pads or other interconnects) used to carry power in a striped configuration that shortens the conductive ... | 06/08/2010 |
| 7727818 | Substrate process for an embedded component A first dielectric layer is formed on a mold having a surface and protruding components and covers the protruding components. At least one electronic component having an active surface, a back surface, and contacts formed on the active surface is disposed on the fir... | 06/01/2010 |
| 7723164 | Dual heat spreader panel assembly method for bumpless die-attach packages, packages containing same, and systems containing same A process includes mating a first heat spreader and a second heat spreader, such that the first heat spreader at a mating surface and second heat spreader at a mating surface become parallel and adjacent. The process includes placing a first die in a first die reces... | 05/25/2010 |
| 7704799 | Method of manufacturing wiring substrate A wiring substrate (1) comprises an insulating base (10) with connection holes (11), buried conductors (12) provided in the connection holes (11) without reaching a rear surface of the insulating base (10), and wiring layers... | 04/27/2010 |
| 7670880 | Method and structure for forming an integrated spatial light modulator A method of fabricating an integrated spatial light modulator. The method includes providing a first substrate including a bonding surface and processing a device substrate to form at least an electrode layer. The method also includes depositing a first portion of a... | 03/02/2010 |
| 7662673 | Semiconductor device and method of manufacturing the same, electronic device and method of manufacturing the same, and electronic instrument A semiconductor device including: a semiconductor substrate in which an integrated circuit is formed; an insulating layer formed on the semiconductor substrate and having a first surface and a second surface which is higher than the first surface; a first electrode ... | 02/16/2010 |
| 7659150 | Microshells for multi-level vacuum cavities Microshells for encapsulation of devices such as MEMS and microelectronics. In an embodiment, the microshells include a planar perforated pre-sealing layer, below which a non-planar sacrificial layer is accessed, and a sealing layer to close the perforation in the p... | 02/09/2010 |
