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A self defense weapon formed as a memo pad and which is easily held by a person's fingers, therefore making it possible to provide protection from a mugger and also to quickly and easily write a record or a message without failure of missing or forgetting significant information under a stressful situation.
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| Number | Title | Issue Date |
| 7256072 | Semiconductor device, electronic device, electronic apparatus, and method of manufacturing semiconductor device A method is provided to suppress detachment between semiconductor packages while preventing dislocation at the time of mounting a stacked semiconductor package on a motherboard. Semiconductor packages PK1 and PK2 are bonded to each other through protru... | 08/14/2007 |
| 7256483 | Package-integrated thin film LED LED epitaxial layers (n-type, p-type, and active layers) are grown on a substrate. For each die, the n and p layers are electrically bonded to a package substrate that extends beyond the boundaries of the LED die such that the LED layers are between the package subs... | 08/14/2007 |
| 7256068 | Semiconductor package assembly and method for electrically isolating modules A semiconductor package assembly and method for electrically isolating modules, having a capacitor within the semiconductor package assembly. The package assembly and method are suitable for electrically isolating modules according to IEEE 1394. ... | 08/14/2007 |
| 7252515 | Non-oriented wire in elastomer electrical contact A method and apparatus for interconnecting an electronic module to a substrate through resilient wire conductors in an interposer arrangement. A carrier layer of insulating material with an array of apertures, arranged to align with both the electrical pads on an el... | 08/07/2007 |
| 7251872 | Method for forming a chip package A chip package is formed which has an array of leads, wherein successive leads are staggered in all three dimensions (X, Y, and Z) relative to one another to permit a large number of leads available in a confined space while maintaining the minimum separation necess... | 08/07/2007 |
| 7253506 | Micro lead frame package The present invention comprises a lead frame substrate adapted to receive semiconductor die and multiple passive components. The lead frame substrate is preferably formed from a single piece of electrically conductive material, such as copper, and may be mounted wit... | 08/07/2007 |
| 7253026 | Ultra-thin semiconductor package device and method for manufacturing the same An ultra-thin semiconductor package includes a lead frame having a die pad and a plurality of leads surrounding the die pad. The die pad includes a chip attaching part to which a semiconductor chip is attached and a peripheral part integral with and surrounding the ... | 08/07/2007 |
| 7250324 | Method for manufacturing an image sensor A method for manufacturing an image sensor includes the steps of: providing a substrate having an upper surface and a lower surface; mounting a frame layer on the upper surface of the substrate to form a cavity together with the substrate; mounting a photosensitive ... | 07/31/2007 |
| 7250685 | Etched leadframe flipchip package system The present invention provides an etched leadframe flipchip package system comprising forming a leadframe comprises forming contact leads and etching a plurality of multiple dotted grooves on the contact leads, and attaching a flipchip integrated circuit having sold... | 07/31/2007 |
| 7250671 | Lead frame and method for manufacturing semiconductor package with the same Provided is a method for manufacturing a lead frame and a semiconductor package having a semiconductor chip for connecting to an outer board and having a base metal layer formed of iron and nickel as main elements. The method includes preparing the base metal layer ... | 07/31/2007 |
| 7247526 | Process for fabricating an integrated circuit package A process for fabricating an integrated circuit package. At least a first side of a leadframe strip is selectively etched to define portions of a die attach pad and at least one row of contacts adjacent the die attach pad. A carrier strip is laminated to the first s... | 07/24/2007 |
| 7247934 | Multi-chip semiconductor package A multi-chip semiconductor package and a fabrication method thereof are provided. At least one first chip is mounted on and electrically connected to an upper surface of a substrate via solder bumps. A preformed package structure having a second chip and a first enc... | 07/24/2007 |
| 7247522 | Semiconductor device In order to provide a semiconductor device which makes it possible to mount a semiconductor element on the substrate of the semiconductor device main body at the correct position with a higher degree of accuracy, a semiconductor element 2 is mounted at a circ... | 07/24/2007 |
| 7247520 | Microelectronic component assemblies and microelectronic component lead frame structures The present invention provides microelectronic component assemblies and lead frame structures that may be useful in such assemblies. For example, one such lead frame structure may include a set of leads extending in a first direction and a dam bar. Each of the leads... | 07/24/2007 |
| 7247951 | Chip carrier with oxidation protection layer A chip carrier comprising a laminated layer and an oxidation protection layer is provided. The oxidation protection layer is a non-electrolytic metallic coating or an organic oxidation protection film on the surface of bonding finger pads or other contacts formed by... | 07/24/2007 |
| 7247950 | Semiconductor device and method of manufacturing the same A semiconductor device comprises a frame provided on a substrate to form a semiconductor-chip accommodating part on the substrate. A semiconductor chip is provided in the semiconductor-chip accommodating part. An organic insulating layer is provided to cover the sem... | 07/24/2007 |
| 7245023 | Semiconductor chip assembly with solder-attached ground plane A semiconductor chip assembly includes a semiconductor chip that includes a conductive pad, a conductive trace that includes a pillar and a routing line, a solder joint and a ground plane. The pillar extends into an opening in the ground plane, the solder joint cont... | 07/17/2007 |
| 7245006 | Palladium-spot leadframes for high adhesion semiconductor devices and method of fabrication A leadframe for use in the assembly of integrated circuit chips comprising a base metal structure having an adherent layer of nickel covering said base metal; an adherent film of palladium on said nickel layer; and an adherent layer of palladium on said palladium fi... | 07/17/2007 |
| 7241680 | Electronic packaging using conductive interposer connector Formation of a plurality of conductive connectors of an integrated circuit package is described. The conductive connectors made with a conductive elastomer material and formed using an interposer that includes a plurality of the conductive connectors linked together... | 07/10/2007 |
| 7242033 | Semiconductor device using LED chip A semiconductor device includes an insulating substrate 2 having an obverse surface formed with a die pad 3, a rectangular semiconductor chip 7 such as an LED chip bonded to the die pad with a die bonding material 10, and a molded portion... | 07/10/2007 |
| 7241414 | Method and apparatus for molding a semiconductor device A method and apparatus is provided for molding a semiconductor device in a mold including two mold halves. One mold half includes a compressible sealing mechanism constructed and configured to exert a sealing pressure between a surface of the mold half and a surface... | 07/10/2007 |
| 7238547 | Packaging integrated circuits for accelerated detection of transient particle induced soft error rates An IC device is packaged for accelerated transient particle emission by doping the underfill thereof with a transient-particle-emitting material having a predetermined, substantially constant emission rate. The emission rate may be tunable. In one aspect, a radioact... | 07/03/2007 |
| 7238549 | Surface-mounting semiconductor device and method of making the same A semiconductor device X1 comprises: a first conductor 110 including a first terminal surface 113a; a second conductor 120 placed by the first conductor 110 and including a second terminal surface 123a facing a... | 07/03/2007 |
| 7238551 | Method of fabricating semiconductor package including die interposed between cup-shaped lead frame having mesas and valleys A semiconductor package includes a die that is interposed, flip-chip style, between an upper lead frame and a lower lead frame. The lower lead frame has contacts that are aligned with terminals on the bottom surface of the die. The upper lead frame contacts a termin... | 07/03/2007 |
| 7238543 | Methods for marking a bare semiconductor die including applying a tape having energy-markable properties A method used for marking a semiconductor wafer or device. The method and apparatus have particular application to wafers or devices which have been subjected to a thinning process, including backgrinding in particular. The present method comprises reducing the cros... | 07/03/2007 |
| 7235868 | Lead frame and its manufacturing method A leadframe is plated with palladium only to a surface of a metal plate on which semiconductors elements are to be mounted and a surface of the metal plate to be placed on a substrate, and is not plated with palladium to lead portions, pad portions, other portions e... | 06/26/2007 |
| 7232706 | Method of making a semiconductor chip assembly with a precision-formed metal pillar A method of making a semiconductor chip assembly includes providing a metal base, a routing line and a pillar etch mask that extends into a trench, mechanically attaching a semiconductor chip to the routing line, forming a connection joint that electrically connects... | 06/19/2007 |
| 7232707 | Method of making a semiconductor chip assembly with an interlocked contact terminal A method of making a semiconductor chip assembly includes providing a metal base, a routing line and a pillar etch mask that extends into a trench, mechanically attaching a semiconductor chip to the routing line, forming a connection joint that electrically connects... | 06/19/2007 |
| 7230323 | Ground-enhanced semiconductor package and lead frame for the same A ground-enhanced semiconductor package and a lead frame used in the package are provided. The semiconductor package includes a lead frame having a die pad, a plurality of tie bars connected with and supporting the die pad, a plurality of leads surrounding the die p... | 06/12/2007 |
| 7230322 | Semiconductor device and method of manufacturing the same A semiconductor device is provided including a semiconductor element having a plurality of electrodes, a plurality of bonding portions of a lead frame, a plate-like current path material which electrically connects at least one of the plurality of electrodes and one... | 06/12/2007 |
| 7229855 | Process for assembling a double-sided circuit component A process for producing a circuit component having a double-sided circuit device between a pair of substrates. The process entails depositing a solder material on contact areas on surfaces of the substrates, placing a first of the substrates within a cavity in a rec... | 06/12/2007 |
| 7230321 | Integrated circuit package with laminated power cell having coplanar electrode An electrode that includes an electrically conductive, substantially planar body having a first thickness and a junction area, wherein the junction area is configured to receive a solid state power cell having a second thickness. The electrode also includes an arcua... | 06/12/2007 |
| 7229846 | Semiconductor package having an optical device and a method of making the same The present invention relates to a semiconductor package having an optical device and a method of making the same. The package comprises a chip, an upper metal redistribution layer, a transparent insulating layer, and a lower metal redistribution layer. The chip has... | 06/12/2007 |
| 7226821 | Flip chip die assembly using thin flexible substrates Apparatus and methods for flattening thin substrate surfaces by stretching thin flexible substrates to which ICs can be bonded. Various embodiments beneficially maintain the substrate flatness during the assembly process through singulation. According to one embodim... | 06/05/2007 |
| 7227249 | Three-dimensional stacked semiconductor package with chips on opposite sides of lead A three-dimensional stacked semiconductor package includes first and second chips, first and second adhesives, first and second wire bonds, a lead and an encapsulant. The chips are disposed on opposite sides of the lead, and the wire bonds contact the same side of t... | 06/05/2007 |
| 7226813 | Semiconductor package A semiconductor package is provided which includes a semiconductor die which is formed in a die mounting area of a substrate. The die mounting area includes a frame with an opening formed therein, a die paddle, and a descending portion which connects the die paddle ... | 06/05/2007 |
| 7224057 | Thermal enhance package with universal heat spreader A thermal enhance semiconductor package with a universal heat spreader mainly comprises a carrier, a semiconductor chip and a universal heat spreader. The semiconductor chip is electrically connected to the carrier in a flip-chip fashion and the universal heat sprea... | 05/29/2007 |
| 7222737 | Die sorter with reduced mean time to convert An adapter frame has channels that hold multiple die carriers in each channel. The die carriers, such as 2″×2″ or 4″×4″ waffle packs or GEL-PAK die carriers, slide into the channels and are secured by a spring clip retention mechanism. In other embodiments... | 05/29/2007 |
| 7223631 | Windowed package having embedded frame An integrated circuit (IC) package includes a mold compound, a die, and a window. The mold compound has a frame embedded within it. The frame has a top surface, a bottom surface, and a top-to-bottom opening therein. The die is attached to the mold compound, wherein ... | 05/29/2007 |
| 7220623 | Method for manufacturing silicide and semiconductor with the silicide The present invention is directed to a method of manufacturing silicide used to reduce a contact resistance at a contact of a semiconductor device and a semiconductor device with the silicide manufactured by the same method. The method comprises the steps of: (a) cl... | 05/22/2007 |
