Did You Know...
...that the x-ray was discovered purely by accident? When German physicist Wilhelm Konrad von Roentgen was experimenting with cathode rays in 1895, he put an activated Crookes tube in a book and went out to lunch. When he returned, he discovered that a key that had also been placed in the book showed up as an image on the developed film!
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| Number | Title | Issue Date |
| 7838339 | Semiconductor device package having features formed by stamping Embodiments of the present invention relate to the use of stamping to form features on a lead frame of a semiconductor device package. In one embodiment, portions of the lead frame such as pins are moved out of the horizontal plane of a diepad by stamping. In certai... | 11/23/2010 |
| 7833840 | Integrated circuit package system with down-set die pad and method of manufacture thereof An integrated circuit package system and method of manufacture therefor includes providing a substrate with a beveled cavity, attaching a down-set conductive die pad with tapered sidewalls for matching with the beveled cavity in the substrate and having the down-set... | 11/16/2010 |
| 7824966 | Flex chip connector for semiconductor device A semiconductor die package. The semiconductor die package includes a semiconductor die having a first surface comprising a die contact region, and a second surface. It also includes a leadframe structure having a die attach pad and a lead structure, where the semic... | 11/02/2010 |
| 7820489 | Method of manufacturing semiconductor apparatus A method of manufacturing a semiconductor apparatus includes forming an electrode on a semiconductor device, forming a conductive bump on the electrode, placing an external wire on the conductive bump, and laser-welding the external wire and the conductive bump to e... | 10/26/2010 |
| 7816186 | Method for making QFN package with power and ground rings A method to manufacture a package that encases at least one integrated circuit device and the package so manufactured. The method includes the steps of (1) providing a leadframe having a die pad, leads, at least one ring circumscribing the die pad and disposed betwe... | 10/19/2010 |
| 7811864 | Method of fabricating semiconductor package A semiconductor package of this invention achieves higher wiring densities and increases the degree of freedom of the wiring design. The semiconductor package includes a first substrate having first and second faces, and first wiring provided on the first face of th... | 10/12/2010 |
| 7811865 | Method of forming a packaged chip multiprocessor A chip multiprocessor die supports optional stacking of additional dies. The chip multiprocessor includes a plurality of processor cores, a memory controller, and stacked cache interface circuitry. The stacked cache interface circuitry is configured to attempt to re... | 10/12/2010 |
| 7795078 | Leadframe package for MEMS microphone assembly A cavity semiconductor package has a pre-molded leadframe construction. The leadframe is formed by molding around a die pad, and plural terminal lands. The leadframe has a hole for an acoustic port, such that the package can be soldered on a back side of a printed c... | 09/14/2010 |
| 7790513 | Substrate based unmolded package A semiconductor die package is disclosed. In one embodiment, the semiconductor die package has a substrate. It includes (i) a lead frame structure including a die attach region with a die attach surface and a lead having a lead surface, and (ii) a molding material. ... | 09/07/2010 |
| 7790512 | Molded leadframe substrate semiconductor package A process for forming semiconductor packages comprises partially etching a leadframe matrix, encapsulating it with mold compound, placing a semiconductor die in a leadframe unit and singulating the leadframe matrix. A system for forming semiconductor packages compri... | 09/07/2010 |
| 7781265 | DFN semiconductor package having reduced electrical resistance A dual flat non-leaded semiconductor package is disclosed. A method of making a dual flat non-leaded semiconductor package includes forming a leadframe having a die bonding area with an integral drain lead, a gate lead bonding area and a source lead bonding area, th... | 08/24/2010 |
| 7781264 | Method for fabricating flip-chip semiconductor package with lead frame as chip carrier A flip-ship semiconductor package with a lead frame as a chip carrier is provided, wherein a plurality of leads of the lead frame are each formed with at least a dam member thereon. When a chip is mounted on the lead frame by means of solder bumps, each of the solde... | 08/24/2010 |
| 7781266 | Methods and apparatus for improved thermal performance and electromagnetic interference (EMI) shielding in leadframe integrated circuit (IC) packages A method of assembling an IC device package is provided. A leadframe is formed. At least one IC die is attached to a die attach pad portion of the leadframe. Wire bonds are coupled between the IC die and the leadframe. A cap is attached to the leadframe. A second su... | 08/24/2010 |
| 7772044 | Method of manufacturing a semiconductor device including plural semiconductor chips A method for manufacturing a semiconductor device includes mounting a first chip over a first area of a chip mounting section of a lead frame and mounting a second chip over a second area of the chip mounting section, wherein the second area is adjacent to the first... | 08/10/2010 |
| 7772043 | Plating apparatus, plating method and manufacturing method for semiconductor device A semiconductor device with plating film layers for semiconductor device leads is described. A first plating film layer that includes Sn as a main material is formed on a semiconductor device lead in which Cu or Fe—Ni is a main material. The outermost surface of t... | 08/10/2010 |
| 7754537 | Manufacture of mountable capped chips A wafer or a portion of a wafer including capped chips such as surface acoustic wave (SAW) chips is provided with terminals by applying a terminal-bearing element such as a dielectric element with terminals and leads thereon, or a lead frame, so that the terminal-be... | 07/13/2010 |
| 7745263 | System and method for routing supply voltages or other signals between side-by-side die and a lead frame for system in a package (SIP) devices An integrated circuit or chip includes a first die and a second die positioned on a lead frame of a package including a lead frame, such as a QFP, DIP, PLCC, TSOP, or any other type of package including a lead frame. The integrated circuit further includes a redistr... | 06/29/2010 |
| 7732259 | Non-leaded semiconductor package and a method to assemble the same A method to assemble a non-leaded semiconductor package is disclosed. In one embodiment, a carrier tape is attached to a metal foil. A plurality of leadframes are formed in the metal foil, each leadframe including a die pad laterally surrounded by a plurality of con... | 06/08/2010 |
| 7727817 | Semiconductor integrated circuit package and method of packaging semiconductor integrated circuit In a method of packaging a semiconductor IC, a tape is attached to a back surface of a lead frame array, and the lead frame array is held between an upper mold chase and a lower mold chase of a mold, with the back surface of the lead frame array upward. The upper an... | 06/01/2010 |
| 7727816 | Integrated circuit package system with offset stacked die An integrated circuit package system provides a leadframe having a short lead finger and a long lead finger. A first die is placed in the leadframe. A second die is offset from the first die. The offset second die is attached to the first die and the long lead finge... | 06/01/2010 |
| 7723162 | Method for producing shock and tamper resistant microelectronic devices A method of producing a microelectronic device resistant to tampering, inspection and damage from surrounding environment or operating conditions includes: (i) applying an adhesion layer on a circuit including a die fixed and electrically connected to a laminate sub... | 05/25/2010 |
| 7723163 | Method of forming premolded lead frame A method of forming a pre-molded lead frame having increased stand-offs includes the steps of attaching a first tape to a first side of the lead frame and a second tape to a second side of the lead frame. The taped lead frame is placed in a mold and a first flow of ... | 05/25/2010 |
| 7723161 | Lead frame, method of manufacturing the same, semiconductor device using lead frame and method of manufacturing semiconductor device There is provided a lead frame which comprises: a lead frame body comprising a sheet-shaped body made of metal; a groove portion for forming a lead which is formed by a predetermined depth in a lead forming region on a surface of the lead frame body; and a lead port... | 05/25/2010 |
| 7713790 | Method and system of tape automated bonding A tape automated bonding (TAB) structure which includes a flex tape having a conductive lead pattern formed thereon. The conductive lead pattern includes a plurality of leads configured to form an inner lead bond (ILB) portion of the TAB structure. At least one of t... | 05/11/2010 |
| 7691680 | Method of fabricating microelectronic component assemblies employing lead frames having reduced-thickness inner lengths The present disclosure suggests various microelectronic component assembly designs and methods for manufacturing microelectronic component assemblies. In one particular implementation, a microelectronic component assembly includes a microelectronic component, at lea... | 04/06/2010 |
| 7691681 | Chip scale package having flip chip interconnect on die paddle A flip chip lead frame package includes a die and a lead frame having a die paddle and leads, and has interconnection between the active site of the die and the die paddle. Also, methods for making the package are disclosed. ... | 04/06/2010 |
| 7691679 | Pre-plated leadframe having enhanced encapsulation adhesion A process for producing a pre-plated leadframe that has enhanced adhesion by molding compound is provided, wherein a base leadframe material is first plated with multiple layers of metallic material. Thereafter, the plated base leadframe material is covered with a m... | 04/06/2010 |
| 7682877 | Substrate based unmolded package A semiconductor die package is disclosed. In one embodiment, the semiconductor die package has a substrate. It includes (i) a leadframe structure including a die attach region with a die attach surface and a lead having a lead surface, and (ii) a molding material. T... | 03/23/2010 |
| 7678617 | Universal laminator An improved arrangement and process for packaging integrated circuits are described. More particularly, a universal lamination tool is described that functions to secure an adhesive film to a lead frame. The lamination tool of the present invention uses compressed g... | 03/16/2010 |
| 7678618 | Methods using die attach paddle for mounting integrated circuit die An electrical package for an integrated circuit die which comprises a die-attach paddle for mounting the integrated circuit die. The die-attach paddle has at least one down-set area located on a periphery of the die-attach paddle. The down-set area has an upper surf... | 03/16/2010 |
| 7670879 | Manufacturing method of semiconductor module including solid-liquid diffusion joining steps The present invention provides a manufacturing method of a semiconductor module which enables the joining at a low temperature within a short time and can obtain more reliable joining portions by performing the joining without using a solder joining medium. The manu... | 03/02/2010 |
| 7662672 | Manufacturing process of leadframe-based BGA packages A manufacturing process of a leadframe-based BGA package is disclosed. A leadless leadframe with an upper layer and a lower layer is provided for the package. The upper layer includes a plurality of ball pads, and the lower layer includes a plurality of sacrificial ... | 02/16/2010 |
| 7659149 | Method of electrically detecting biomolecule Provided is a method of sensing biomolecules using a bioFET, the method including: forming a layer including Au on a gate of the bioFET; forming a probe immobilized on a substrate separated from the gate by a predetermined distance, and a biomolecule having a thiol ... | 02/09/2010 |
| 7645639 | Packaging of integrated circuits to lead frames A lead frame (200) for housing an integrated circuit is disclosed comprising a main member (220) and an engagement portion (230) for receiving an integrated circuit (210). The integrated circuit (210) is located at the engagement p... | 01/12/2010 |
| 7645638 | Stackable multi-chip package system with support structure A stackable multi-chip package system is provided including forming an external interconnect, having a base and a tip, and a paddle; mounting a first integrated circuit die over the paddle; stacking a second integrated circuit die over the first integrated circuit d... | 01/12/2010 |
| 7635613 | Semiconductor device having firmly secured heat spreader A semiconductor device comprising a leadframe (903), which has first (903a) and second (903b) surfaces, a planar pad (910) of a certain size, and a plurality of non-coplanar members (913) adjoining the pad. The device... | 12/22/2009 |
| 7632719 | Wafer-level chip scale package and method for fabricating and using the same A packaged semiconductor device (a wafer-level chip scale package) containing a conductive adhesive material as an electrical interconnect route between the semiconductor die and a patterned conductive substrate is described. The patterned conductive substrate acts ... | 12/15/2009 |
| 7632718 | Semiconductor power component with a vertical current path through a semiconductor power chip A semiconductor power component using flat conductor technology includes a vertical current path through a semiconductor power chip. The semiconductor power chip includes at least one large-area electrode on its top side and a large-area electrode on its rear side. ... | 12/15/2009 |
| 7622332 | Partially patterned lead frames and methods of making and using the same in semiconductor packaging A method of making a lead frame and a partially patterned lead frame package with near-chip scale packaging (CSP) lead-counts is accomplished by performing a major portion of the manufacturing process steps with a partially patterned strip of metal formed into a web... | 11/24/2009 |
| 7622333 | Integrated circuit package system for package stacking and manufacturing method thereof A stackable multi-chip package system is provided including forming an external interconnect having a base and a tip, connecting a first integrated circuit die and the base, stacking a second integrated circuit die over the first integrated circuit die in an active ... | 11/24/2009 |
