...that after Walter Hunt patented the safety pin in 1849, he sold the rights to it for $400?
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| Number | Title | Issue Date |
| 7972905 | Packaged electronic device having metal comprising self-healing die attach material A method of assembling an electronic device and electronic packages therefrom. A die attach adhesive precursor is placed between a top surface of a workpiece and an IC die. The die attach adhesive precursor includes metal particles, a first plurality of first microc... | 07/05/2011 |
| 7955898 | Packaged microelectronic devices and methods for manufacturing packaged microelectronic devices Packaged microelectronic devices and methods for manufacturing packaged microelectronic devices are disclosed. In one embodiment, a method for forming a microelectronic device includes attaching a microelectronic die to a support member by forming an attachment feat... | 06/07/2011 |
| 7888182 | Electronic component, production method of electronic component, mounted structure of electronic component, and evaluation method of electronic component An electronic component having an element body having at least one plane, and a terminal electrode to be electrically connected through an electroconductive particle to a circuit substrate. The terminal electrode is formed on the plane of the element body. When the ... | 02/15/2011 |
| 7879650 | Method of providing protection against charging damage in hybrid orientation transistors In a method of fabricating a CMOS structure, a bulk device can be formed in a first region in conductive communication with an underlying bulk region of the substrate. A first gate conductor may overlie the first region. An SOI device can be formed which has a sourc... | 02/01/2011 |
| 7863106 | Silicon interposer testing for three dimensional chip stack A testing method for a silicon interposer employs a test probe and an electrically conductive glass handler. The silicon interposer includes multiple interconnects that extend between the opposed major surfaces of the interposer, namely from a test side of the inter... | 01/04/2011 |
| 7833837 | Chip scale package and method for manufacturing the same A chip scale package includes a patterned circuit layer attached to the active surface of a semiconductor chip through an anisotropic conductive adhesive layer such that contact pads on a lower surface of the patterned circuit layer are electrically coupled to corre... | 11/16/2010 |
| 7829386 | Power semiconductor packaging method and structure A semiconductor chip packaging structure is fabricated by using a dielectric film with two surfaces, and a power semiconductor chip with an active surface having contact pads. An adhesive layer is used to connect the first surface of the dielectric film and the acti... | 11/09/2010 |
| 7829385 | Taped semiconductor device and method of manufacture Printed tape is used to form a leads on chip (LOC) ball grid array (BGA) semiconductor device. Leads for a plurality of devices may be applied simultaneously. Bond wires, glob top encapsulant, and the ball grid arrays for the devices may be formed in single process ... | 11/09/2010 |
| 7790508 | Method for forming a structure Method for constructing a line or dotted structure on a support, especially for constructing strip-like electrically conducting contacts on a semiconductor component such as a solar cell, by applying an electrically conducting paste-like substance containing a solve... | 09/07/2010 |
| 7776657 | Chip package thermal interface materials with dielectric obstructions for body-biasing, methods of using same, and systems containing same A chip package includes a thermal interface material disposed between a die backside and a heat sink. The thermal interface material includes a first metal particle that is covered by a dielectric film. The dielectric film is selected from an inorganic compound of t... | 08/17/2010 |
| 7759168 | Electromagnetic interference shield for semiconductors using a continuous or near-continuous peripheral conducting seal and a conducting lid A semiconductor package structure including a conductive adhesive material which is used to form an electromagnetic interference shield-forming Faraday cage. The Faraday cage incorporates a module lid as the top surface thereof, the conductive material as the sides ... | 07/20/2010 |
| 7754535 | Method of manufacturing chip integrated substrate There are provided the steps of connecting a chip component 13 to a first substrate 10 through wire bonding, providing, on a second substrate 20, an electrode 21 having a solder coat 23 with a copper core 22, polishing a por... | 07/13/2010 |
| 7727814 | Microelectronic package interconnect and method of fabrication thereof A method of interconnecting and an interconnect is provided to connect a first component and a second component of an integrated circuit. The interconnect includes a plurality of Carbon Nanotubes (CNTs), which provide a conducting path between the first component an... | 06/01/2010 |
| 7682875 | Method for fabricating a module including a sintered joint A method comprises applying a paste comprising metal grains, a solvent, and a sintering inhibitor to one of a die and a metal layer. The method comprises evaporating the solvent in the paste and placing the one of the die and the metal layer on the other of the die ... | 03/23/2010 |
| 7629202 | Method and apparatus for electrostatic discharge protection using a temporary conductive coating A method and apparatus for providing ESD protection of an integrated circuit using a temporary conductive coating. The method deposits a temporary conductive coating upon a chip die between contacts to be protected such that a conductive path is created between cont... | 12/08/2009 |
| 7569424 | Method of forming a wall structure in a microelectronic assembly A method of forming a wall structure in a microelectronic assembly includes selectively depositing a flowable material on an upper surface of a first element in the microelectronic assembly, positioning a molding surface in contact with the deposited flowable materi... | 08/04/2009 |
| 7566590 | Low voltage drop and high thermal performance ball grid array package An apparatus and method for a low voltage drop and thermally enhanced integrated circuit (IC) package are described. A substantially planar substrate having a plurality of contact pads on a first surface is electrically connected through the substrate to a plurality... | 07/28/2009 |
| 7550318 | Interconnect for improved die to substrate electrical coupling A method is provided for forming peripheral contacts between a die and a substrate. In accordance with the method, a die (305) is provided which has first and second opposing major surfaces, wherein the first major surface is attached to a substrate (303 | 06/23/2009 |
| 7531385 | Flip chip mounting method and method for connecting substrates A flip chip mounting method which is applicable to the flip chip mounting of a next-generation LSI and high in productivity and reliability as well as a method for connecting substrates are provided. A circuit board 10 having a plurality of connecting termina... | 05/12/2009 |
| 7521293 | Method of manufacturing semiconductor device, semiconductor device, circuit board, and electronic instrument A method of manufacturing a semiconductor device uses a substrate on which an interconnect pattern is formed and on which a protective film is formed to include an opening and to cover the interconnect pattern in a region other than the opening. The method includes:... | 04/21/2009 |
| 7507604 | Breakable interconnects and structures formed thereby Methods of forming a microelectronic structure are described. Embodiments of those methods include placing an anisotropic conductive layer comprising at least one compliant conductive sphere on at least one interconnect structure disposed on a first substrate, apply... | 03/24/2009 |
| 7470568 | Method of manufacturing a semiconductor device Salient electrodes on a semiconductor chip and leads on a film substrate are to be connected together with a high accuracy. A change in lead pitch which occurs at the time of connecting salient electrodes on a semiconductor chip and inner leads on a film substrate w... | 12/30/2008 |
| 7449368 | Technique for attaching die to leads A semiconductor die assembly comprising a semiconductor die with bond pads, a plurality of leads which extend across the semiconductor die and terminates over their respective bond pads, and an alpha barrier preferably positioned between the leads and the semiconduc... | 11/11/2008 |
| 7442578 | Underfill compounds including electrically charged filler elements, microelectronic devices having underfill compounds including electrically charged filler elements, and methods of underfilling micoelectronic devices Underfill compounds including electrically charged filler elements, microelectronic devices having underfill compounds including electrically charged filler elements, and methods of disposing underfill including electrically charged filler elements on microelectroni... | 10/28/2008 |
| 7435622 | High performance reworkable heatsink and packaging structure with solder release layer and method of making A method of making and a high performance reworkable heatsink and packaging structure with solder release layer are provided. A heatsink structure includes a heatsink base frame. A selected one of a heatpipe or a vapor chamber, and a plurality of parallel fins are s... | 10/14/2008 |
| 7436058 | Reactive solder material Reactive solder material. The reactive solder material may be soldered to semiconductor surfaces such as the backside of a die or wafer. The reactive solder material includes a base solder material alloyed with an active element material. The reactive solder materia... | 10/14/2008 |
| 7422930 | Integrated circuit with re-route layer and stacked die assembly An apparatus and a method of manufacture for a stacked-die assembly. A first die is placed on a substrate such that the backside of the die, i.e., the side opposite the side with the bond pads, is coupled to the substrate, preferably by an adhesive. Wire leads elect... | 09/09/2008 |
| 7419855 | Apparatus and method for miniature semiconductor packages A method and apparatus for making reliable miniature semiconductor packages having a reduced height and footprint is provided. The package includes a semiconductor chip having an active surface and a non-active surface and one or more contacts positioned adjacent th... | 09/02/2008 |
| 7394147 | Semiconductor package A semiconductor package includes a substrate, a first chip, a nonconductive adhesive, a second chip and a plurality of supporting balls. The first chip has an upper surface and a lower surface opposite to the upper surface, and the lower surface is mounted on the su... | 07/01/2008 |
| 7394163 | Method of mounting semiconductor chip A method of mounting a semiconductor chip in which an IC chip is mounted by filling a gap between the chip and a substrate with adhesive which functions as an underfill. The fillet of the underfill is made to have a preferable shape. To accomplish this, a head IC ch... | 07/01/2008 |
| 7381590 | Method and device including reworkable alpha particle barrier and corrosion barrier A method and device comprising an easily reworkable alpha particle barrier is provided. The easily reworkable alpha particle barrier is applied in the space between the surface of the chip and the surface of the substrate, and reduces soft error rate (SER). Further,... | 06/03/2008 |
| 7365006 | Semiconductor package and substrate having multi-level vias fabrication method A semiconductor package and substrate having multi-level plated vias provide a high density blind via solution at low incremental cost. Via are half-plated atop a circuit pattern and then a second via half is added to complete the via after isolation of elements of ... | 04/29/2008 |
| 7358118 | Mounting method of flexible printed circuit and manufacturing method of electric optical device Aspects of the current invention are directed to a method of mounting a flexible printed circuit and a manufacturing method of an electric optical device. Each of the methods form semiconductor elements and first terminal portions for electrically connecting the sem... | 04/15/2008 |
| 7354803 | Method for manufacturing substrate conjugate, substrate conjugate, method for manufacturing electro-optical apparatus, and electro optical apparatus A method for manufacturing a substrate conjugate is provided including a step of joining a first substrate including a first functional device to a second substrate including a second functional device and a step of providing a protective layer on at least one of: a... | 04/08/2008 |
| 7347242 | Tire with low thermal expansion component The present invention is directed to a pneumatic tire comprising at least one component comprising a rubber composition comprising a diene based elastomer and an inorganic negative thermal expansion (NTE) filler comprising at least one compound selected from the gro... | 03/25/2008 |
| 7348261 | Wafer scale thin film package A chip module having a chip with a flexible multilayer redistribution thin film attached thereto for connection to a substrate. The thin film acts as both a redistribution medium with multiple layers of redistribution metallurgy for chip power and signals and as a c... | 03/25/2008 |
| 7334326 | Method for making an integrated circuit substrate having embedded passive components A method for making an integrated circuit substrate having embedded passive components provides a reduced cost and compact package for a die and one or more passive components. An insulating layer of the substrate is embossed or laser-ablated to generate apertures f... | 02/26/2008 |
| 7332371 | Semiconductor device and method of manufacture thereof, circuit board and electronic instrument A method of manufacturing a semiconductor device comprises: a first step of interposing a thermosetting anisotropic conductive material 16 between a substrate 12 and a semiconductor chip 20; a second step in which pressure and heat are applied between ... | 02/19/2008 |
| 7326593 | Method of producing a package for semiconductor chips The inventive method is based on the a idea of releasing a mechanical connection between the semiconductor chip and the supporting substrate during the manufacturing of the packing. The mechanical connection required for producing the electrical contacts between the... | 02/05/2008 |
| 7326460 | Device, method of manufacturing the same, electro-optic device, and electronic equipment A first conductive film is formed on a wiring pattern area on a plate by dropping liquid drops. A second conductive film which is electrically separated from the first conductive film is formed by discharging liquid drops outside of the wiring pattern area on the pl... | 02/05/2008 |