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| Number | Title | Issue Date |
| 7309648 | Low profile, chip-scale package and method of fabrication Disclosed is a semiconductor device that includes an electrically insulating, sheet-like substrate with first and second surfaces, at least one opening, and a certain thickness. On the first surface are a plurality of electrically conductive routing strips and a plu... | 12/18/2007 |
| 7309923 | Integrated circuit package having stacked integrated circuits and method therefor Improved approaches to stacking integrated circuit chips within an integrated circuit package are disclosed. The improved approaches enable increased integrated circuit density within integrated circuit packages, yet the resulting integrated circuit packages are thi... | 12/18/2007 |
| 7310458 | Stacked module systems and methods The present invention provides methods for constructing stacked circuit modules and precursor assemblies with flexible circuitry. Using the methods of the present invention, a single set of flexible circuitry whether articulated as one or two flex circuits may be em... | 12/18/2007 |
| 7306974 | Microelectronic devices and methods for manufacturing and operating packaged microelectronic device assemblies Packaged microelectronic devices, methods for packaging microelectronic devices, and methods of operating microelectronic devices. In one embodiment, a packaged microelectronic device comprises a die including integrated circuitry, a first casing coating at least a ... | 12/11/2007 |
| 7306971 | Semiconductor chip packaging method with individually placed film adhesive pieces Individual pieces of film adhesive (42) are placed on a support surface (46). Diced semiconductor chips (24) are individually placed on the individual pieces of the film adhesive thereby securing the diced semiconductor chips to the support surf... | 12/11/2007 |
| 7303947 | Source bridge for cooling and/or external connection A FET includes elongated, mutually parallel source regions separated by gate and drain regions. Conductive bridges extend over the gate and drain regions and not in electrical contact therewith to electrically and thermally interconnect the sources. A layer of diele... | 12/04/2007 |
| 7300823 | Apparatus for housing a micromechanical structure and method for producing the same Apparatus for housing a micromechanical structure, and a method for producing the housing. The apparatus has a substrate having a main side on which the micromechanical structure is formed, a photo-resist material structure surrounding the micromechanical structure ... | 11/27/2007 |
| 7294530 | Method for encapsulating multiple integrated circuits A device, such as an integrated circuit or an electronic circuit component is affixed to a substrate. A first encapsulation structure encases a first integrated circuit and has at least one groove formed therein. An adhesive partially fills the groove in the first e... | 11/13/2007 |
| 7289930 | Method for monitoring tyre pressure monitoring systems in a motor vehicle Disclosed is a method of monitoring tire pressure monitoring systems in a motor vehicle. The motor vehicle has a tire pressure monitoring system with indirect measurement which detects tire inflation pressure loss on the basis of wheel speed data, and a tire pressur... | 10/30/2007 |
| 7288439 | Leadless microelectronic package and a method to maximize the die size in the package Arrangements and methods of packaging integrated circuits in leadless leadframe packages configured for maximizing a die size are disclosed. The package is described having an exposed die attach pad and a plurality of exposed contacts formed from a common substrate ... | 10/30/2007 |
| 7285442 | Stackable ceramic FBGA for high thermal applications An apparatus package for high-temperature thermal applications for ball grid array semiconductor devices and a method of packaging ball grid array semiconductor devices. ... | 10/23/2007 |
| 7285444 | Method of manufacturing semiconductor device A semiconductor device which includes: a semiconductor chip with plural pads; a tab connected with the semiconductor chip; bus bars which are located outside of the semiconductor chip and connected with the tab; a sealing body which resin-seals the semiconductor chi... | 10/23/2007 |
| 7282396 | Method of manufacturing a semiconductor device including using a sealing resin to form a sealing body The quality of a non-leaded semiconductor device is to be improved. The semiconductor device comprises a sealing body for sealing a semiconductor chip with resin, a tab disposed in the interior of the sealing body, suspension leads for supporting the tab, plural lea... | 10/16/2007 |
| 7282786 | Semiconductor package and process for making the same A semiconductor package mainly includes a leadframe and a first semiconductor chip such as an application specific integrated circuit (ASIC) encapsulated in a first package body having a cavity for receiving a second semiconductor chip such as a pressure sensor chip... | 10/16/2007 |
| 7282392 | Method of fabricating a stacked die in die BGA package Semiconductor devices and stacked die assemblies, and methods of fabricating the devices and assemblies for increasing semiconductor device density are provided. ... | 10/16/2007 |
| 7279780 | Quad flat no-lead (QFN) grid array package, method of making and memory module and computer system including same A quad flat no-lead (QFN) grid array semiconductor package and method for making the same are provided. The package includes a semiconductor die and a lead frame having a plurality of conductive elements patterned in a grid-type array. A plurality of bond pads on th... | 10/09/2007 |
| 7279797 | Module assembly and method for stacked BGA packages Ball grid array packages that can be stacked to form highly dense components and the method for stacking ball grid arrays. The ball grid array packages comprise flexible or rigid substrates. The ball grid array packages additionally comprise an arrangement for the s... | 10/09/2007 |
| 7279355 | Method for fabricating a packaging device for semiconductor die and semiconductor device incorporating same A substantially planar substrate having opposed major surfaces is provided. The substrate includes a through hole that extends between the major surfaces. The through hole is filled with a conductive interconnecting element. A conductive mounting pad and a conductiv... | 10/09/2007 |
| 7273768 | Wafer-level package and IC module assembly method for the wafer-level package A wafer-level package and an IC module assembly method for a wafer-level package are provided in the present invention. The method comprises forming a metal bump on a wafer, applying a high polymer resin coating to the wafer, grinding a surface of the resin coating,... | 09/25/2007 |
| 7273788 | Ultra-thin semiconductors bonded on glass substrates A method for forming a semiconductor on insulator structure includes providing a glass substrate, providing a semiconductor wafer, and performing a bonding cut process on the semiconductor wafer and the glass substrate to provide a thin semiconductor layer bonded to... | 09/25/2007 |
| 7274099 | Method of embedding semiconductor chip in support plate A method of embedding a semiconductor chip in a support plate and an embedded structure thereof are proposed. A first dielectric layer having a reinforced filling material is provided, and a semiconductor chip is mounted on the first dielectric layer. A support plat... | 09/25/2007 |
| 7274090 | Electronic package and semiconductor device using the same A package for an electronic component according to one embodiment of the invention has a chip mounting area mounting a semiconductor chip in a hollow part of a metal plate and a plurality of connection electrodes to be connected to a substrate. The plurality of conn... | 09/25/2007 |
| 7271047 | Test structure and method for measuring the resistance of line-end vias A test structure and methods of using and making the same are provided. In one aspect, a test structure is provided that includes a first conductor that has a first end and a second conductor that has a second end positioned above the first end. A third conductor is... | 09/18/2007 |
| 7271471 | Metal substrate apparatus, method of manufacturing an IC card module apparatus, and an IC card module apparatus A metal substrate apparatus comprises a plurality of metal substrates forming an IC card module used in manufacturing transfer mold-type non-contact IC cards. The metal substrate apparatus comprises a thin metal strip of processing material, and each metal substrate... | 09/18/2007 |
| 7271086 | Microfeature workpieces and methods of forming a redistribution layer on microfeature workpieces Methods for forming a redistribution layer on microfeature workpieces, and microfeature workpieces having such a redistribution layer are disclosed herein. In one embodiment, a method includes constructing a dielectric structure on a microfeature workpiece having a ... | 09/18/2007 |
| 7270867 | Leadless plastic chip carrier A process for fabricating a leadless plastic chip carrier includes selectively depositing a plurality of base layers on a first surface of a base of a leadframe strip to at least partially define a die attach pad and at least one row of contact pads. At least one fu... | 09/18/2007 |
| 7271032 | Leadless plastic chip carrier with etch back pad singulation A leadless plastic chip carrier is constructed by half etching one or both sides of the package design onto a leadframe strip so as to create unique design features such as power and/or ground ring surrounding the die attach pad, interlocking rivet head construction... | 09/18/2007 |
| 7268421 | Semiconductor chip assembly with welded metal pillar that includes enlarged ball bond A semiconductor chip assembly includes a semiconductor chip that includes a conductive pad, a conductive trace that includes a routing line and a metal pillar, a connection joint that electrically connects the routing line and the pad, and an encapsulant. The chip a... | 09/11/2007 |
| 7264991 | Method of connecting a conductive trace to a semiconductor chip using conductive adhesive A method of connecting a conductive trace to a semiconductor chip includes providing a semiconductor chip that includes a conductive pad, providing a conductive trace, then disposing a conductive adhesive between the conductive trace and the chip, thereby mechanical... | 09/04/2007 |
| 7262074 | Methods of fabricating underfilled, encapsulated semiconductor die assemblies An apparatus and method may be used for packaging a semiconductor die and a carrier substrate to substantially prevent trapped moisture therebetween and provide a robust, inflexible cost-effective bond. The semiconductor die is attached to the carrier substrate with... | 08/28/2007 |
| 7262428 | Strained Si/SiGe/SOI islands and processes of making same A process of making a strained silicon-on-insulator structure is disclosed. A recess is formed in a substrate to laterally isolate an active area. An undercutting etch forms a bubble recess under the active area to partially vertically isolate the active area. A the... | 08/28/2007 |
| 7262082 | Method of making a three-dimensional stacked semiconductor package with a metal pillar and a conductive interconnect in an encapsulant aperture A method of making a three-dimensional stacked semiconductor package includes providing a first semiconductor chip assembly that includes a first chip, a first conductive trace and a first encapsulant, wherein the first conductive trace includes a first metal pillar... | 08/28/2007 |
| 7260441 | Method of inspecting a workpiece during a production run in which workpieces are supplied to workstations by an autoloader A method of inspecting a workpiece during a production run in which workpieces are supplied to workstations by an autoloader. In accordance with the method, the supply of the workpieces by the autoloader is performed in accordance with a supply control routine. When... | 08/21/2007 |
| 7259050 | Semiconductor device and method of making the same A semiconductor device comprises a substrate, a gate disposed on the substrate, and a source and drain formed in the substrate on both sides of the gate. The device further comprises a thin spacer having a first layer and a second layer formed on the sidewalls of th... | 08/21/2007 |
| 7256066 | Flip chip packaging process A flip chip packaging process uses an underfill as an encapsultant to reduce the possibility of delamination from occurring due to differential coefficients of thermal expansion, and thus the reliability of a flip chip package structure can be increased. Furthermore... | 08/14/2007 |
| 7253026 | Ultra-thin semiconductor package device and method for manufacturing the same An ultra-thin semiconductor package includes a lead frame having a die pad and a plurality of leads surrounding the die pad. The die pad includes a chip attaching part to which a semiconductor chip is attached and a peripheral part integral with and surrounding the ... | 08/07/2007 |
| 7253506 | Micro lead frame package The present invention comprises a lead frame substrate adapted to receive semiconductor die and multiple passive components. The lead frame substrate is preferably formed from a single piece of electrically conductive material, such as copper, and may be mounted wit... | 08/07/2007 |
| 7253532 | Electrical or electronic component and method of producing same To refine an electrical or electronic component having at least one discrete or integrated device formed from a wafer, in plate or disk form, of semiconductive or insulating material, the front face of which device has at least one protruding electrode and is encaps... | 08/07/2007 |
| 7250328 | Microelectronic component assemblies with recessed wire bonds and methods of making same The present disclosure suggests various microelectronic component assembly designs and methods for manufacturing microelectronic component assemblies. In one particular implementation, a microelectronic component assembly includes a microelectronic component, a subs... | 07/31/2007 |
| 7250687 | Systems for degating packaged semiconductor devices with tape substrates A system for degating a packaged semiconductor device that includes a tape substrate includes a first element and a second element. The first element of the system is positionable adjacent to a first major surface of the packaged semiconductor device and includes a ... | 07/31/2007 |
