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| Number | Title | Issue Date |
| 8158458 | Power semiconductor module and method of manufacturing the same A power semiconductor module and a method of manufacture thereof includes lead a frame carrying lead having inner and outer lead portions. The outer lead portions, which are connected by soldering to semiconductor chips simultaneously, eliminate the need for using b... | 04/17/2012 |
| 8119452 | Method of fabricating a semiconductor device One method includes fabricating a semiconductor device including providing a dielectric layer. At least one semiconductor chip is provided defining a first surface including contact elements and a second surface opposite to the first surface. The semiconductor chip ... | 02/21/2012 |
| 8105876 | Leadframe for leadless package, structure and manufacturing method using the same A leadframe employed by a leadless package comprises a plurality of package units and an adhesive tape. Each of the package units has a die pad with a plurality of openings and a plurality of pins disposed in the plurality of openings. The adhesive tape is adhered t... | 01/31/2012 |
| 8101464 | Microelectronic devices and methods for manufacturing microelectronic devices Microelectronic devices and methods for manufacturing microelectronic devices are disclosed herein. One such method includes forming a plurality of apertures in a substrate with the apertures arranged in an array, and, after forming the apertures, attaching the subs... | 01/24/2012 |
| 8071427 | Method for manufacturing a semiconductor component and structure therefor A semiconductor component having wetable leadframe lead surfaces and a method of manufacture. A leadframe having leadframe leads is embedded in a mold compound. A portion of at least one leadframe lead is exposed and an electrically conductive material is formed on ... | 12/06/2011 |
| 8071428 | Semiconductor device A semiconductor device and method. One embodiment provides an encapsulation plate defining a first main surface and a second main surface opposite to the first main surface. The encapsulation plate includes multiple semiconductor chips. An electrically conductive la... | 12/06/2011 |
| 8058104 | Reversible leadless package and methods of making and using same A method for manufacturing a semiconductor device package including an electrically conductive lead frame having a plurality of posts disposed at a perimeter of the package. Each of the posts has a first contact surface at the first package face and a second contact... | 11/15/2011 |
| 8008128 | Thin quad flat package with no leads (QFN) fabrication methods Embodiments of the present invention include a method of packaging semiconductor devices. The method comprises the steps of molding a surface of a wafer, sawing the wafer into individual devices, attaching the individual semiconductor device to an adhesive surface, ... | 08/30/2011 |
| 7998791 | Panel level methods and systems for packaging integrated circuits with integrated heat sinks Panel level methods and arrangements are described for attaching heat sinks in panel form with dice attached to a leadframe panel. Various methods produce integrated circuit packages each having an exposed heat sink on one outer surface of the package and an exposed... | 08/16/2011 |
| 7998792 | Semiconductor device assemblies, electronic devices including the same and assembly methods A semiconductor device is formed of two or more dice of similar dimensions and bond pad arrangements, in which bond pads are located in fields along less than three edges of the active surface of each die. A first die is attached to a substrate and subsequent die or... | 08/16/2011 |
| 7985623 | Integrated circuit package system with contoured encapsulation An integrated circuit package system is provided including providing a carrier, mounting an integrated circuit die on the carrier, connecting the integrated circuit die with the carrier, and forming an encapsulation having a multi-sloped side over the integrated cir... | 07/26/2011 |
| RE42457 | Methods of packaging an integrated circuit and methods of forming an integrated circuit package The present invention includes an integrated circuit package, a ball-grid array integrated circuit package, a method of packaging an integrated circuit, and a method of forming an integrated circuit package. According to one aspect, the present invention provides an... | 06/14/2011 |
| 7947530 | Method of manufacturing wafer level package including coating and removing resin over the dicing lines The present invention relates to a method of manufacturing a wafer level package including the steps of: preparing a substrate wafer including a plurality of pads formed on a bottom surface, a plurality of chips positioned on a top surface, and dicing lines for divi... | 05/24/2011 |
| 7943423 | Reconfigured wafer alignment A method of manufacturing semiconductor device comprises placing multiple chips onto a carrier. An encapsulation material is applied to the multiple chips and the carrier for forming an encapsulation workpiece. The encapsulation workpiece having a first main face fa... | 05/17/2011 |
| 7943424 | Encapsulation method for packaging semiconductor components with external leads This invention discloses a method for packaging a semiconductor device with leads extending outside its encapsulation. The method comprises the following steps: Step 1, providing a lead frame comprising a plurality of lead frame units arranged in two dimensional arr... | 05/17/2011 |
| 7915086 | Manufacturing method of semiconductor device Performing electrolysis plating to a wiring is made possible, aiming at the increasing of pin count of a semiconductor device. Package substrate 3 by which ring shape common wiring 3p for electric supply was formed in the inner area of bonding l... | 03/29/2011 |
| 7901990 | Method of forming a molded array package device having an exposed tab and structure In one embodiment, a method for forming a molded flat pack style package includes attaching electronic chips to an array lead frame, which includes a plurality of elongated flag portions with tab portions and a plurality of leads. The method further includes connect... | 03/08/2011 |
| 7892893 | Semiconductor device and manufacturing method thereof A portion of a frame body is fixed on a surface of a heat-radiating plate, and on frame body, a semiconductor chip is die-bonded. Next, a prescribed electrode of semiconductor chip and corresponding lead terminal and the like are electrically connected by a prescrib... | 02/22/2011 |
| 7888177 | Electronic component, semiconductor device, methods of manufacturing the same, circuit board, and electronic instrument The present invention is a method of manufacturing a semiconductor device, by forming a wiring on or above a wafer so that the wiring is electrically connected to a first electrode disposed on a first surface of the wafer, forming a first resin layer on or above the... | 02/15/2011 |
| 7879648 | Fabrication method for high pin count chip package A fabrication method for a high pin count chip package is provided herein. First, a lead frame is provided, wherein the lead frame has a chip carrier and a plurality of first lead pins configured around the chip carrier. A first channel is formed on the first lead p... | 02/01/2011 |
| 7863103 | Thermally improved semiconductor QFN/SON package A semiconductor device without cantilevered leads uses conductive wires (120) to connect the chip terminals to the leads (110), and a package compound (140) to encapsulate the chip surface (101a) with the terminals, the wires, and ... | 01/04/2011 |
| 7858444 | Electronic device and method of manufacturing thereof The device has a carrier and an electric element. The carrier has a first and an opposed side and is provided with an connection layer, an intermediate layer and contact pads. The element is present at the first side and coupled to the connection layer. It is at lea... | 12/28/2010 |
| 7851263 | Semiconductor device and method of manufacturing the same A method of manufacturing a semiconductor device including (1) providing a metal plate having an upper surface and a back surface, the metal plate including a plurality of lids disposed in matrix, which are defined by a first groove formed from the upper surface, (2... | 12/14/2010 |
| 7846775 | Universal lead frame for micro-array packages Techniques for forming micro-array style packages are disclosed. A matrix of isolated contact posts are placed on an adhesive carrier. Dice are then mounted (directly or indirectly) on the carrier and each die is electrically connected to a plurality of associated c... | 12/07/2010 |
| 7842550 | Method of fabricating quad flat non-leaded package A method of fabricating a quad flat non-leaded package includes first forming a patterned conductive layer on a sacrificial layer. The patterned conductive layer includes a number of lead sets. A number of chips are attached to the sacrificial layer. Each of the chi... | 11/30/2010 |
| 7833833 | Method of manufacturing a semiconductor device The quality of a non-leaded semiconductor device is to be improved. The semiconductor device comprises a sealing body for sealing a semiconductor chip with resin, a tab disposed in the interior of the sealing body, suspension leads for supporting the tab, plural lea... | 11/16/2010 |
| 7803662 | Warpage control using a package carrier assembly A method for curing an encapsulant that surrounds a plurality of integrated circuits on a strip that forms a strip assembly is provided. The strip assembly is composed of units for packaging and the units each have edges defining a perimeter of the unit. The strip a... | 09/28/2010 |
| 7799611 | Partially patterned lead frames and methods of making and using the same in semiconductor packaging A method of making a lead frame and a partially patterned lead frame package with near-chip scale packaging (CSP) lead-counts is disclosed, wherein the method lends itself to better automation of the manufacturing line as well as to improving the quality and reliabi... | 09/21/2010 |
| 7785928 | Integrated circuit device and method of manufacturing thereof A method of manufacturing an integrated circuit (IC) device is disclosed. A wafer including multiple dies is processed to form solder bumps at the bond pad locations. A conductive substrate is patterned for routing traces and connection pads and partially etched. Ro... | 08/31/2010 |
| 7785929 | Mountable integrated circuit package system with exposed external interconnects The present invention provides a mountable integrated circuit package system comprising: providing an inner integrated circuit package including a first external interconnect having a shoulder; connecting an intraconnect between a second external interconnect and th... | 08/31/2010 |
| 7781262 | Method for producing semiconductor device and semiconductor device The method of producing a semiconductor device in which chips are resin-molded, including steps of: preparing frames having front and back surfaces and die pads; preparing an insulation resin sheet having a first and a second surfaces; preparing a resin-sealing meta... | 08/24/2010 |
| 7772036 | Lead frame based, over-molded semiconductor package with integrated through hole technology (THT) heat spreader pin(s) and associated method of manufacturing A method and apparatus are provided for manufacturing a lead frame based, over-molded semiconductor package (7) with an exposed pad or power die flag (70) having multiple integrated THT heat spreader pins (71) configured for insertion into one o... | 08/10/2010 |
| 7754531 | Method for packaging microelectronic devices Methods for packaging microelectronic devices and microelectronic devices formed by such methods are disclosed herein. In one embodiment, a method includes coupling a plurality of microelectronic dies to a support member, covering the dies and at least a portion of ... | 07/13/2010 |
| 7732258 | Lead frame and method for fabricating semiconductor package employing the same A lead frame and a method of fabricating a semiconductor package including the lead frame, where the lead frame includes a die pad, a tie bar supporting the die pad, and a plurality of leads. The leads may include inner and outer leads arranged along an outer periph... | 06/08/2010 |
| 7713783 | Electronic component package, electronic component using the package, and method for manufacturing electronic component package An electronic component package that provides a high shielding performance and that can prevent failures such as short-circuiting with a component contained therein. A package includes a shield case formed of a metal plate and shaped to have a bottom portion, the bo... | 05/11/2010 |
| 7713784 | Thin quad flat package with no leads (QFN) fabrication methods Embodiments of the present invention include a method of packaging semiconductor devices. The method comprises the steps of molding a surface of a wafer, sawing the wafer into individual devices, attaching the individual semiconductor device to an adhesive surface, ... | 05/11/2010 |
| 7704794 | Method of forming a semiconductor device A semiconductor device is formed of two or more dice of similar dimensions and bond pad arrangement, in which bond pads are located in fields along less than three edges of the active surface of each die. A first die is attached to a substrate and subsequent die or ... | 04/27/2010 |
| 7700412 | Chip package structure and the method thereof with adhering the chips to a frame and forming UBM layers A chip package structure includes a chip-placed frame that having an adhesive layer thereon; a chip includes a plurality of pads on an active surface thereon, and is provided on the adhesive layer; a package structure is covered around the four sides of the chip-pla... | 04/20/2010 |
| 7691677 | Method of manufacturing a semiconductor device The quality of a non-leaded semiconductor device is to be improved. The semiconductor device comprises a sealing body for sealing a semiconductor chip with resin, a tab disposed in the interior of the sealing body, suspension leads for supporting the tab, plural lea... | 04/06/2010 |
| 7691676 | Mold array process for semiconductor packages A mold array process (MAP) for manufacturing a plurality of semiconductor packages is revealed. Firstly, a substrate strip including a plurality of substrate units arranged in an array within a molding area is provided. A plurality of chips are disposed on the subst... | 04/06/2010 |
